Add checks to catch invaliud XScale MIA, MIAPH and MIAxy instructions.

[deliverable/binutils-gdb.git] / sim / arm / armdefs.h

diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h
index 61ab9c5816d060f2443f6ddfcdd1977b7a3b4b60..fde312516338164f16c4277e0d3475939362bc29 100644 (file)
--- a/sim/arm/armdefs.h
+++ b/sim/arm/armdefs.h
@@ -30,6 +30,7 @@ typedef char *VoidStar;
 #endif
 
 typedef unsigned long ARMword; /* must be 32 bits wide */
+typedef unsigned long long ARMdword;   /* Must be at least 64 bits wide.  */
 typedef struct ARMul_State ARMul_State;
 
 typedef unsigned ARMul_CPInits (ARMul_State * state);
@@ -56,9 +57,13 @@ struct ARMul_State
   unsigned ErrorCode;          /* type of illegal instruction */
   ARMword Reg[16];             /* the current register file */
   ARMword RegBank[7][16];      /* all the registers */
+  /* 40 bit accumulator.  We always keep this 64 bits wide,
+     and move only 40 bits out of it in an MRA insn.  */
+  ARMdword Accumulator;
   ARMword Cpsr;                        /* the current psr */
   ARMword Spsr[7];             /* the exception psr's */
   ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */
+  ARMword SFlag;
 #ifdef MODET
   ARMword TFlag;               /* Thumb state */
 #endif
@@ -97,6 +102,9 @@ struct ARMul_State
   ARMul_CPWrites *CPWrite[16]; /* Write CP register */
   unsigned char *CPData[16];   /* Coprocessor data */
   unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
+  unsigned long LastTime;      /* Value of last call to ARMul_Time() */
+  ARMword CP14R0_CCD;          /* used to count 64 clock cycles with CP14 R0 bit
+                                  3 set */
 
   unsigned EventSet;           /* the number of events in the queue */
   unsigned long Now;           /* time to the nearest cycle */
@@ -125,6 +133,8 @@ struct ARMul_State
 
   unsigned is_v4;              /* Are we emulating a v4 architecture (or higher) ?  */
   unsigned is_v5;              /* Are we emulating a v5 architecture ?  */
+  unsigned is_v5e;             /* Are we emulating a v5e architecture ?  */
+  unsigned is_XScale;          /* Are we emulating an XScale architecture ?  */
   unsigned verbose;            /* Print various messages like the banner */
 };
 
@@ -150,6 +160,8 @@ struct ARMul_State
 #define ARM_Lock_Prop    0x20
 #define ARM_v4_Prop      0x40
 #define ARM_v5_Prop      0x80
+#define ARM_v5e_Prop     0x100
+#define ARM_XScale_Prop  0x200
 
 /***************************************************************************\
 *                   Macros to extract instruction fields                    *
@@ -308,10 +320,13 @@ extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
 
 extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
 extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
+extern ARMword ARMul_SafeReadByte (ARMul_State * state, ARMword address);
 extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
                             ARMword data);
 extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
                             ARMword data);
+extern void ARMul_SafeWriteByte (ARMul_State * state, ARMword address,
+                            ARMword data);
 
 extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
                                ARMword, ARMword, ARMword, ARMword, ARMword,
@@ -330,6 +345,32 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
 #define ARMul_CANT 1
 #define ARMul_INC 3
 
+#define ARMul_CP13_R0_FIQ      0x1
+#define ARMul_CP13_R0_IRQ      0x2
+#define ARMul_CP13_R8_PMUS     0x1
+
+#define ARMul_CP14_R0_ENABLE   0x0001
+#define ARMul_CP14_R0_CLKRST   0x0004
+#define ARMul_CP14_R0_CCD      0x0008
+#define ARMul_CP14_R0_INTEN0   0x0010
+#define ARMul_CP14_R0_INTEN1   0x0020
+#define ARMul_CP14_R0_INTEN2   0x0040
+#define ARMul_CP14_R0_FLAG0    0x0100
+#define ARMul_CP14_R0_FLAG1    0x0200
+#define ARMul_CP14_R0_FLAG2    0x0400
+#define ARMul_CP14_R10_MOE_IB  0x0004
+#define ARMul_CP14_R10_MOE_DB  0x0008
+#define ARMul_CP14_R10_MOE_BT  0x000c
+#define ARMul_CP15_R1_ENDIAN   0x0080
+#define ARMul_CP15_R1_ALIGN    0x0002
+#define ARMul_CP15_R5_X                0x0400
+#define ARMul_CP15_R5_ST_ALIGN 0x0001
+#define ARMul_CP15_R5_IMPRE    0x0406
+#define ARMul_CP15_R5_MMU_EXCPT        0x0400
+#define ARMul_CP15_DBCON_M     0x0100
+#define ARMul_CP15_DBCON_E1    0x000c
+#define ARMul_CP15_DBCON_E0    0x0003
+
 extern unsigned ARMul_CoProInit (ARMul_State * state);
 extern void ARMul_CoProExit (ARMul_State * state);
 extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
@@ -339,6 +380,10 @@ extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
                               ARMul_CDPs * cdp,
                               ARMul_CPReads * read, ARMul_CPWrites * write);
 extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);
+extern void XScale_check_memacc (ARMul_State * state, ARMword * address,
+                                int store);
+extern void XScale_set_fsr_far (ARMul_State * state, ARMword fsr, ARMword far);
+extern int XScale_debug_moe (ARMul_State * state, int moe);
 
 /***************************************************************************\
 *               Definitons of things in the host environment                *