This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ along with this program; if not, see <http://www.gnu.org/licenses/>. */
extern ARMword isize;
+extern int trace;
+extern int disas;
+extern int trace_funcs;
+extern void print_insn (ARMword);
/* Condition code values. */
#define EQ 0
#define CBIT (1L << 29)
#define VBIT (1L << 28)
#define SBIT (1L << 27)
+#define GE0 (1L << 16)
+#define GE1 (1L << 17)
+#define GE2 (1L << 18)
+#define GE3 (1L << 19)
#define IBIT (1L << 7)
#define FBIT (1L << 6)
#define IFBITS (3L << 6)
#define NEXTCYCLE(c)
/* Macros to extract parts of instructions. */
-#define DESTReg (BITS(12,15))
-#define LHSReg (BITS(16,19))
-#define RHSReg (BITS(0,3))
+#define DESTReg (BITS (12, 15))
+#define LHSReg (BITS (16, 19))
+#define RHSReg (BITS ( 0, 3))
#define DEST (state->Reg[DESTReg])
/* Determine if access to coprocessor CP is permitted.
The XScale has a register in CP15 which controls access to CP0 - CP13. */
-#define CP_ACCESS_ALLOWED(STATE, CP) \
- ( ((CP) >= 14) \
- || (! (STATE)->is_XScale) \
+#define CP_ACCESS_ALLOWED(STATE, CP) \
+ ( ((CP) >= 14) \
+ || (! (STATE)->is_XScale) \
|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
/* Macro to rotate n right by b bits. */
#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
/* Macros to store results of instructions. */
-#define WRITEDEST(d) if (DESTReg == 15) \
- WriteR15 (state, d) ; \
- else \
- DEST = d
-
-#define WRITESDEST(d) if (DESTReg == 15) \
- WriteSR15 (state, d) ; \
- else { \
- DEST = d ; \
- ARMul_NegZero (state, d) ; \
- }
-
-#define WRITEDESTB(d) if (DESTReg == 15) \
- WriteR15Branch (state, d) ; \
- else \
- DEST = d
+#define WRITEDEST(d) \
+ do \
+ { \
+ if (DESTReg == 15) \
+ WriteR15 (state, d); \
+ else \
+ DEST = d; \
+ } \
+ while (0)
+
+#define WRITESDEST(d) \
+ do \
+ { \
+ if (DESTReg == 15) \
+ WriteSR15 (state, d); \
+ else \
+ { \
+ DEST = d; \
+ ARMul_NegZero (state, d); \
+ } \
+ } \
+ while (0)
+
+#define WRITEDESTB(d) \
+ do \
+ { \
+ if (DESTReg == 15) \
+ WriteR15Load (state, d); \
+ else \
+ DEST = d; \
+ } \
+ while (0)
#define BYTETOBUS(data) ((data & 0xff) | \
((data & 0xff) << 8) | \
((data & 0xff) << 16) | \
((data & 0xff) << 24))
-#define BUSTOBYTE(address, data) \
- if (state->bigendSig) \
- temp = (data >> (((address ^ 3) & 3) << 3)) & 0xff ; \
- else \
- temp = (data >> ((address & 3) << 3)) & 0xff
+#define BUSTOBYTE(address, data) \
+ do \
+ { \
+ if (state->bigendSig) \
+ temp = (data >> (((address ^ 3) & 3) << 3)) & 0xff; \
+ else \
+ temp = (data >> ((address & 3) << 3)) & 0xff; \
+ } \
+ while (0)
#define LOADMULT(instr, address, wb) LoadMult (state, instr, address, wb)
#define LOADSMULT(instr, address, wb) LoadSMult (state, instr, address, wb)
/* Values for Emulate. */
-
#define STOP 0 /* stop */
#define CHANGEMODE 1 /* change mode */
#define ONCE 2 /* execute just one interation */
}
tdstate;
-/* Macros to scrutinize instructions. */
-#define UNDEF_Test
-#define UNDEF_Shift
-#define UNDEF_MSRPC
-#define UNDEF_MRSPC
-#define UNDEF_MULPCDest
-#define UNDEF_MULDestEQOp1
-#define UNDEF_LSRBPC
-#define UNDEF_LSRBaseEQOffWb
-#define UNDEF_LSRBaseEQDestWb
-#define UNDEF_LSRPCBaseWb
-#define UNDEF_LSRPCOffWb
-#define UNDEF_LSMNoRegs
-#define UNDEF_LSMPCBase
-#define UNDEF_LSMUserBankWb
-#define UNDEF_LSMBaseInListWb
-#define UNDEF_SWPPC
-#define UNDEF_CoProHS
-#define UNDEF_MCRPC
-#define UNDEF_LSCPCBaseWb
-#define UNDEF_UndefNotBounced
-#define UNDEF_ShortInt
-#define UNDEF_IllegalMode
-#define UNDEF_Prog32SigChange
-#define UNDEF_Data32SigChange
+#define t_resolved t_branch
+
+/* Macros to scrutinize instructions. The dummy do loop is to keep the compiler
+ happy when the statement is used in an otherwise empty else statement. */
+#define UNDEF_Test do { ; } while (0)
+#define UNDEF_Shift do { ; } while (0)
+#define UNDEF_MSRPC do { ; } while (0)
+#define UNDEF_MRSPC do { ; } while (0)
+#define UNDEF_MULPCDest do { ; } while (0)
+#define UNDEF_MULDestEQOp1 do { ; } while (0)
+#define UNDEF_LSRBPC do { ; } while (0)
+#define UNDEF_LSRBaseEQOffWb do { ; } while (0)
+#define UNDEF_LSRBaseEQDestWb do { ; } while (0)
+#define UNDEF_LSRPCBaseWb do { ; } while (0)
+#define UNDEF_LSRPCOffWb do { ; } while (0)
+#define UNDEF_LSMNoRegs do { ; } while (0)
+#define UNDEF_LSMPCBase do { ; } while (0)
+#define UNDEF_LSMUserBankWb do { ; } while (0)
+#define UNDEF_LSMBaseInListWb do { ; } while (0)
+#define UNDEF_SWPPC do { ; } while (0)
+#define UNDEF_CoProHS do { ; } while (0)
+#define UNDEF_MCRPC do { ; } while (0)
+#define UNDEF_LSCPCBaseWb do { ; } while (0)
+#define UNDEF_UndefNotBounced do { ; } while (0)
+#define UNDEF_ShortInt do { ; } while (0)
+#define UNDEF_IllegalMode do { ; } while (0)
+#define UNDEF_Prog32SigChange do { ; } while (0)
+#define UNDEF_Data32SigChange do { ; } while (0)
/* Prototypes for exported functions. */
extern unsigned ARMul_NthReg (ARMword, unsigned);
extern void ARMul_CoProDetach (ARMul_State *, unsigned);
extern ARMword read_cp15_reg (unsigned, unsigned, unsigned);
+extern unsigned DSPLDC4 (ARMul_State *, unsigned, ARMword, ARMword);
+extern unsigned DSPMCR4 (ARMul_State *, unsigned, ARMword, ARMword);
+extern unsigned DSPMRC4 (ARMul_State *, unsigned, ARMword, ARMword *);
+extern unsigned DSPSTC4 (ARMul_State *, unsigned, ARMword, ARMword *);
+extern unsigned DSPCDP4 (ARMul_State *, unsigned, ARMword);
+extern unsigned DSPMCR5 (ARMul_State *, unsigned, ARMword, ARMword);
+extern unsigned DSPMRC5 (ARMul_State *, unsigned, ARMword, ARMword *);
+extern unsigned DSPLDC5 (ARMul_State *, unsigned, ARMword, ARMword);
+extern unsigned DSPSTC5 (ARMul_State *, unsigned, ARMword, ARMword *);
+extern unsigned DSPCDP5 (ARMul_State *, unsigned, ARMword);
+extern unsigned DSPMCR6 (ARMul_State *, unsigned, ARMword, ARMword);
+extern unsigned DSPMRC6 (ARMul_State *, unsigned, ARMword, ARMword *);
+extern unsigned DSPCDP6 (ARMul_State *, unsigned, ARMword);