/* maverick.c -- Cirrus/DSP co-processor interface.
- Copyright (C) 2003, 2007 Free Software Foundation, Inc.
+ Copyright (C) 2003-2015 Free Software Foundation, Inc.
Contributed by Aldy Hernandez (aldyh@redhat.com).
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
-
+
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include <assert.h>
#include "armdefs.h"
#include "ansidecl.h"
#include "armemu.h"
-/*#define CIRRUS_DEBUG 1 /**/
+/*#define CIRRUS_DEBUG 1 */
#if CIRRUS_DEBUG
# define printfdbg printf
#else
exit (1);
}
-static unsigned
-DSPInit (ARMul_State * state)
-{
- ARMul_ConsolePrint (state, ", DSP present");
- return TRUE;
-}
-
unsigned
DSPMRC4 (ARMul_State * state ATTRIBUTE_UNUSED,
unsigned type ATTRIBUTE_UNUSED,
v = SubOverflow (DSPregs[SRC1_REG].lower.i, DSPregs[SRC2_REG].lower.i,
res);
/* carry */
- c = (NEG (a) && POS (b) ||
- (NEG (a) && POS (res)) || (POS (b) && POS (res)));
+ c = (NEG (a) && POS (b))
+ || (NEG (a) && POS (res))
+ || (POS (b) && POS (res));
*value = (n << 31) | (z << 30) | (c << 29) | (v << 28);
break;
v = ((NEG64 (a) && POS64 (b) && POS64 (res))
|| (POS64 (a) && NEG64 (b) && NEG64 (res)));
/* carry */
- c = (NEG64 (a) && POS64 (b) ||
- (NEG64 (a) && POS64 (res)) || (POS64 (b) && POS64 (res)));
+ c = (NEG64 (a) && POS64 (b))
+ || (NEG64 (a) && POS64 (res))
+ || (POS64 (b) && POS64 (res));
*value = (n << 31) | (z << 30) | (c << 29) | (v << 28);
break;
unsigned type,
ARMword instr)
{
- int opcode2;
-
- opcode2 = BITS (5,7);
-
switch (BITS (20,21))
{
case 0:
DSPregs[regnum].lower.i = reg_conv.ints[lsw_int_index];
DSPregs[regnum].upper.i = reg_conv.ints[msw_int_index];
}
-
-/* Compute LSW in a double and a long long. */
-
-void
-mv_compute_host_endianness (ARMul_State * state)
-{
- static union
- {
- long long ll;
- long ints[2];
- long i;
- double d;
- float floats[2];
- float f;
- } conv;
-
- /* Calculate where's the LSW in a 64bit int. */
- conv.ll = 45;
-
- if (conv.ints[0] == 0)
- {
- msw_int_index = 0;
- lsw_int_index = 1;
- }
- else
- {
- assert (conv.ints[1] == 0);
- msw_int_index = 1;
- lsw_int_index = 0;
- }
-
- /* Calculate where's the LSW in a double. */
- conv.d = 3.0;
-
- if (conv.ints[0] == 0)
- {
- msw_float_index = 0;
- lsw_float_index = 1;
- }
- else
- {
- assert (conv.ints[1] == 0);
- msw_float_index = 1;
- lsw_float_index = 0;
- }
-
- printfdbg ("lsw_int_index %d\n", lsw_int_index);
- printfdbg ("lsw_float_index %d\n", lsw_float_index);
-}