Remove i386_elf_emit_arch_note

[deliverable/binutils-gdb.git] / sim / arm / maverick.c

diff --git a/sim/arm/maverick.c b/sim/arm/maverick.c
index edead09112e429dcc438a2e97de24c572bb6ed3e..1b0dca9d33101b534a4e03dbfba2a1baef0d97a6 100644 (file)
--- a/sim/arm/maverick.c
+++ b/sim/arm/maverick.c
@@ -1,6 +1,5 @@
 /*  maverick.c -- Cirrus/DSP co-processor interface.
-    Copyright (C) 2003, 2007, 2008, 2009, 2010, 2011
-    Free Software Foundation, Inc.
+    Copyright (C) 2003-2015 Free Software Foundation, Inc.
     Contributed by Aldy Hernandez (aldyh@redhat.com).
  
     This program is free software; you can redistribute it and/or modify
@@ -21,7 +20,7 @@
 #include "ansidecl.h"
 #include "armemu.h"
 
-/*#define CIRRUS_DEBUG 1       /**/
+/*#define CIRRUS_DEBUG 1       */
 #if CIRRUS_DEBUG
 #  define printfdbg printf
 #else
@@ -98,13 +97,6 @@ cirrus_not_implemented (char * insn)
   exit (1);
 }
 
-static unsigned
-DSPInit (ARMul_State * state)
-{
-  ARMul_ConsolePrint (state, ", DSP present");
-  return TRUE;
-}
-
 unsigned
 DSPMRC4 (ARMul_State * state ATTRIBUTE_UNUSED,
         unsigned      type  ATTRIBUTE_UNUSED,
@@ -271,8 +263,9 @@ DSPMRC5 (ARMul_State * state ATTRIBUTE_UNUSED,
        v = SubOverflow (DSPregs[SRC1_REG].lower.i, DSPregs[SRC2_REG].lower.i,
                         res);
        /* carry */
-       c = (NEG (a) && POS (b) ||
-            (NEG (a) && POS (res)) || (POS (b) && POS (res)));
+       c = (NEG (a) && POS (b))
+         || (NEG (a) && POS (res))
+         || (POS (b) && POS (res));
 
        *value = (n << 31) | (z << 30) | (c << 29) | (v << 28);
        break;
@@ -302,8 +295,9 @@ DSPMRC5 (ARMul_State * state ATTRIBUTE_UNUSED,
        v = ((NEG64 (a) && POS64 (b) && POS64 (res))
             || (POS64 (a) && NEG64 (b) && NEG64 (res)));
        /* carry */
-       c = (NEG64 (a) && POS64 (b) ||
-            (NEG64 (a) && POS64 (res)) || (POS64 (b) && POS64 (res)));
+       c =    (NEG64 (a) && POS64 (b))
+           || (NEG64 (a) && POS64 (res))
+           || (POS64 (b) && POS64 (res));
 
        *value = (n << 31) | (z << 30) | (c << 29) | (v << 28);
        break;
@@ -1168,10 +1162,6 @@ DSPCDP6 (ARMul_State * state,
         unsigned      type,
         ARMword       instr)
 {
-   int opcode2;
-
-   opcode2 = BITS (5,7);
-
    switch (BITS (20,21))
      {
      case 0:
@@ -1240,52 +1230,3 @@ mv_setReg64int (int regnum, long long val)
   DSPregs[regnum].lower.i = reg_conv.ints[lsw_int_index];
   DSPregs[regnum].upper.i = reg_conv.ints[msw_int_index];
 }
-
-/* Compute LSW in a double and a long long.  */
-
-void
-mv_compute_host_endianness (ARMul_State * state)
-{
-  static union
-  {
-    long long ll;
-    long ints[2];
-    long i;
-    double d;
-    float floats[2];
-    float f;
-  } conv;
-
-  /* Calculate where's the LSW in a 64bit int.  */
-  conv.ll = 45;
-  
-  if (conv.ints[0] == 0)
-    {
-      msw_int_index = 0;
-      lsw_int_index = 1;
-    }
-  else
-    {
-      assert (conv.ints[1] == 0);
-      msw_int_index = 1;
-      lsw_int_index = 0;
-    }
-
-  /* Calculate where's the LSW in a double.  */
-  conv.d = 3.0;
-  
-  if (conv.ints[0] == 0)
-    {
-      msw_float_index = 0;
-      lsw_float_index = 1;
-    }
-  else
-    {
-      assert (conv.ints[1] == 0);
-      msw_float_index = 1;
-      lsw_float_index = 0;
-    }
-
-  printfdbg ("lsw_int_index   %d\n", lsw_int_index);
-  printfdbg ("lsw_float_index %d\n", lsw_float_index);
-}