/* Blackfin Core Event Controller (CEC) model.
- Copyright (C) 2010-2011 Free Software Foundation, Inc.
+ Copyright (C) 2010-2012 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc.
This file is part of simulators.
/* Read-only register. */
break;
case mmr_offset(ilat):
- dv_w1c_4 (&cec->ilat, value, 0);
+ dv_w1c_4 (&cec->ilat, value, 0xffee);
break;
case mmr_offset(iprio):
cec->iprio = (value & IVG_UNMASKABLE_B);
cec->ipend = IVG_RST_B | IVG_IRPTEN_B;
}
-const struct hw_descriptor dv_bfin_cec_descriptor[] = {
+const struct hw_descriptor dv_bfin_cec_descriptor[] =
+{
{"bfin_cec", bfin_cec_finish,},
{NULL, NULL},
};