Adjust gdb.mi/mi-sym-info.exp filename patterns.

[deliverable/binutils-gdb.git] / sim / bfin / dv-bfin_gpio.c

diff --git a/sim/bfin/dv-bfin_gpio.c b/sim/bfin/dv-bfin_gpio.c
index 7a6acb6e1641f57aca40a833957ae53aa1365e92..3daa551e128d7f3fc869f7e93690dc68cf0a517e 100644 (file)
--- a/sim/bfin/dv-bfin_gpio.c
+++ b/sim/bfin/dv-bfin_gpio.c
@@ -1,6 +1,6 @@
 /* Blackfin General Purpose Ports (GPIO) model
 
-   Copyright (C) 2010-2011 Free Software Foundation, Inc.
+   Copyright (C) 2010-2020 Free Software Foundation, Inc.
    Contributed by Analog Devices, Inc.
 
    This file is part of simulators.
@@ -76,6 +76,30 @@ bfin_gpio_forward_ints (struct hw *me, struct bfin_gpio *port)
   bfin_gpio_forward_int (me, port, port->maskb, 1);
 }
 
+static void
+bfin_gpio_forward_ouput (struct hw *me, struct bfin_gpio *port, bu32 odata)
+{
+  int pin, value, ovalue, bit;
+
+  for (pin = 0; pin < 16; ++pin)
+    {
+      bit = 1 << pin;
+
+      /* Make sure this is an output pin.  */
+      if (!(port->dir & bit))
+       continue;
+
+      /* Only signal port if the pin changes value.  */
+      value = !!(port->data & bit);
+      ovalue = !!(odata & bit);
+      if (value == ovalue)
+       continue;
+
+      HW_TRACE ((me, "outputting gpio %i changed to %i", pin, value));
+      hw_port_event (me, pin, value);
+    }
+}
+
 static unsigned
 bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space,
                           address_word addr, unsigned nr_bytes)
@@ -84,6 +108,11 @@ bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space,
   bu32 mmr_off;
   bu16 value;
   bu16 *valuep;
+  bu32 data = port->data;
+
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
+    return 0;
 
   value = dv_load_2 (source);
   mmr_off = addr - port->base;
@@ -91,8 +120,6 @@ bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space,
 
   HW_TRACE_WRITE ();
 
-  dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
-
   switch (mmr_off)
     {
     case mmr_offset(data):
@@ -128,12 +155,16 @@ bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space,
       break;
     default:
       dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
-      break;
+      return 0;
     }
 
   /* If updating masks, make sure we send updated port info.  */
   switch (mmr_off)
     {
+    case mmr_offset(dir):
+    case mmr_offset(data) ... mmr_offset(toggle):
+      bfin_gpio_forward_ouput (me, port, data);
+      break;
     case mmr_offset(maska) ... mmr_offset(maska_toggle):
       bfin_gpio_forward_int (me, port, port->maska, 0);
       break;
@@ -153,13 +184,15 @@ bfin_gpio_io_read_buffer (struct hw *me, void *dest, int space,
   bu32 mmr_off;
   bu16 *valuep;
 
+  /* Invalid access mode is higher priority than missing register.  */
+  if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
+    return 0;
+
   mmr_off = addr - port->base;
   valuep = (void *)((unsigned long)port + mmr_base() + mmr_off);
 
   HW_TRACE_READ ();
 
-  dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
-
   switch (mmr_off)
     {
     case mmr_offset(data):
@@ -189,7 +222,7 @@ bfin_gpio_io_read_buffer (struct hw *me, void *dest, int space,
       break;
     default:
       dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
-      break;
+      return 0;
     }
 
   return nr_bytes;
@@ -199,22 +232,22 @@ static const struct hw_port_descriptor bfin_gpio_ports[] =
 {
   { "mask_a", 0, 0, output_port, },
   { "mask_b", 1, 0, output_port, },
-  { "p0",     0, 0, input_port, },
-  { "p1",     1, 0, input_port, },
-  { "p2",     2, 0, input_port, },
-  { "p3",     3, 0, input_port, },
-  { "p4",     4, 0, input_port, },
-  { "p5",     5, 0, input_port, },
-  { "p6",     6, 0, input_port, },
-  { "p7",     7, 0, input_port, },
-  { "p8",     8, 0, input_port, },
-  { "p9",     9, 0, input_port, },
-  { "p10",   10, 0, input_port, },
-  { "p11",   11, 0, input_port, },
-  { "p12",   12, 0, input_port, },
-  { "p13",   13, 0, input_port, },
-  { "p14",   14, 0, input_port, },
-  { "p15",   15, 0, input_port, },
+  { "p0",     0, 0, bidirect_port, },
+  { "p1",     1, 0, bidirect_port, },
+  { "p2",     2, 0, bidirect_port, },
+  { "p3",     3, 0, bidirect_port, },
+  { "p4",     4, 0, bidirect_port, },
+  { "p5",     5, 0, bidirect_port, },
+  { "p6",     6, 0, bidirect_port, },
+  { "p7",     7, 0, bidirect_port, },
+  { "p8",     8, 0, bidirect_port, },
+  { "p9",     9, 0, bidirect_port, },
+  { "p10",   10, 0, bidirect_port, },
+  { "p11",   11, 0, bidirect_port, },
+  { "p12",   12, 0, bidirect_port, },
+  { "p13",   13, 0, bidirect_port, },
+  { "p14",   14, 0, bidirect_port, },
+  { "p15",   15, 0, bidirect_port, },
   { NULL, 0, 0, 0, },
 };