Canonicalize conversion operators

[deliverable/binutils-gdb.git] / sim / bfin / dv-bfin_pll.h

diff --git a/sim/bfin/dv-bfin_pll.h b/sim/bfin/dv-bfin_pll.h
index b63104a6f3fb4f968d0cdebc3c650e4fdc98b486..934b6b04727bd9e00c24e6bc4e11a5d29808f486 100644 (file)
--- a/sim/bfin/dv-bfin_pll.h
+++ b/sim/bfin/dv-bfin_pll.h
@@ -1,6 +1,6 @@
 /* Blackfin Phase Lock Loop (PLL) model.
 
-   Copyright (C) 2010-2011 Free Software Foundation, Inc.
+   Copyright (C) 2010-2017 Free Software Foundation, Inc.
    Contributed by Analog Devices, Inc.
 
    This file is part of simulators.
@@ -21,7 +21,4 @@
 #ifndef DV_BFIN_PLL_H
 #define DV_BFIN_PLL_H
 
-#define BFIN_MMR_PLL_BASE      0xFFC00000
-#define BFIN_MMR_PLL_SIZE      (4 * 6)
-
 #endif