/* Simulator for Analog Devices Blackfin processors.
- Copyright (C) 2005-2012 Free Software Foundation, Inc.
+ Copyright (C) 2005-2020 Free Software Foundation, Inc.
Contributed by Analog Devices, Inc. and Mike Frysinger.
This file is part of simulators.
#include "dv-bfin_cec.h"
#include "dv-bfin_dmac.h"
-static const MACH bfin_mach;
+static const SIM_MACH bfin_mach;
struct bfin_memory_layout {
address_word addr, len;
static void
bfin_model_hw_tree_init (SIM_DESC sd, SIM_CPU *cpu)
{
- const MODEL *model = CPU_MODEL (cpu);
+ const SIM_MODEL *model = CPU_MODEL (cpu);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
const struct bfin_board_data *board = STATE_BOARD_DATA (sd);
int mnum = MODEL_NUM (model);
};
static const struct bfrom bf54x_roms[] =
{
- BFROM (54x, 4, 0),
- BFROM (54x, 2, 0),
- BFROM (54x, 1, 0),
- BFROM (54x, 0, 0),
- BFROMA (0xffa14000, 54x_l1, 4, 0),
- BFROMA (0xffa14000, 54x_l1, 2, 0),
- BFROMA (0xffa14000, 54x_l1, 1, 0),
- BFROMA (0xffa14000, 54x_l1, 0, 0),
+ BFROM (54x, 4, 0x1000),
+ BFROM (54x, 2, 0x1000),
+ BFROM (54x, 1, 0x1000),
+ BFROM (54x, 0, 0x1000),
+ BFROMA (0xffa14000, 54x_l1, 4, 0x10000),
+ BFROMA (0xffa14000, 54x_l1, 2, 0x10000),
+ BFROMA (0xffa14000, 54x_l1, 1, 0x10000),
+ BFROMA (0xffa14000, 54x_l1, 0, 0x10000),
BFROM_STUB,
};
static const struct bfrom bf561_roms[] =
{
/* XXX: No idea what the actual wrap limit is here. */
- BFROM (561, 5, 0),
+ BFROM (561, 5, 0x1000),
BFROM_STUB,
};
static const struct bfrom bf59x_roms[] =
{
BFROM (59x, 1, 0x1000000),
BFROM (59x, 0, 0x1000000),
- BFROMA (0xffa10000, 59x_l1, 1, 0),
+ BFROMA (0xffa10000, 59x_l1, 1, 0x10000),
BFROM_STUB,
};
void
bfin_model_cpu_init (SIM_DESC sd, SIM_CPU *cpu)
{
- const MODEL *model = CPU_MODEL (cpu);
+ const SIM_MODEL *model = CPU_MODEL (cpu);
const struct bfin_model_data *mdata = CPU_MODEL_DATA (cpu);
int mnum = MODEL_NUM (model);
size_t idx;
{
}
-static const MODEL bfin_models[] =
+static const SIM_MODEL bfin_models[] =
{
#define P(n) { "bf"#n, & bfin_mach, MODEL_BF##n, NULL, bfin_model_init },
#include "proc_list.def"
{ 0, NULL, 0, NULL, NULL, }
};
-static const MACH_IMP_PROPERTIES bfin_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES bfin_imp_properties =
{
sizeof (SIM_CPU),
0,
};
-static const MACH bfin_mach =
+static const SIM_MACH bfin_mach =
{
"bfin", "bfin", MACH_BFIN,
32, 32, & bfin_models[0], & bfin_imp_properties,
bfin_prepare_run
};
-const MACH *sim_machs[] =
+const SIM_MACH *sim_machs[] =
{
& bfin_mach,
NULL