+Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-bits.h: Document ROTn macro.
+
+ * sim-endian.h (H2T): Handle 16 byte variables.
+
+ * sim-n-core.h (sim_core_read_unaligned_N): Return a dummy when an
+ error.
+
+ * sim-core.c: Do not generate sim_core_*_word.
+
+ * sim-n-core.h (sim_core_trace_N): Add line_nr argument.
+ (sim_core_write_aligned_N, sim_core_read_aligned_N): Update.
+
+ * sim-core.h (sim_core_read_unaligned_word,
+ sim_core_read_aligned_word, sim_core_read_word,
+ sim_core_write_unaligned_word, sim_core_write_aligned_word,
+ sim_core_write_word): Change to macros that map onto sim_core_*_N.
+
+Mon Oct 27 11:25:10 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim-n-endian.h: Add TAGS entrys for 16 byte versions.
+
+ * sim-endian.h: Disable 16 byte support.
+
+Mon Oct 27 12:00:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-endian.c (_SWAP_16): Define. Generate 126 bit swap code.
+
+ * sim-n-core.h (sim_core_trace_N): New function.
+ (sim_core_read_aligned_N, sim_core_write_aligned_N): Use,
+ (sim_core_read_unaligned_N): Do not retyrn bogus value wden error.
+
+ * sim-endian.h: Add 128 bit variant.
+
+ * sim-core.h, sim-core.c: Add 128 bit variant.
+
+ * sim-types.h: Add signed128 and unsigned128 types using a struct.
+
+Fri Oct 24 11:33:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-events.c (sim_events_process): Clear events->work_pending.
+ (sim_events_tickn, sim_events_tick): Accumulate, instead of
+ setting, nr_ticks_to_process.
+ (sim_events_preprocess): Allow nr_ticks_to_process to be non-zero
+ when the event queue isn't next.
+
+ * sim-events.h, sim-events.c (sim_events_slip): New function.
+
+Wed Oct 22 14:18:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-hload.c (sim_load): Pass lma_p==0 and do_load=sim_load.
+
+ * sim-utils.h, sim-load.c (sim_load_file): Add lma_p and do_load
+ arguments.
+
+Tue Oct 21 18:37:57 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * nrun.c (main): Remove useless test of name != NULL.
+ Exit if bfd_openr fails. Call bfd_check_format after bfd_openr.
+
+Tue Oct 21 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-fpu.c (EXPMAX): Type is unsigned.
+ (MIN_INT, MAX_INT): Type is signed64.
+ (i2fpu): Type of val is signed64.
+
+Tue Oct 21 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-profile.h (PROFILE_PC_BUCKET_SIZE): Treat a shift of zero as
+ a bucket size of zero.
+
+ * sim-profile.c (OPTION_PROFILE_PC_GRANULARITY,
+ OPTION_PROFILE_PC): Define.
+ (profile_option_handler): Add support for --profile-pc and
+ --profile-pc-granularity options.
+ (profile_pc_init): When possible, compute nr buckets from bucket
+ size.
+
+ * sim-profile.c (profile_pc_init): Align the profile-pc end
+ address with the profile-pc bucket size.
+
+ * sim-profile.h (PROFILE_PC_NR_BUCKETS): Rename PROFILE_PC_SIZE to
+ something less ambiguous.
+ (PROFILE_PC_BUCKET_SIZE): Ditto for PROFILE_PC_SAMPLE_SIZE.
+
+ * sim-profile.c (profile_pc_cleanup): New function. Move
+ profile_pc_uninstall code to here.
+ (profile_pc_uninstall): Call.
+ (profile_pc_init): Call.
+
+Mon Oct 20 17:23:58 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-profile.c (profile_print_pc): Dump pc profile to dmon.out
+ file using BSD gprof format.
+
+ * sim-bits.h (LSBIT, MSBIT, BIT): Force result to type
+ unsigned_word.
+ (LSBIT8, LSBIT16, LSBIT32, LSBIT64, MSBIT8, MSBIT16, MSBIT32,
+ MSBIT64): Force result to unsignedN.
+
+Thu Oct 16 11:38:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-alu.h (ALU16_BEGIN, ALU32_BEGIN, ALU64_BEGIN): Drop opening
+ brace from macro.
+ (ALU8_BEGIN, ALU8_SET, ALU8_ADD, ALU8_SUB, ALU8_NEGATE): Define.
+ (ALU16_ADD, ALU16_SUB, ALU16_NEGATE): Simplify arrithmetic.
+ (ALU32_ADD, ALU32_SUB, ALU32_NEGATE): Simplify arrithmetic.
+ (ALU64_ADD, ALU64_SUB, ALU64_NEGATE): Simplify arrithmetic.
+
+Wed Oct 15 09:24:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-core.h (struct _sim_core_mapping): Change free_buffer to
+ type void*.
+
+ * sim-core.c (sim_core_uninstall, new_sim_core_mapping,
+ sim_core_map_attach, sim_core_map_detach): Change free_buffer to
+ type void*.
+ (sim_core_attach): Rename buffer_freed to free_buffer, type
+ void*. Ensure that allocated buffer is alligned according to
+ region's address.
+
+Mon Oct 13 11:34:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-alu.h (ALU64_HAD_OVERFLOW): Define.
+ (ALU64_SUB): Define.
+
+ * Make-common.in (all): Build SIM_EXTRA_ALL first.
+ (.gdbinit): Remove dependencies, generate once per build.
+
+Tue Oct 14 19:20:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-n-core.h (sim_core_read_aligned_N,
+ sim_core_write_aligned_N): Make xaddr param type address_word not
+ unsigned_word.
+
+Fri Oct 3 09:49:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-fpu.h, sim-fpu.c: Rewrite. Change sim_fpu object to an
+ unpacked floating point struct. Pass sim_fpu object by reference.
+ Add preliminary support for rounding modes.
+
+Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Thu Oct 2 19:43:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * aclocal.m4 (sim-bitsize): Fix typo, WITH_TARGET_WORD_BITSIZE not
+ WITH_TARGET_BITSIZE.
+
+Thu Sep 25 23:20:20 1997 Felix Lee <flee@yin.cygnus.com>
+
+ * sim-profile.c (profile_print_core): label needs empty statement.
+
+Thu Sep 25 11:20:47 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
+
+ * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC
+ and zfree instead of xmalloc and free. Prevents warnings.
+
+Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Sep 24 17:23:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Make-common.in (SIM_BITSIZE): Assign from configured value.
+ (CONFIG_CFLAGS): Add SIM_BITSIZE.
+
+ * aclocal.m4 (--enable-sim-bitsize): Developer option for
+ controling the bitsize/msb of the target.
+
+Wed Sep 24 17:41:40 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
+
+ * Make-common.in: New files sim-break.c, sim-break.h.
+ * sim-base.h: Add point to breakpoint list to sim_state_base.
+ * sim-break.c sim-break.h: New modules that implement intrinsic
+ breakpoint support.
+ * sim-module.c: Add breakpoint module.
+
+Tue Sep 23 00:26:39 1997 Felix Lee <flee@yin.cygnus.com>
+
+ * sim-events.c (SIM_EVENTS_POLL_RATE): poll more often than once
+ an hour.
+ * sim-n-core.h (WITH_XOR_ENDIAN): MSVC barfs on
+ if (0) { 1 % 0; }
+ * sim-core.c (sim_core_xor_write_buffer): WITH_XOR_ENDIAN + 1.
+ (SIGBUS) define for Windows.
+ * sim-trace.c (trace_printf,debug_printf): added ALMOST_STDC.
+ * sim-resume.c: define SIGTRAP for windows.
+ * sim-xcat.h: use token pasting if ALMOST_STDC.
+
+Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Make-common.in (SIM_SCACHE, SIM_DEFAULT_MODEL): Assign
+ configured values.
+ (CONFIG_CFLAGS): Add same.
+
+Mon Sep 22 17:20:27 1997 Felix Lee <flee@cygnus.com>
+
+ * sim-types.h (SIGNED64): ##i64 when _MSC_VER, not _WIN32.
+ (SIGNED32): use ##i32.
+
+Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Sep 23 10:07:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * aclocal.m4 (sim-endian): Simplify logic determining [default]
+ endian of target.
+
+ * Make-common.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
+ SIM_HOSTENDIAN, SIM_RESERVED_BITS, SIM_ASSERT, SIM_FLOAT,
+ SIM_HARDWARE, SIM_INLINE, SIM_PACKAGES, SIM_REGPARM, SIM_SMP,
+ SIM_STDCALL, SIM_XOR_ENDIAN): Assign configured values.
+ (CONFIG_CFLAGS): Add same.
+
+ * aclocal.m4: Perform AC_SUBST on optional options.
+
+Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-config.h (WITH_DEFAULT_ALIGNMENT): Don't hardwire any alignment.
+
+ * sim-options.c (standard_option_handler): Typo in warning message.
+
+ * sim-base.h (STATE_MODEL): Make conditional on SIM_HAVE_MODEL.
+
+ * sim-profile.c (profile_print_insn): Check 0 .. MAX_INSN for any
+ insn count. Make count conditional on there being a valid
+ INSN_NAME.
+ (profile_pc_init): Make default PC profile frequency an arbitrary
+ 256.
+
+ * sim-base.h: Ditto.
+
+ * sim-profile.h (WITH_PROFILE_MODEL_P): Only enable modeling when
+ SIM_HAVE_MODEL.
+
+ * sim-model.h (struct MACH): Depreciate, to be replaced by bfd
+ archure struct.
+
+Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Sep 22 11:45:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * aclocal.m4 (sim_alignment): Simplify logic for selecting the
+ configured alignment.
+
Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
projects / deliverable / binutils-gdb.git / blobdiff