+Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-bits.h: Document ROTn macro.
+
+ * sim-endian.h (H2T): Handle 16 byte variables.
+
+ * sim-n-core.h (sim_core_read_unaligned_N): Return a dummy when an
+ error.
+
+ * sim-core.c: Do not generate sim_core_*_word.
+
+ * sim-n-core.h (sim_core_trace_N): Add line_nr argument.
+ (sim_core_write_aligned_N, sim_core_read_aligned_N): Update.
+
+ * sim-core.h (sim_core_read_unaligned_word,
+ sim_core_read_aligned_word, sim_core_read_word,
+ sim_core_write_unaligned_word, sim_core_write_aligned_word,
+ sim_core_write_word): Change to macros that map onto sim_core_*_N.
+
+Mon Oct 27 11:25:10 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim-n-endian.h: Add TAGS entrys for 16 byte versions.
+
+ * sim-endian.h: Disable 16 byte support.
+
+Mon Oct 27 12:00:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-endian.c (_SWAP_16): Define. Generate 126 bit swap code.
+
+ * sim-n-core.h (sim_core_trace_N): New function.
+ (sim_core_read_aligned_N, sim_core_write_aligned_N): Use,
+ (sim_core_read_unaligned_N): Do not retyrn bogus value wden error.
+
+ * sim-endian.h: Add 128 bit variant.
+
+ * sim-core.h, sim-core.c: Add 128 bit variant.
+
+ * sim-types.h: Add signed128 and unsigned128 types using a struct.
+
+Fri Oct 24 11:33:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-events.c (sim_events_process): Clear events->work_pending.
+ (sim_events_tickn, sim_events_tick): Accumulate, instead of
+ setting, nr_ticks_to_process.
+ (sim_events_preprocess): Allow nr_ticks_to_process to be non-zero
+ when the event queue isn't next.
+
+ * sim-events.h, sim-events.c (sim_events_slip): New function.
+
Wed Oct 22 14:18:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-hload.c (sim_load): Pass lma_p==0 and do_load=sim_load.