+Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-bits.h: Document ROTn macro.
+
+ * sim-endian.h (H2T): Handle 16 byte variables.
+
+ * sim-n-core.h (sim_core_read_unaligned_N): Return a dummy when an
+ error.
+
+ * sim-core.c: Do not generate sim_core_*_word.
+
+ * sim-n-core.h (sim_core_trace_N): Add line_nr argument.
+ (sim_core_write_aligned_N, sim_core_read_aligned_N): Update.
+
+ * sim-core.h (sim_core_read_unaligned_word,
+ sim_core_read_aligned_word, sim_core_read_word,
+ sim_core_write_unaligned_word, sim_core_write_aligned_word,
+ sim_core_write_word): Change to macros that map onto sim_core_*_N.
+
+Mon Oct 27 11:25:10 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim-n-endian.h: Add TAGS entrys for 16 byte versions.
+
+ * sim-endian.h: Disable 16 byte support.
+
+Mon Oct 27 12:00:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-endian.c (_SWAP_16): Define. Generate 126 bit swap code.
+
+ * sim-n-core.h (sim_core_trace_N): New function.
+ (sim_core_read_aligned_N, sim_core_write_aligned_N): Use,
+ (sim_core_read_unaligned_N): Do not retyrn bogus value wden error.
+
+ * sim-endian.h: Add 128 bit variant.
+
+ * sim-core.h, sim-core.c: Add 128 bit variant.
+
+ * sim-types.h: Add signed128 and unsigned128 types using a struct.
+
+Fri Oct 24 11:33:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-events.c (sim_events_process): Clear events->work_pending.
+ (sim_events_tickn, sim_events_tick): Accumulate, instead of
+ setting, nr_ticks_to_process.
+ (sim_events_preprocess): Allow nr_ticks_to_process to be non-zero
+ when the event queue isn't next.
+
+ * sim-events.h, sim-events.c (sim_events_slip): New function.
+
+Wed Oct 22 14:18:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-hload.c (sim_load): Pass lma_p==0 and do_load=sim_load.
+
+ * sim-utils.h, sim-load.c (sim_load_file): Add lma_p and do_load
+ arguments.
+
+Tue Oct 21 18:37:57 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * nrun.c (main): Remove useless test of name != NULL.
+ Exit if bfd_openr fails. Call bfd_check_format after bfd_openr.
+
+Tue Oct 21 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-fpu.c (EXPMAX): Type is unsigned.
+ (MIN_INT, MAX_INT): Type is signed64.
+ (i2fpu): Type of val is signed64.
+
+Tue Oct 21 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-profile.h (PROFILE_PC_BUCKET_SIZE): Treat a shift of zero as
+ a bucket size of zero.
+
+ * sim-profile.c (OPTION_PROFILE_PC_GRANULARITY,
+ OPTION_PROFILE_PC): Define.
+ (profile_option_handler): Add support for --profile-pc and
+ --profile-pc-granularity options.
+ (profile_pc_init): When possible, compute nr buckets from bucket
+ size.
+
+ * sim-profile.c (profile_pc_init): Align the profile-pc end
+ address with the profile-pc bucket size.
+
+ * sim-profile.h (PROFILE_PC_NR_BUCKETS): Rename PROFILE_PC_SIZE to
+ something less ambiguous.
+ (PROFILE_PC_BUCKET_SIZE): Ditto for PROFILE_PC_SAMPLE_SIZE.
+
+ * sim-profile.c (profile_pc_cleanup): New function. Move
+ profile_pc_uninstall code to here.
+ (profile_pc_uninstall): Call.
+ (profile_pc_init): Call.
+
+Mon Oct 20 17:23:58 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-profile.c (profile_print_pc): Dump pc profile to dmon.out
+ file using BSD gprof format.
+
+ * sim-bits.h (LSBIT, MSBIT, BIT): Force result to type
+ unsigned_word.
+ (LSBIT8, LSBIT16, LSBIT32, LSBIT64, MSBIT8, MSBIT16, MSBIT32,
+ MSBIT64): Force result to unsignedN.
+
+Thu Oct 16 11:38:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-alu.h (ALU16_BEGIN, ALU32_BEGIN, ALU64_BEGIN): Drop opening
+ brace from macro.
+ (ALU8_BEGIN, ALU8_SET, ALU8_ADD, ALU8_SUB, ALU8_NEGATE): Define.
+ (ALU16_ADD, ALU16_SUB, ALU16_NEGATE): Simplify arrithmetic.
+ (ALU32_ADD, ALU32_SUB, ALU32_NEGATE): Simplify arrithmetic.
+ (ALU64_ADD, ALU64_SUB, ALU64_NEGATE): Simplify arrithmetic.
+
+Wed Oct 15 09:24:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-core.h (struct _sim_core_mapping): Change free_buffer to
+ type void*.
+
+ * sim-core.c (sim_core_uninstall, new_sim_core_mapping,
+ sim_core_map_attach, sim_core_map_detach): Change free_buffer to
+ type void*.
+ (sim_core_attach): Rename buffer_freed to free_buffer, type
+ void*. Ensure that allocated buffer is alligned according to
+ region's address.
+
+Mon Oct 13 11:34:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-alu.h (ALU64_HAD_OVERFLOW): Define.
+ (ALU64_SUB): Define.
+
+ * Make-common.in (all): Build SIM_EXTRA_ALL first.
+ (.gdbinit): Remove dependencies, generate once per build.
+
Tue Oct 14 19:20:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-n-core.h (sim_core_read_aligned_N,
projects / deliverable / binutils-gdb.git / blobdiff