$(srccgen)/ifield.scm $(srccgen)/iformat.scm \
$(srccgen)/operand.scm $(srccgen)/insn.scm \
$(srccgen)/sim.scm
-CGEN_CPU_SCM = $(srccgen)/sim-cpu.scm $(srccgen)/sem-ccode.scm
+CGEN_CPU_SCM = $(srccgen)/sim-cpu.scm $(srccgen)/sim-model.scm \
+ $(srccgen)/sem-ccode.scm
CGEN_DECODE_SCM = $(srccgen)/decode.scm
# Various choices for which cpu specific files to generate.