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[deliverable/binutils-gdb.git] / sim / common / Make-common.in

diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index 837bbd216dc0a947d299bda94ce59bec6dfce3bb..b8e98eb9dfb0de41fbff5e92f5464871c7789e86 100644 (file)
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -1,5 +1,5 @@
 # Makefile fragment for common parts of all simulators.
-# Copyright (C) 1997, 1998 Free Software Foundation, Inc.
+# Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
 # Contributed by Cygnus Support.
 
 # This program is free software; you can redistribute it and/or modify
@@ -176,8 +176,11 @@ SIM_NEW_COMMON_OBJS = \
        \
        $(SIM_HW_OBJS) \
 
+# Add this to SIM_EXTRA_DEPS.
 CGEN_INCLUDE_DEPS = \
        $(srccom)/cgen-cpu.h \
+       $(srccom)/cgen-defs.h \
+       $(srccom)/cgen-engine.h \
        $(srccom)/cgen-scache.h \
        $(srccom)/cgen-sim.h \
        $(srccom)/cgen-trace.h \
@@ -308,6 +311,10 @@ sim_main_headers = \
        tconfig.h \
        $(SIM_EXTRA_DEPS)
 
+# Exported version of sim_main_headers.
+SIM_MAIN_DEPS = \
+       $(sim_main_headers)
+
 sim-assert_h = $(srccom)/sim-assert.h
 sim-endian_h = $(srccom)/sim-endian.h
 sim-n-endian_h = $(srccom)/sim-n-endian.h
@@ -320,9 +327,6 @@ sim-n-core_h = $(srccom)/sim-n-core.h
 sim-engine_h = $(srccom)/sim-engine.h
 sim-events_h = $(srccom)/sim-events.h
 sim-fpu_h = $(srccom)/sim-fpu.h
-# start-sanitize-gxsim
-sim-gx_h = $(srccom)/sim-gx.h
-# end-sanitize-gxsim
 sim-io_h = $(srccom)/sim-io.h
 sim-options_h = $(srccom)/sim-options.h
 sim-break_h = $(srccom)/sim-break.h
@@ -391,17 +395,6 @@ sim-fpu.o: $(srccom)/sim-fpu.c $(sim-fpu_h) \
          $(SIM_EXTRA_DEPS)
        $(CC) -c $(srccom)/sim-fpu.c $(ALL_CFLAGS)
 
-# start-sanitize-gxsim
-sim-gx.o: $(srccom)/sim-gx.c $(sim_main_headers) \
-         $(sim-gx_h) \
-         $(SIM_EXTRA_DEPS)
-       $(CC) -c $(srccom)/sim-gx.c $(ALL_CFLAGS)
-
-sim-gx-run.o: $(srccom)/sim-gx-run.c $(sim_main_headers) \
-         $(sim-gx_h) \
-         $(SIM_EXTRA_DEPS)
-       $(CC) -c $(srccom)/sim-gx-run.c $(ALL_CFLAGS)
-# end-sanitize-gxsim
 
 sim-hload.o: $(srccom)/sim-hload.c $(sim-assert_h) \
          $(srcroot)/include/remote-sim.h \
@@ -558,6 +551,14 @@ nrun.o: $(srccom)/nrun.c config.h tconfig.h \
 
 # CGEN support.
 
+# For use in Makefile.in for cpu-specific files.
+CGEN_MAIN_CPU_DEPS = \
+       $(SIM_MAIN_DEPS) \
+       $(CGEN_INCLUDE_DEPS) \
+       $(srccom)/cgen-ops.h \
+       $(srccom)/cgen-mem.h \
+       $(srccom)/cgen-fpu.h
+
 cgen-run.o: $(srccom)/cgen-run.c $(sim_main_headers)
        $(CC) -c $(srccom)/cgen-run.c $(ALL_CFLAGS)
 
@@ -567,6 +568,12 @@ cgen-scache.o: $(srccom)/cgen-scache.c $(sim_main_headers)
 cgen-trace.o: $(srccom)/cgen-trace.c $(sim_main_headers)
        $(CC) -c $(srccom)/cgen-trace.c $(ALL_CFLAGS)
 
+cgen-fpu.o: $(srccom)/cgen-fpu.c $(sim_main_headers) $(sim-fpu_h)
+       $(CC) -c $(srccom)/cgen-fpu.c $(ALL_CFLAGS)
+
+cgen-accfp.o: $(srccom)/cgen-accfp.c $(sim_main_headers) $(sim-fpu_h)
+       $(CC) -c $(srccom)/cgen-accfp.c $(ALL_CFLAGS)
+
 cgen-utils.o: $(srccom)/cgen-utils.c $(sim_main_headers) \
          $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h $(srccom)/cgen-engine.h
        $(CC) -c $(srccom)/cgen-utils.c $(ALL_CFLAGS)
@@ -638,61 +645,5 @@ stamp-h: config.in config.status
 .gdbinit: # config.status $(srccom)/gdbinit.in
        CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status
 
-# start-sanitize-cygnus
-
-# CGEN support
-
-CGENDIR = @cgendir@
-CGEN = @cgen@
-CGENFLAGS = -v
-srccgen = $(CGENDIR)
-
-CGEN_MAIN_SCM = $(srccgen)/cos.scm $(srccgen)/utils.scm \
-       $(srccgen)/attr.scm $(srccgen)/enum.scm $(srccgen)/types.scm \
-       $(srccgen)/utils-cgen.scm $(srccgen)/cpu.scm \
-       $(srccgen)/mode.scm $(srccgen)/mach.scm \
-       $(srccgen)/model.scm $(srccgen)/hardware.scm \
-       $(srccgen)/ifield.scm $(srccgen)/iformat.scm \
-       $(srccgen)/operand.scm $(srccgen)/insn.scm \
-       $(srccgen)/rtl.scm $(srccgen)/sim.scm
-CGEN_ARCH_SCM = $(srccgen)/sim-arch.scm
-CGEN_CPU_SCM = $(srccgen)/sim-cpu.scm $(srccgen)/sim-model.scm
-CGEN_DECODE_SCM = $(srccgen)/sim-decode.scm
-
-# Various choices for which cpu specific files to generate.
-CGEN_CPU_EXTR = -E tmp-ext.c1
-CGEN_CPU_READ = -R tmp-read.c1
-CGEN_CPU_WRITE = -W tmp-write.c1
-CGEN_CPU_SEM = -S tmp-sem.c1
-CGEN_CPU_SEMSW = -X tmp-semsw.c1
-
-CGEN_FLAGS_TO_PASS = \
-       CGEN=$(CGEN) \
-       CGENFLAGS=$(CGENFLAGS)
-
-# We store the generated files in the source directory until we decide to
-# ship a Scheme interpreter with gdb/binutils.  Maybe we never will.
-
-cgen-arch: force
-       $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
-               $(CGEN) $(CGENDIR) $(CGENFLAGS) \
-               $(arch) "$(FLAGS)" ignored ignored ignored ignored
-
-cgen-cpu: force
-       $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \
-               $(CGEN) $(CGENDIR) $(CGENFLAGS) \
-               $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-cgen-decode: force
-       $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \
-               $(CGEN) $(CGENDIR) $(CGENFLAGS) \
-               $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" ignored
-
-cgen-cpu-decode: force
-       $(SHELL) $(srccom)/cgen.sh cpu-decode $(srcdir) \
-               $(CGEN) $(CGENDIR) $(CGENFLAGS) \
-               $(arch) "$(FLAGS)" $(cpu) $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-# end-sanitize-cygnus
 
 ## End COMMON_POST_CONFIG_FRAG