-/* This file is part of the program psim.
+/* The common simulator framework for GDB, the GNU Debugger.
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
+ Copyright 2002-2017 Free Software Foundation, Inc.
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
+ Contributed by Andrew Cagney and Red Hat.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
+ This file is part of GDB.
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
-#ifndef _PSIM_CONFIG_H_
-#define _PSIM_CONFIG_H_
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
-/* endianness of the host/target:
- If the build process is aware (at compile time) of the endianness
- of the host/target it is able to eliminate slower generic endian
- handling code.
+#ifndef SIM_CONFIG_H
+#define SIM_CONFIG_H
- Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
-#ifndef WITH_HOST_BYTE_ORDER
-#define WITH_HOST_BYTE_ORDER 0 /*unknown*/
-#endif
+/* Host dependant:
-#ifndef WITH_TARGET_BYTE_ORDER
-#define WITH_TARGET_BYTE_ORDER 0 /*unknown*/
+ The CPP below defines information about the compilation host. In
+ particular it defines the macro's:
+
+ HOST_BYTE_ORDER The byte order of the host. Could be BFD_ENDIAN_LITTLE
+ or BFD_ENDIAN_BIG.
+
+ */
+
+#ifdef WORDS_BIGENDIAN
+# define HOST_BYTE_ORDER BFD_ENDIAN_BIG
+#else
+# define HOST_BYTE_ORDER BFD_ENDIAN_LITTLE
#endif
-extern int current_host_byte_order;
-#define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
- ? WITH_HOST_BYTE_ORDER \
- : current_host_byte_order)
-extern int current_target_byte_order;
-#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
- ? WITH_TARGET_BYTE_ORDER \
- : current_target_byte_order)
+/* Until devices and tree properties are sorted out, tell sim-config.c
+ not to call the tree_find_foo fns. */
+#define WITH_TREE_PROPERTIES 0
-/* XOR endian.
+/* Endianness of the target.
+
+ Possible values are BFD_ENDIAN_UNKNOWN, BFD_ENDIAN_LITTLE, or BFD_ENDIAN_BIG. */
+
+#ifndef WITH_TARGET_BYTE_ORDER
+#define WITH_TARGET_BYTE_ORDER BFD_ENDIAN_UNKNOWN
+#endif
- In addition to the above, the simulator can support the's horrible
- XOR endian mode (for instance implemented by the PowerPC). This
- feature makes it possible to control the endian mode of a processor
- using the MSR. */
+#ifndef WITH_DEFAULT_TARGET_BYTE_ORDER
+#define WITH_DEFAULT_TARGET_BYTE_ORDER BFD_ENDIAN_UNKNOWN
+#endif
-/* #define WITH_XOR_ENDIAN 8 */
+extern enum bfd_endian current_target_byte_order;
+#define CURRENT_TARGET_BYTE_ORDER \
+ (WITH_TARGET_BYTE_ORDER != BFD_ENDIAN_UNKNOWN \
+ ? WITH_TARGET_BYTE_ORDER : current_target_byte_order)
-/* Intel host BSWAP support:
+/* XOR endian.
+
+ In addition to the above, the simulator can support the horrible
+ XOR endian mode (as found in the PowerPC and MIPS ISA). See
+ sim-core for more information.
- Whether to use bswap on the 486 and pentiums rather than the 386
- sequence that uses xchgb/rorl/xchgb */
-#ifndef WITH_BSWAP
-#define WITH_BSWAP 0
+ If WITH_XOR_ENDIAN is non-zero, it specifies the number of bytes
+ potentially involved in the XOR munge. A typical value is 8. */
+
+#ifndef WITH_XOR_ENDIAN
+#define WITH_XOR_ENDIAN 0
#endif
Sets a limit on the number of processors that can be simulated. If
WITH_SMP is set to zero (0), the simulator is restricted to
- suporting only on processor (and as a consequence leaves the SMP
+ suporting only one processor (and as a consequence leaves the SMP
code out of the build process).
The actual number of processors is taken from the device
/options/smp@<nr-cpu> */
-#if defined (WITH_SMP)
-
-#if WITH_SMP
+#if defined (WITH_SMP) && (WITH_SMP > 0)
#define MAX_NR_PROCESSORS WITH_SMP
-#else
-#define MAX_NR_PROCESSORS 1
#endif
+#ifndef MAX_NR_PROCESSORS
+#define MAX_NR_PROCESSORS 1
#endif
+/* Size of target word, address and OpenFirmware Cell:
-/* Word size of host/target:
+ The target word size is determined by the natural size of its
+ reginsters.
- Set these according to your host and target requirements. At this
- point in time, I've only compiled (not run) for a 64bit and never
- built for a 64bit host. This will always remain a compile time
- option */
+ On most hosts, the address and cell are the same size as a target
+ word. */
#ifndef WITH_TARGET_WORD_BITSIZE
-#define WITH_TARGET_WORD_BITSIZE 32 /* compiled only */
+#define WITH_TARGET_WORD_BITSIZE 32
+#endif
+
+#ifndef WITH_TARGET_ADDRESS_BITSIZE
+#define WITH_TARGET_ADDRESS_BITSIZE WITH_TARGET_WORD_BITSIZE
+#endif
+
+#ifndef WITH_TARGET_CELL_BITSIZE
+#define WITH_TARGET_CELL_BITSIZE WITH_TARGET_WORD_BITSIZE
#endif
-#ifndef WITH_HOST_WORD_BITSIZE
-#define WITH_HOST_WORD_BITSIZE 32 /* 64bit ready? */
+#ifndef WITH_TARGET_FLOATING_POINT_BITSIZE
+#define WITH_TARGET_FLOATING_POINT_BITSIZE 64
+#endif
+
+
+
+/* Most significant bit of target:
+
+ Set this according to your target's bit numbering convention. For
+ the PowerPC it is zero, for many other targets it is 31 or 63.
+
+ For targets that can both have either 32 or 64 bit words and number
+ MSB as 31, 63. Define this to be (WITH_TARGET_WORD_BITSIZE - 1) */
+
+#ifndef WITH_TARGET_WORD_MSB
+#define WITH_TARGET_WORD_MSB 0
#endif
expect to see (VEA includes things like coherency and the time
base) while OEA is what an operating system expects to see. By
setting these to specific values, the build process is able to
- eliminate non relevent environment code
+ eliminate non relevent environment code.
- CURRENT_ENVIRONMENT specifies which of vea or oea is required for
- the current runtime. */
+ STATE_ENVIRONMENT(sd) specifies which of vea or oea is required for
+ the current runtime.
-#if defined (WITH_ENVIRONMENT)
+ ALL_ENVIRONMENT is used during configuration as a value for
+ WITH_ENVIRONMENT to indicate the choice is runtime selectable.
+ The default is then USER_ENVIRONMENT [since allowing the user to choose
+ the default at configure time seems like featuritis and since people using
+ OPERATING_ENVIRONMENT have more to worry about than selecting the
+ default].
+ ALL_ENVIRONMENT is also used to set STATE_ENVIRONMENT to the
+ "uninitialized" state. */
-#define USER_ENVIRONMENT 1
-#define VIRTUAL_ENVIRONMENT 2
-#define OPERATING_ENVIRONMENT 3
+enum sim_environment {
+ ALL_ENVIRONMENT,
+ USER_ENVIRONMENT,
+ VIRTUAL_ENVIRONMENT,
+ OPERATING_ENVIRONMENT
+};
-extern int current_environment;
-#define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
- ? WITH_ENVIRONMENT \
- : current_environment)
-
-#endif
+/* To be prepended to simulator calls with absolute file paths and
+ chdir:ed at startup. */
+extern char *simulator_sysroot;
-
-
-/* Callback/Default Memory.
+/* Callback & Modulo Memory.
Core includes a builtin memory type (raw_memory) that is
implemented using an array. raw_memory does not require any
additional functions etc.
Callback memory is where the core calls a core device for the data
- it requires.
+ it requires. Callback memory can be layered using priorities.
- Default memory is an extenstion of this where for addresses that do
- not map into either a callback or core memory range a default map
- can be used.
+ Modulo memory is a variation on raw_memory where ADDRESS & (MODULO
+ - 1) is used as the index into the memory array.
- The OEA model uses callback memory for devices and default memory
- for buses.
+ The OEA model uses callback memory for devices.
The VEA model uses callback memory to capture `page faults'.
- While it may be possible to eliminate callback/default memory (and
- hence also eliminate an additional test per memory fetch) it
- probably is not worth the effort.
-
BTW, while raw_memory could have been implemented as a callback,
profiling has shown that there is a biger win (at least for the
x86) in eliminating a function call for the most common
(raw_memory) case. */
-#ifndef WITH_CALLBACK_MEMORY
-#define WITH_CALLBACK_MEMORY 1
-#endif
+/* Alignment:
+ A processor architecture may or may not handle miss aligned
+ transfers.
-/* Alignment:
+ As alternatives: both little and big endian modes take an exception
+ (STRICT_ALIGNMENT); big and little endian models handle mis aligned
+ transfers (NONSTRICT_ALIGNMENT); or the address is forced into
+ alignment using a mask (FORCED_ALIGNMENT).
- The PowerPC may or may not handle miss aligned transfers. An
- implementation normally handles miss aligned transfers in big
- endian mode but generates an exception in little endian mode.
+ Mixed alignment should be specified when the simulator needs to be
+ able to change the alignment requirements on the fly (eg for
+ bi-endian support). */
- This model. Instead allows both little and big endian modes to
- either take exceptions or handle miss aligned transfers.
+enum sim_alignments {
+ MIXED_ALIGNMENT,
+ NONSTRICT_ALIGNMENT,
+ STRICT_ALIGNMENT,
+ FORCED_ALIGNMENT,
+};
+
+extern enum sim_alignments current_alignment;
+
+#if !defined (WITH_ALIGNMENT)
+#define WITH_ALIGNMENT 0
+#endif
+
+#if !defined (WITH_DEFAULT_ALIGNMENT)
+#define WITH_DEFAULT_ALIGNMENT 0 /* fatal */
+#endif
- If 0 is specified then for big-endian mode miss alligned accesses
- are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
- processor will fault on them (STRICT_ALIGNMENT). */
-#if defined (WITH_ALIGNMENT)
-#define NONSTRICT_ALIGNMENT 1
-#define STRICT_ALIGNMENT 2
-extern int current_alignment;
#define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
? WITH_ALIGNMENT \
: current_alignment)
-#endif
-
/* Floating point suport:
#endif
-
-/* Debugging:
-
- Control the inclusion of debugging code. */
-
-/* Include the tracing code. Disabling this eliminates all tracing
- code */
-
-#ifndef WITH_TRACE
-#define WITH_TRACE 1
-#endif
-
-
-/* include code that checks assertions scattered through out the
- program */
-
-#ifndef WITH_ASSERT
-#define WITH_ASSERT 1
-#endif
-
-
/* Whether to check instructions for reserved bits being set */
/* #define WITH_RESERVED_BITS 1 */
? WITH_MODEL \
: current_model)
-#ifndef WITH_DEFAULT_MODEL
-#define WITH_DEFAULT_MODEL DEFAULT_MODEL
-#endif
-
#define MODEL_ISSUE_IGNORE (-1)
#define MODEL_ISSUE_PROCESS 1
#define DONT_USE_STDIO 2
#define DO_USE_STDIO 1
-#ifndef WITH_STDIO
-#define WITH_STDIO 0
-#endif
-
extern int current_stdio;
#define CURRENT_STDIO (WITH_STDIO \
? WITH_STDIO \
-/* Specify that configured calls pass parameters in registers when the
- convention is that they are placed on the stack */
-
-#ifndef WITH_REGPARM
-#define WITH_REGPARM 0
-#endif
+/* Set the default state configuration, before parsing argv. */
-/* Specify that configured calls use an alternative calling mechanism */
+extern void sim_config_default (SIM_DESC sd);
-#ifndef WITH_STDCALL
-#define WITH_STDCALL 0
-#endif
+/* Complete and verify the simulator configuration. */
+extern SIM_RC sim_config (SIM_DESC sd);
-/* complete/verify/print the simulator configuration */
-
-
-/* For prefered_target_byte_order arugment */
-
-#if defined (bfd_little_endian)
-#define PREFERED_TARGET_BYTE_ORDER(IMAGE) ((IMAGE) == NULL \
- ? 0 \
- : bfd_little_endian(IMAGE) \
- ? LITTLE_ENDIAN \
- : BIG_ENDIAN)
-#else
-#define PREFERED_TARGET_BYTE_ORDER(IMAGE) ((IMAGE) == NULL \
- ? 0 \
- : !(IMAGE)->xvec->byteorder_big_p \
- ? LITTLE_ENDIAN \
- : BIG_ENDIAN)
-#endif
-
-
-extern void sim_config (SIM_DESC sd,
- int prefered_target_byte_order);
+/* Print the simulator configuration. */
extern void print_sim_config (SIM_DESC sd);
-#endif /* _PSIM_CONFIG_H */
+#endif
projects / deliverable / binutils-gdb.git / blobdiff