+2015-11-15 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Delete endian.o.
+ (INCLUDE): Delete endian.c.
+ * configure.ac (SIM_AC_OPTION_ENDIAN): Declare little endian.
+ (SIM_AC_OPTION_ALIGNMENT): release unaligned loads.
+ * configure: Regenerate.
+ * cr16_sim.h (IMAP_BLOCK_SIZE, DMAP_BLOCK_SIZE, SEGMENT_SIZE,
+ IMEM_SEGMENTS, DMEM_SEGMENTS, UMEM_SEGMENTS, cr16_memory, dmem_addr,
+ imem_addr, decode_pc, get_longword, get_word, write_word,
+ write_longword, READ_16): Delete.
+ (struct _state): Delete mem member.
+ (endian.c): Delete include.
+ (SB, RB, SW, RW, SLW): Rewrite to use sim-core functions.
+ (get_longword): New function.
+ (RLW): Rewrite to use get_longword.
+ * endian.c: Delete file.
+ * interp.c (map_memory, sim_size, last_segname, last_from, last_to,
+ IMAP0_OFFSET, DMAP0_OFFSET, DMAP2_SHADDOW, DMAP2_OFFSET,
+ dmap_register, imap_register, sim_cr16_translate_dmap_addr,
+ sim_cr16_translate_imap_addr, sim_cr16_translate_addr, map_memory,
+ xfer_mem, sim_write, sim_read, dmem_addr, imem_addr): Delete.
+ (do_run): Delete iaddr and replace imem_addr/get_longword with RW.
+ (sim_open): Call sim_do_commandf. Delete sim_size call.
+ (sim_resume): Delete iaddr and replace imem_addr/get_longword with
+ RLW.
+ * simops.c (MEMPTR): Rewrite to use sim_core_trans_addr.
+
+2015-11-15 Mike Frysinger <vapier@gentoo.org>
+
+ * cr16_sim.h (struct simops): Add SIM_DESC and SIM_CPU to func args.
+ (SET_CREG, SET_HW_CREG, SET_PSR_BIT): Pass sd and cpu to move_to_cr.
+ (dmem_addr, imem_addr, move_to_cr): Add SIM_DESC and SIM_CPU args.
+ (RB, SW, RW, SLW, RLW): Pass sd and cpu to dmem_addr.
+ * endian.c: Change cr16_sim.h include to sim-main.h.
+ * gencode.c: Likewise. Add SIM_DESC and SIM_CPU args to all OPs.
+ * interp.c (lookup_hash, map_memory, do_run, dmap_register,
+ imap_register, sim_cr16_translate_dmap_addr, xfer_mem,
+ sim_cr16_translate_imap_addr, sim_cr16_translate_addr): Add
+ SIM_DESC and SIM_CPU args and adjust all callers.
+ (trace_sd): Delete.
+ (sim_open): Do not assign trace_sd.
+ (sim_resume, sim_create_inferior): Set up cpu from the first one
+ in sd.
+ (cr16_reg_store): Get sim state from cpu.
+ * simops.c (move_to_cr): Add SIM_DESC and SIM_CPU args.
+ (trace_input_func, trace_input, do_trace_output_finish,
+ do_trace_output_finish, trace_output_40, trace_output_32,
+ trace_output_16, trace_output_void, trace_output_flag): Add
+ SIM_DESC arg.
+ (trace_input_func): Likewise. Change trace_sd to sd.
+ (OP_*): Add SIM_DESC and SIM_CPU args to all OP funcs.
+
+2015-11-15 Mike Frysinger <vapier@gentoo.org>
+
+ * cr16_sim.h (get_longlong, write_longlong, WRITE_16, READ_64,
+ WRITE_64): Delete.
+ * endian.c (get_longlong, write_longlong): Likewise.
+
+2015-11-15 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Add sim-reg.o.
+ * interp.c (cr16_reg_fetch, cr16_reg_store): Add prototypes.
+ (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
+ (cr16_extract_unsigned_integer, cr16_store_unsigned_integer):
+ New helper functions.
+ (sim_fetch_register): Rename to ...
+ (cr16_reg_fetch): ... this. Use cr16_store_unsigned_integer
+ to write out the updated register values.
+ (sim_store_register): Rename to ...
+ (cr16_reg_store): ... this. Use cr16_extract_unsigned_integer
+ to read in the updated register values.
+
+2015-11-15 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_open): Delete sim_create_inferior call.
+
+2015-11-14 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_close): Delete.
+
+2015-11-10 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_cr16_translate_dmap_addr): Mark static.
+ (sim_cr16_translate_imap_addr): Likewise.
+ (sim_cr16_translate_addr): Likewise.
+
2015-06-23 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate.
projects / deliverable / binutils-gdb.git / blobdiff