/* Simulation code for the CR16 processor.
- Copyright (C) 2008 Free Software Foundation, Inc.
+ Copyright (C) 2008-2015 Free Software Foundation, Inc.
Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
This file is part of GDB, the GNU debugger.
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
- You should have received a copy of the GNU General Public License along
- with this program. If not, see <http://www.gnu.org/licenses/>. */
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "config.h"
#ifdef HAVE_STRING_H
#include <string.h>
#endif
+#ifdef HAVE_TIME_H
+#include <time.h>
+#endif
+#ifdef HAVE_SYS_TIME_H
+#include <sys/time.h>
+#endif
-#include "cr16_sim.h"
+#include "sim-main.h"
#include "simops.h"
#include "targ-vals.h"
-extern char *strrchr ();
+#ifdef TARGET_SYS_utime
+#include <utime.h>
+#endif
+#ifdef TARGET_SYS_wait
+#include <sys/wait.h>
+#endif
enum op_types {
OP_VOID,
OP_CONSTANT3,
- OP_CONSTANT3_OUTPUT,
OP_UCONSTANT3,
- OP_UCONSTANT3_OUTPUT,
- OP_UCONSTANT3_1,
- OP_UCONSTANT3_1_OUTPUT,
OP_CONSTANT4,
- OP_CONSTANT4_OUTPUT,
OP_CONSTANT4_1,
- OP_CONSTANT4_1_OUTPUT,
OP_CONSTANT5,
- OP_CONSTANT5_OUTPUT,
OP_CONSTANT6,
- OP_CONSTANT6_OUTPUT,
OP_CONSTANT16,
- OP_CONSTANT16_OUTPUT,
OP_UCONSTANT16,
- OP_UCONSTANT16_OUTPUT,
OP_CONSTANT20,
- OP_CONSTANT20_OUTPUT,
OP_UCONSTANT20,
- OP_UCONSTANT20_OUTPUT,
OP_CONSTANT32,
- OP_UCONSTANT32_OUTPUT,
OP_UCONSTANT32,
- OP_CONSTANT32_OUTPUT,
OP_MEMREF,
OP_MEMREF2,
OP_MEMREF3,
OP_DISP5,
- OP_DISP5_OUTPUT,
OP_DISP17,
- OP_DISP17_OUTPUT,
OP_DISP25,
- OP_DISP25_OUTPUT,
OP_DISPE9,
- OP_DISPE9_OUTPUT,
//OP_ABS20,
OP_ABS20_OUTPUT,
//OP_ABS24,
OP_ABS24_OUTPUT,
OP_R_BASE_DISPS16,
- OP_R_BASE_DISPS16_OUTPUT,
OP_R_BASE_DISP20,
- OP_R_BASE_DISP20_OUTPUT,
OP_R_BASE_DISPS20,
- OP_R_BASE_DISPS20_OUTPUT,
OP_R_BASE_DISPE20,
- OP_R_BASE_DISPE20_OUTPUT,
OP_RP_BASE_DISPE0,
- OP_RP_BASE_DISPE0_OUTPUT,
OP_RP_BASE_DISP4,
- OP_RP_BASE_DISP4_OUTPUT,
OP_RP_BASE_DISPE4,
- OP_RP_BASE_DISPE4_OUTPUT,
OP_RP_BASE_DISP14,
- OP_RP_BASE_DISP14_OUTPUT,
OP_RP_BASE_DISP16,
- OP_RP_BASE_DISP16_OUTPUT,
OP_RP_BASE_DISP20,
- OP_RP_BASE_DISP20_OUTPUT,
OP_RP_BASE_DISPS20,
- OP_RP_BASE_DISPS20_OUTPUT,
OP_RP_BASE_DISPE20,
- OP_RP_BASE_DISPE20_OUTPUT,
OP_R_INDEX7_ABS20,
- OP_R_INDEX7_ABS20_OUTPUT,
OP_R_INDEX8_ABS20,
- OP_R_INDEX8_ABS20_OUTPUT,
OP_RP_INDEX_DISP0,
- OP_RP_INDEX_DISP0_OUTPUT,
OP_RP_INDEX_DISP14,
- OP_RP_INDEX_DISP14_OUTPUT,
OP_RP_INDEX_DISP20,
- OP_RP_INDEX_DISP20_OUTPUT,
OP_RP_INDEX_DISPS20,
- OP_RP_INDEX_DISPS20_OUTPUT,
OP_REG,
- OP_REG_OUTPUT,
OP_REGP,
- OP_REGP_OUTPUT,
OP_PROC_REG,
- OP_PROC_REG_OUTPUT,
OP_PROC_REGP,
- OP_PROC_REGP_OUTPUT,
OP_COND,
- OP_COND_OUTPUT,
- OP_RA,
- OP_RA_OUTPUT
+ OP_RA
};
* LT Less Than Z and N flags are 0
* GE Greater Than or Equal To Z or N flag is 1. */
-int cond_stat(int cc)
+static int cond_stat(int cc)
{
switch (cc)
{
/* only issue an update if the register is being changed. */
if ((State.cregs[cr] & ~mask) != val)
SLOT_PEND_MASK (State.cregs[cr], mask, val);
+
return val;
}
#ifdef DEBUG
-static void trace_input_func PARAMS ((char *name,
- enum op_types in1,
- enum op_types in2,
- enum op_types in3));
+static void trace_input_func (const char *name,
+ enum op_types in1,
+ enum op_types in2,
+ enum op_types in3);
#define trace_input(name, in1, in2, in3) do { if (cr16_debug) trace_input_func (name, in1, in2, in3); } while (0)
#endif
static void
-trace_input_func (name, in1, in2, in3)
- char *name;
- enum op_types in1;
- enum op_types in2;
- enum op_types in3;
+trace_input_func (const char *name, enum op_types in1, enum op_types in2, enum op_types in3)
{
char *comma;
enum op_types in[3];
else
{
+ extern SIM_DESC trace_sd;
+
buf[0] = '\0';
- byte_pc = decode_pc ();
- if (text && byte_pc >= text_start && byte_pc < text_end)
+ byte_pc = PC;
+ if (STATE_TEXT_SECTION (trace_sd)
+ && byte_pc >= STATE_TEXT_START (trace_sd)
+ && byte_pc < STATE_TEXT_END (trace_sd))
{
filename = (const char *)0;
functionname = (const char *)0;
linenumber = 0;
- if (bfd_find_nearest_line (prog_bfd, text, (struct bfd_symbol **)0, byte_pc - text_start,
+ if (bfd_find_nearest_line (STATE_PROG_BFD (trace_sd),
+ STATE_TEXT_SECTION (trace_sd),
+ (struct bfd_symbol **)0,
+ byte_pc - STATE_TEXT_START (trace_sd),
&filename, &functionname, &linenumber))
{
p = buf;
break;
case OP_REG:
- case OP_REG_OUTPUT:
case OP_REGP:
- case OP_REGP_OUTPUT:
sprintf (p, "%sr%d", comma, OP[i]);
p += strlen (p);
comma = ",";
break;
case OP_PROC_REG:
- case OP_PROC_REG_OUTPUT:
sprintf (p, "%scr%d", comma, OP[i]);
p += strlen (p);
comma = ",";
(*cr16_callback->printf_filtered) (cr16_callback, "%*s", SIZE_VALUES, "");
break;
- case OP_REG_OUTPUT:
- case OP_REGP_OUTPUT:
- case OP_PROC_REG_OUTPUT:
- (*cr16_callback->printf_filtered) (cr16_callback, "%*s", SIZE_VALUES, "---");
- break;
-
case OP_REG:
(*cr16_callback->printf_filtered) (cr16_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
(uint16) GPR (OP[i]));
(*cr16_callback->flush_stdout) (cr16_callback);
}
+#if 0
static void
trace_output_40 (uint64 val)
{
do_trace_output_finish ();
}
}
+#endif
static void
trace_output_32 (uint32 val)
}
static void
-trace_output_void ()
+trace_output_void (void)
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
}
static void
-trace_output_flag ()
+trace_output_flag (void)
{
if ((cr16_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
{
/* addub. */
void
-OP_2C_8 ()
+OP_2C_8 (void)
{
uint8 tmp;
uint8 a = OP[0] & 0xff;
/* addub. */
void
-OP_2CB_C ()
+OP_2CB_C (void)
{
uint16 tmp;
uint8 a = ((OP[0]) & 0xff), b = (GPR (OP[1])) & 0xff;
/* addub. */
void
-OP_2D_8 ()
+OP_2D_8 (void)
{
uint8 a = (GPR (OP[0])) & 0xff;
uint8 b = (GPR (OP[1])) & 0xff;
/* adduw. */
void
-OP_2E_8 ()
+OP_2E_8 (void)
{
uint16 a = OP[0];
uint16 b = GPR (OP[1]);
/* adduw. */
void
-OP_2EB_C ()
+OP_2EB_C (void)
{
uint16 a = OP[0];
uint16 b = GPR (OP[1]);
/* adduw. */
void
-OP_2F_8 ()
+OP_2F_8 (void)
{
uint16 a = GPR (OP[0]);
uint16 b = GPR (OP[1]);
/* addb. */
void
-OP_30_8 ()
+OP_30_8 (void)
{
uint8 a = OP[0];
uint8 b = (GPR (OP[1]) & 0xff);
- trace_input ("addb", OP_CONSTANT4_1, OP_REG, OP_VOID);
uint16 tmp = (a + b) & 0xff;
+ trace_input ("addb", OP_CONSTANT4_1, OP_REG, OP_VOID);
SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00)));
SET_PSR_C (tmp > 0xFF);
SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80)));
/* addb. */
void
-OP_30B_C ()
+OP_30B_C (void)
{
uint8 a = (OP[0]) & 0xff;
uint8 b = (GPR (OP[1]) & 0xff);
- trace_input ("addb", OP_CONSTANT16, OP_REG, OP_VOID);
uint16 tmp = (a + b) & 0xff;
+ trace_input ("addb", OP_CONSTANT16, OP_REG, OP_VOID);
SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00)));
SET_PSR_C (tmp > 0xFF);
SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80)));
/* addb. */
void
-OP_31_8 ()
+OP_31_8 (void)
{
uint8 a = (GPR (OP[0]) & 0xff);
uint8 b = (GPR (OP[1]) & 0xff);
- trace_input ("addb", OP_REG, OP_REG, OP_VOID);
uint16 tmp = (a + b) & 0xff;
+ trace_input ("addb", OP_REG, OP_REG, OP_VOID);
SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00)));
SET_PSR_C (tmp > 0xFF);
SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80)));
/* addw. */
void
-OP_32_8 ()
+OP_32_8 (void)
{
int16 a = OP[0];
uint16 tmp, b = GPR (OP[1]);
- trace_input ("addw", OP_CONSTANT4_1, OP_REG, OP_VOID);
tmp = (a + b);
+ trace_input ("addw", OP_CONSTANT4_1, OP_REG, OP_VOID);
SET_GPR (OP[1], tmp);
SET_PSR_C (tmp > 0xFFFF);
SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000)));
/* addw. */
void
-OP_32B_C ()
+OP_32B_C (void)
{
int16 a = OP[0];
uint16 tmp, b = GPR (OP[1]);
/* addw. */
void
-OP_33_8 ()
+OP_33_8 (void)
{
uint16 tmp, a = (GPR (OP[0])), b = (GPR (OP[1]));
trace_input ("addw", OP_REG, OP_REG, OP_VOID);
/* addcb. */
void
-OP_34_8 ()
+OP_34_8 (void)
{
uint8 tmp, a = OP[0] & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("addcb", OP_CONSTANT4_1, OP_REG, OP_REG);
/* addcb. */
void
-OP_34B_C ()
+OP_34B_C (void)
{
int8 a = OP[0] & 0xff;
uint8 b = (GPR (OP[1])) & 0xff;
- trace_input ("addcb", OP_CONSTANT16, OP_REG, OP_VOID);
uint8 tmp = (a + b + PSR_C) & 0xff;
+ trace_input ("addcb", OP_CONSTANT16, OP_REG, OP_VOID);
SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00)));
SET_PSR_C (tmp > 0xFF);
SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80)));
/* addcb. */
void
-OP_35_8 ()
+OP_35_8 (void)
{
uint8 a = (GPR (OP[0])) & 0xff;
uint8 b = (GPR (OP[1])) & 0xff;
- trace_input ("addcb", OP_REG, OP_REG, OP_VOID);
uint8 tmp = (a + b + PSR_C) & 0xff;
+ trace_input ("addcb", OP_REG, OP_REG, OP_VOID);
SET_GPR (OP[1], (tmp | ((GPR (OP[1])) & 0xff00)));
SET_PSR_C (tmp > 0xFF);
SET_PSR_F (((a & 0x80) == (b & 0x80)) && ((b & 0x80) != (tmp & 0x80)));
/* addcw. */
void
-OP_36_8 ()
+OP_36_8 (void)
{
uint16 a = OP[0];
uint16 b = GPR (OP[1]);
- trace_input ("addcw", OP_CONSTANT4_1, OP_REG, OP_VOID);
uint16 tmp = (a + b + PSR_C);
+ trace_input ("addcw", OP_CONSTANT4_1, OP_REG, OP_VOID);
SET_GPR (OP[1], tmp);
SET_PSR_C (tmp > 0xFFFF);
SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000)));
/* addcw. */
void
-OP_36B_C ()
+OP_36B_C (void)
{
int16 a = OP[0];
uint16 b = GPR (OP[1]);
- trace_input ("addcw", OP_CONSTANT16, OP_REG, OP_VOID);
uint16 tmp = (a + b + PSR_C);
+ trace_input ("addcw", OP_CONSTANT16, OP_REG, OP_VOID);
SET_GPR (OP[1], tmp);
SET_PSR_C (tmp > 0xFFFF);
SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000)));
/* addcw. */
void
-OP_37_8 ()
+OP_37_8 (void)
{
uint16 a = GPR (OP[1]);
uint16 b = GPR (OP[1]);
- trace_input ("addcw", OP_REG, OP_REG, OP_VOID);
uint16 tmp = (a + b + PSR_C);
+ trace_input ("addcw", OP_REG, OP_REG, OP_VOID);
SET_GPR (OP[1], tmp);
SET_PSR_C (tmp > 0xFFFF);
SET_PSR_F (((a & 0x8000) == (b & 0x8000)) && ((b & 0x8000) != (tmp & 0x8000)));
/* addd. */
void
-OP_60_8 ()
+OP_60_8 (void)
{
int16 a = (OP[0]);
uint32 b = GPR32 (OP[1]);
- trace_input ("addd", OP_CONSTANT4_1, OP_REGP, OP_VOID);
uint32 tmp = (a + b);
+ trace_input ("addd", OP_CONSTANT4_1, OP_REGP, OP_VOID);
SET_GPR32 (OP[1], tmp);
SET_PSR_C (tmp > 0xFFFFFFFF);
SET_PSR_F (((a & 0x80000000) == (b & 0x80000000)) && ((b & 0x80000000) != (tmp & 0x80000000)));
/* addd. */
void
-OP_60B_C ()
+OP_60B_C (void)
{
int32 a = (SEXT16(OP[0]));
uint32 b = GPR32 (OP[1]);
- trace_input ("addd", OP_CONSTANT16, OP_REGP, OP_VOID);
uint32 tmp = (a + b);
+ trace_input ("addd", OP_CONSTANT16, OP_REGP, OP_VOID);
SET_GPR32 (OP[1], tmp);
SET_PSR_C (tmp > 0xFFFFFFFF);
SET_PSR_F (((a & 0x80000000) == (b & 0x80000000)) && ((b & 0x80000000) != (tmp & 0x80000000)));
/* addd. */
void
-OP_61_8 ()
+OP_61_8 (void)
{
uint32 a = GPR32 (OP[0]);
uint32 b = GPR32 (OP[1]);
- trace_input ("addd", OP_REGP, OP_REGP, OP_VOID);
uint32 tmp = (a + b);
+ trace_input ("addd", OP_REGP, OP_REGP, OP_VOID);
SET_GPR32 (OP[1], tmp);
trace_output_32 (tmp);
SET_PSR_C (tmp > 0xFFFFFFFF);
/* addd. */
void
-OP_4_8 ()
+OP_4_8 (void)
{
uint32 a = OP[0];
uint32 b = GPR32 (OP[1]);
/* addd. */
void
-OP_2_C ()
+OP_2_C (void)
{
int32 a = OP[0];
uint32 b = GPR32 (OP[1]);
/* andb. */
void
-OP_20_8 ()
+OP_20_8 (void)
{
uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("andb", OP_CONSTANT4, OP_REG, OP_VOID);
/* andb. */
void
-OP_20B_C ()
+OP_20B_C (void)
{
uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("andb", OP_CONSTANT16, OP_REG, OP_VOID);
/* andb. */
void
-OP_21_8 ()
+OP_21_8 (void)
{
uint8 tmp, a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("andb", OP_REG, OP_REG, OP_VOID);
/* andw. */
void
-OP_22_8 ()
+OP_22_8 (void)
{
uint16 tmp, a = OP[0], b = GPR (OP[1]);
trace_input ("andw", OP_CONSTANT4, OP_REG, OP_VOID);
/* andw. */
void
-OP_22B_C ()
+OP_22B_C (void)
{
uint16 tmp, a = OP[0], b = GPR (OP[1]);
trace_input ("andw", OP_CONSTANT16, OP_REG, OP_VOID);
/* andw. */
void
-OP_23_8 ()
+OP_23_8 (void)
{
uint16 tmp, a = GPR (OP[0]), b = GPR (OP[1]);
trace_input ("andw", OP_REG, OP_REG, OP_VOID);
/* andd. */
void
-OP_4_C ()
+OP_4_C (void)
{
uint32 tmp, a = OP[0], b = GPR32 (OP[1]);
trace_input ("andd", OP_CONSTANT32, OP_REGP, OP_VOID);
/* andd. */
void
-OP_14B_14 ()
+OP_14B_14 (void)
{
uint32 tmp, a = (GPR32 (OP[0])), b = (GPR32 (OP[1]));
trace_input ("andd", OP_REGP, OP_REGP, OP_VOID);
/* ord. */
void
-OP_5_C ()
+OP_5_C (void)
{
uint32 tmp, a = (OP[0]), b = GPR32 (OP[1]);
trace_input ("ord", OP_CONSTANT32, OP_REG, OP_VOID);
/* ord. */
void
-OP_149_14 ()
+OP_149_14 (void)
{
uint32 tmp, a = GPR32 (OP[0]), b = GPR32 (OP[1]);
trace_input ("ord", OP_REGP, OP_REGP, OP_VOID);
/* xord. */
void
-OP_6_C ()
+OP_6_C (void)
{
uint32 tmp, a = (OP[0]), b = GPR32 (OP[1]);
trace_input ("xord", OP_CONSTANT32, OP_REG, OP_VOID);
/* xord. */
void
-OP_14A_14 ()
+OP_14A_14 (void)
{
uint32 tmp, a = GPR32 (OP[0]), b = GPR32 (OP[1]);
trace_input ("xord", OP_REGP, OP_REGP, OP_VOID);
/* b. */
void
-OP_1_4 ()
+OP_1_4 (void)
{
- uint32 tmp, cc = cond_stat (OP[0]);
+ uint32 tmp = 0, cc = cond_stat (OP[0]);
trace_input ("b", OP_CONSTANT4, OP_DISPE9, OP_VOID);
if (cc)
{
/* b. */
void
-OP_18_8 ()
+OP_18_8 (void)
{
- uint32 tmp, cc = cond_stat (OP[0]);
+ uint32 tmp = 0, cc = cond_stat (OP[0]);
trace_input ("b", OP_CONSTANT4, OP_DISP17, OP_VOID);
if (cc)
{
/* b. */
void
-OP_10_10 ()
+OP_10_10 (void)
{
- uint32 tmp, cc = cond_stat (OP[0]);
+ uint32 tmp = 0, cc = cond_stat (OP[0]);
trace_input ("b", OP_CONSTANT4, OP_DISP25, OP_VOID);
if (cc)
{
/* bal. */
void
-OP_C0_8 ()
+OP_C0_8 (void)
{
uint32 tmp;
trace_input ("bal", OP_REG, OP_DISP17, OP_VOID);
/* bal. */
void
-OP_102_14 ()
+OP_102_14 (void)
{
uint32 tmp;
trace_input ("bal", OP_REGP, OP_DISP25, OP_VOID);
/* jal. */
void
-OP_148_14 ()
+OP_148_14 (void)
{
uint32 tmp;
trace_input ("jal", OP_REGP, OP_REGP, OP_VOID);
/* jal. */
void
-OP_D_C ()
+OP_D_C (void)
{
uint32 tmp;
trace_input ("jal", OP_REGP, OP_VOID, OP_VOID);
/* beq0b. */
void
-OP_C_8 ()
+OP_C_8 (void)
{
uint32 addr;
uint8 a = (GPR (OP[0]) & 0xFF);
/* bne0b. */
void
-OP_D_8 ()
+OP_D_8 (void)
{
uint32 addr;
uint8 a = (GPR (OP[0]) & 0xFF);
/* beq0w. */
void
-OP_E_8()
+OP_E_8 (void)
{
uint32 addr;
uint16 a = GPR (OP[0]);
/* bne0w. */
void
-OP_F_8 ()
+OP_F_8 (void)
{
uint32 addr;
uint16 a = GPR (OP[0]);
/* jeq. */
void
-OP_A0_C ()
+OP_A0_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jeq", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_Z) == 1)
{
/* jne. */
void
-OP_A1_C ()
+OP_A1_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jne", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_Z) == 0)
{
/* jcs. */
void
-OP_A2_C ()
+OP_A2_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jcs", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_C) == 1)
{
/* jcc. */
void
-OP_A3_C ()
+OP_A3_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jcc", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_C) == 0)
{
/* jhi. */
void
-OP_A4_C ()
+OP_A4_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jhi", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_L) == 1)
{
/* jls. */
void
-OP_A5_C ()
+OP_A5_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jls", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_L) == 0)
{
/* jgt. */
void
-OP_A6_C ()
+OP_A6_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jgt", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_N) == 1)
{
/* jle. */
void
-OP_A7_C ()
+OP_A7_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jle", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_N) == 0)
{
/* jfs. */
void
-OP_A8_C ()
+OP_A8_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jfs", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_F) == 1)
{
/* jfc. */
void
-OP_A9_C ()
+OP_A9_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jfc", OP_REGP, OP_VOID, OP_VOID);
if ((PSR_F) == 0)
{
/* jlo. */
void
-OP_AA_C ()
+OP_AA_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jlo", OP_REGP, OP_VOID, OP_VOID);
if (((PSR_Z) == 0) & ((PSR_L) == 0))
{
/* jhs. */
void
-OP_AB_C ()
+OP_AB_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jhs", OP_REGP, OP_VOID, OP_VOID);
if (((PSR_Z) == 1) | ((PSR_L) == 1))
{
/* jlt. */
void
-OP_AC_C ()
+OP_AC_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jlt", OP_REGP, OP_VOID, OP_VOID);
if (((PSR_Z) == 0) & ((PSR_N) == 0))
{
/* jge. */
void
-OP_AD_C ()
+OP_AD_C (void)
{
- uint32 tmp;
+ uint32 tmp = 0;
trace_input ("jge", OP_REGP, OP_VOID, OP_VOID);
if (((PSR_Z) == 1) | ((PSR_N) == 1))
{
/* jump. */
void
-OP_AE_C ()
+OP_AE_C (void)
{
uint32 tmp;
trace_input ("jump", OP_REGP, OP_VOID, OP_VOID);
/* jusr. */
void
-OP_AF_C ()
+OP_AF_C (void)
{
uint32 tmp;
trace_input ("jusr", OP_REGP, OP_VOID, OP_VOID);
/* seq. */
void
-OP_80_C ()
+OP_80_C (void)
{
trace_input ("seq", OP_REG, OP_VOID, OP_VOID);
if ((PSR_Z) == 1)
}
/* sne. */
void
-OP_81_C ()
+OP_81_C (void)
{
trace_input ("sne", OP_REG, OP_VOID, OP_VOID);
if ((PSR_Z) == 0)
/* scs. */
void
-OP_82_C ()
+OP_82_C (void)
{
trace_input ("scs", OP_REG, OP_VOID, OP_VOID);
if ((PSR_C) == 1)
/* scc. */
void
-OP_83_C ()
+OP_83_C (void)
{
trace_input ("scc", OP_REG, OP_VOID, OP_VOID);
if ((PSR_C) == 0)
/* shi. */
void
-OP_84_C ()
+OP_84_C (void)
{
trace_input ("shi", OP_REG, OP_VOID, OP_VOID);
if ((PSR_L) == 1)
/* sls. */
void
-OP_85_C ()
+OP_85_C (void)
{
trace_input ("sls", OP_REG, OP_VOID, OP_VOID);
if ((PSR_L) == 0)
/* sgt. */
void
-OP_86_C ()
+OP_86_C (void)
{
trace_input ("sgt", OP_REG, OP_VOID, OP_VOID);
if ((PSR_N) == 1)
/* sle. */
void
-OP_87_C ()
+OP_87_C (void)
{
trace_input ("sle", OP_REG, OP_VOID, OP_VOID);
if ((PSR_N) == 0)
/* sfs. */
void
-OP_88_C ()
+OP_88_C (void)
{
trace_input ("sfs", OP_REG, OP_VOID, OP_VOID);
if ((PSR_F) == 1)
/* sfc. */
void
-OP_89_C ()
+OP_89_C (void)
{
trace_input ("sfc", OP_REG, OP_VOID, OP_VOID);
if ((PSR_F) == 0)
/* slo. */
void
-OP_8A_C ()
+OP_8A_C (void)
{
trace_input ("slo", OP_REG, OP_VOID, OP_VOID);
if (((PSR_Z) == 0) & ((PSR_L) == 0))
/* shs. */
void
-OP_8B_C ()
+OP_8B_C (void)
{
trace_input ("shs", OP_REG, OP_VOID, OP_VOID);
if ( ((PSR_Z) == 1) | ((PSR_L) == 1))
/* slt. */
void
-OP_8C_C ()
+OP_8C_C (void)
{
trace_input ("slt", OP_REG, OP_VOID, OP_VOID);
if (((PSR_Z) == 0) & ((PSR_N) == 0))
/* sge. */
void
-OP_8D_C ()
+OP_8D_C (void)
{
trace_input ("sge", OP_REG, OP_VOID, OP_VOID);
if (((PSR_Z) == 1) | ((PSR_N) == 1))
/* cbitb. */
void
-OP_D7_9 ()
+OP_D7_9 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = OP[1], tmp;
/* cbitb. */
void
-OP_107_14 ()
+OP_107_14 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = OP[1], tmp;
/* cbitb. */
void
-OP_68_8 ()
+OP_68_8 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* cbitb. */
void
-OP_1AA_A ()
+OP_1AA_A (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitb. */
void
-OP_104_14 ()
+OP_104_14 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* cbitb. */
void
-OP_D4_9 ()
+OP_D4_9 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitb. */
void
-OP_D6_9 ()
+OP_D6_9 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitb. */
void
-OP_105_14 ()
+OP_105_14 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitb. */
void
-OP_106_14 ()
+OP_106_14 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitw. */
void
-OP_6F_8 ()
+OP_6F_8 (void)
{
uint16 a = OP[0];
uint32 addr = OP[1], tmp;
/* cbitw. */
void
-OP_117_14 ()
+OP_117_14 (void)
{
uint16 a = OP[0];
uint32 addr = OP[1], tmp;
/* cbitw. */
void
-OP_36_7 ()
+OP_36_7 (void)
{
uint32 addr;
uint16 a = (OP[0]), tmp;
/* cbitw. */
void
-OP_1AB_A ()
+OP_1AB_A (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitw. */
void
-OP_114_14 ()
+OP_114_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* cbitw. */
void
-OP_6E_8 ()
+OP_6E_8 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitw. */
void
-OP_69_8 ()
+OP_69_8 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitw. */
void
-OP_115_14 ()
+OP_115_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* cbitw. */
void
-OP_116_14 ()
+OP_116_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_E7_9 ()
+OP_E7_9 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = OP[1], tmp;
/* sbitb. */
void
-OP_10B_14 ()
+OP_10B_14 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = OP[1], tmp;
/* sbitb. */
void
-OP_70_8 ()
+OP_70_8 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_1CA_A ()
+OP_1CA_A (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_108_14 ()
+OP_108_14 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_E4_9 ()
+OP_E4_9 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_E6_9 ()
+OP_E6_9 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_109_14 ()
+OP_109_14 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitb. */
void
-OP_10A_14 ()
+OP_10A_14 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitw. */
void
-OP_77_8 ()
+OP_77_8 (void)
{
uint16 a = OP[0];
uint32 addr = OP[1], tmp;
/* sbitw. */
void
-OP_11B_14 ()
+OP_11B_14 (void)
{
uint16 a = OP[0];
uint32 addr = OP[1], tmp;
/* sbitw. */
void
-OP_3A_7 ()
+OP_3A_7 (void)
{
uint32 addr;
uint16 a = (OP[0]), tmp;
/* sbitw. */
void
-OP_1CB_A ()
+OP_1CB_A (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitw. */
void
-OP_118_14 ()
+OP_118_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* sbitw. */
void
-OP_76_8 ()
+OP_76_8 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitw. */
void
-OP_71_8 ()
+OP_71_8 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitw. */
void
-OP_119_14 ()
+OP_119_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* sbitw. */
void
-OP_11A_14 ()
+OP_11A_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_F7_9 ()
+OP_F7_9 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = OP[1], tmp;
/* tbitb. */
void
-OP_10F_14 ()
+OP_10F_14 (void)
{
uint8 a = OP[0] & 0xff;
uint32 addr = OP[1], tmp;
/* tbitb. */
void
-OP_78_8 ()
+OP_78_8 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_1EA_A ()
+OP_1EA_A (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_10C_14 ()
+OP_10C_14 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_F4_9 ()
+OP_F4_9 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_F6_9 ()
+OP_F6_9 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_10D_14 ()
+OP_10D_14 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitb. */
void
-OP_10E_14 ()
+OP_10E_14 (void)
{
uint8 a = (OP[0]) & 0xff;
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitw. */
void
-OP_7F_8 ()
+OP_7F_8 (void)
{
uint16 a = OP[0];
uint32 addr = OP[1], tmp;
/* tbitw. */
void
-OP_11F_14 ()
+OP_11F_14 (void)
{
uint16 a = OP[0];
uint32 addr = OP[1], tmp;
/* tbitw. */
void
-OP_3E_7 ()
+OP_3E_7 (void)
{
uint32 addr;
uint16 a = (OP[0]), tmp;
/* tbitw. */
void
-OP_1EB_A ()
+OP_1EB_A (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitw. */
void
-OP_11C_14 ()
+OP_11C_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR (OP[2])) + OP[1], tmp;
/* tbitw. */
void
-OP_7E_8 ()
+OP_7E_8 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitw. */
void
-OP_79_8 ()
+OP_79_8 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitw. */
void
-OP_11D_14 ()
+OP_11D_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbitw. */
void
-OP_11E_14 ()
+OP_11E_14 (void)
{
uint16 a = (OP[0]);
uint32 addr = (GPR32 (OP[2])) + OP[1], tmp;
/* tbit. */
void
-OP_6_8 ()
+OP_6_8 (void)
{
uint16 a = OP[0];
- uint32 addr = (GPR (OP[1])), tmp;
+ uint16 b = (GPR (OP[1]));
trace_input ("tbit", OP_CONSTANT4, OP_REG, OP_VOID);
- tmp = RW (addr);
- SET_PSR_F (tmp & (1 << a));
- trace_output_32 (tmp);
+ SET_PSR_F (b & (1 << a));
+ trace_output_16 (b);
}
/* tbit. */
void
-OP_7_8 ()
+OP_7_8 (void)
{
uint16 a = GPR (OP[0]);
- uint32 addr = (GPR (OP[1])), tmp;
+ uint16 b = (GPR (OP[1]));
trace_input ("tbit", OP_REG, OP_REG, OP_VOID);
- tmp = RW (addr);
- SET_PSR_F (tmp & (1 << a));
- trace_output_32 (tmp);
+ SET_PSR_F (b & (1 << a));
+ trace_output_16 (b);
}
/* cmpb. */
void
-OP_50_8 ()
+OP_50_8 (void)
{
uint8 a = (OP[0]) & 0xFF;
uint8 b = (GPR (OP[1])) & 0xFF;
/* cmpb. */
void
-OP_50B_C ()
+OP_50B_C (void)
{
uint8 a = (OP[0]) & 0xFF;
uint8 b = (GPR (OP[1])) & 0xFF;
/* cmpb. */
void
-OP_51_8 ()
+OP_51_8 (void)
{
uint8 a = (GPR (OP[0])) & 0xFF;
uint8 b = (GPR (OP[1])) & 0xFF;
/* cmpw. */
void
-OP_52_8 ()
+OP_52_8 (void)
{
uint16 a = (OP[0]);
uint16 b = GPR (OP[1]);
/* cmpw. */
void
-OP_52B_C ()
+OP_52B_C (void)
{
uint16 a = (OP[0]);
uint16 b = GPR (OP[1]);
/* cmpw. */
void
-OP_53_8 ()
+OP_53_8 (void)
{
uint16 a = GPR (OP[0]) ;
uint16 b = GPR (OP[1]) ;
/* cmpd. */
void
-OP_56_8 ()
+OP_56_8 (void)
{
uint32 a = (OP[0]);
uint32 b = GPR32 (OP[1]);
/* cmpd. */
void
-OP_56B_C ()
+OP_56B_C (void)
{
uint32 a = (SEXT16(OP[0]));
uint32 b = GPR32 (OP[1]);
/* cmpd. */
void
-OP_57_8 ()
+OP_57_8 (void)
{
uint32 a = GPR32 (OP[0]) ;
uint32 b = GPR32 (OP[1]) ;
/* cmpd. */
void
-OP_9_C()
+OP_9_C (void)
{
uint32 a = (OP[0]);
uint32 b = GPR32 (OP[1]);
/* movb. */
void
-OP_58_8 ()
+OP_58_8 (void)
{
uint8 tmp = OP[0] & 0xFF;
- trace_input ("movb", OP_CONSTANT4, OP_REG, OP_VOID);
uint16 a = (GPR (OP[1])) & 0xFF00;
+ trace_input ("movb", OP_CONSTANT4, OP_REG, OP_VOID);
SET_GPR (OP[1], (a | tmp));
trace_output_16 (tmp);
}
/* movb. */
void
-OP_58B_C ()
+OP_58B_C (void)
{
uint8 tmp = OP[0] & 0xFF;
- trace_input ("movb", OP_CONSTANT16, OP_REG, OP_VOID);
uint16 a = (GPR (OP[1])) & 0xFF00;
+ trace_input ("movb", OP_CONSTANT16, OP_REG, OP_VOID);
SET_GPR (OP[1], (a | tmp));
trace_output_16 (tmp);
}
/* movb. */
void
-OP_59_8 ()
+OP_59_8 (void)
{
uint8 tmp = (GPR (OP[0])) & 0xFF;
- trace_input ("movb", OP_REG, OP_REG, OP_VOID);
uint16 a = (GPR (OP[1])) & 0xFF00;
+ trace_input ("movb", OP_REG, OP_REG, OP_VOID);
SET_GPR (OP[1], (a | tmp));
trace_output_16 (tmp);
}
/* movw. */
void
-OP_5A_8 ()
+OP_5A_8 (void)
{
uint16 tmp = OP[0];
trace_input ("movw", OP_CONSTANT4_1, OP_REG, OP_VOID);
/* movw. */
void
-OP_5AB_C ()
+OP_5AB_C (void)
{
int16 tmp = OP[0];
trace_input ("movw", OP_CONSTANT16, OP_REG, OP_VOID);
/* movw. */
void
-OP_5B_8 ()
+OP_5B_8 (void)
{
uint16 tmp = GPR (OP[0]);
- trace_input ("movw", OP_REG, OP_REGP, OP_VOID);
uint32 a = GPR32 (OP[1]);
+ trace_input ("movw", OP_REG, OP_REGP, OP_VOID);
a = (a & 0xffff0000) | tmp;
SET_GPR32 (OP[1], a);
trace_output_16 (tmp);
/* movxb. */
void
-OP_5C_8 ()
+OP_5C_8 (void)
{
uint8 tmp = (GPR (OP[0])) & 0xFF;
trace_input ("movxb", OP_REG, OP_REG, OP_VOID);
/* movzb. */
void
-OP_5D_8 ()
+OP_5D_8 (void)
{
uint8 tmp = (GPR (OP[0])) & 0xFF;
trace_input ("movzb", OP_REG, OP_REG, OP_VOID);
/* movxw. */
void
-OP_5E_8 ()
+OP_5E_8 (void)
{
uint16 tmp = GPR (OP[0]);
trace_input ("movxw", OP_REG, OP_REGP, OP_VOID);
/* movzw. */
void
-OP_5F_8 ()
+OP_5F_8 (void)
{
uint16 tmp = GPR (OP[0]);
trace_input ("movzw", OP_REG, OP_REGP, OP_VOID);
/* movd. */
void
-OP_54_8 ()
+OP_54_8 (void)
{
int32 tmp = OP[0];
trace_input ("movd", OP_CONSTANT4, OP_REGP, OP_VOID);
/* movd. */
void
-OP_54B_C ()
+OP_54B_C (void)
{
int32 tmp = SEXT16(OP[0]);
trace_input ("movd", OP_CONSTANT16, OP_REGP, OP_VOID);
/* movd. */
void
-OP_55_8 ()
+OP_55_8 (void)
{
uint32 tmp = GPR32 (OP[0]);
trace_input ("movd", OP_REGP, OP_REGP, OP_VOID);
/* movd. */
void
-OP_5_8 ()
+OP_5_8 (void)
{
uint32 tmp = OP[0];
trace_input ("movd", OP_CONSTANT20, OP_REGP, OP_VOID);
/* movd. */
void
-OP_7_C ()
+OP_7_C (void)
{
int32 tmp = OP[0];
trace_input ("movd", OP_CONSTANT32, OP_REGP, OP_VOID);
/* loadm. */
void
-OP_14_D ()
+OP_14_D (void)
{
uint32 addr = GPR (0);
uint16 count = OP[0], reg = 2, tmp;
/* loadmp. */
void
-OP_15_D ()
+OP_15_D (void)
{
uint32 addr = GPR32 (0);
uint16 count = OP[0], reg = 2, tmp;
/* loadb. */
void
-OP_88_8 ()
+OP_88_8 (void)
{
/* loadb ABS20, REG
* ADDR = zext24(abs20) | remap (ie 0xF00000)
/* loadb. */
void
-OP_127_14 ()
+OP_127_14 (void)
{
/* loadb ABS24, REG
* ADDR = abs24
/* loadb. */
void
-OP_45_7 ()
+OP_45_7 (void)
{
/* loadb [Rindex]ABS20 REG
* ADDR = Rindex + zext24(disp20)
/* loadb. */
void
-OP_B_4 ()
+OP_B_4 (void)
{
/* loadb DIPS4(REGP) REG
* ADDR = RPBASE + zext24(DISP4)
/* loadb. */
void
-OP_BE_8 ()
+OP_BE_8 (void)
{
/* loadb [Rindex]disp0(RPbasex) REG
* ADDR = Rpbasex + Rindex
/* loadb. */
void
-OP_219_A ()
+OP_219_A (void)
{
/* loadb [Rindex]disp14(RPbasex) REG
* ADDR = Rpbasex + Rindex + zext24(disp14)
/* loadb. */
void
-OP_184_14 ()
+OP_184_14 (void)
{
/* loadb DISPE20(REG) REG
* zext24(Rbase) + zext24(dispe20)
/* loadb. */
void
-OP_124_14 ()
+OP_124_14 (void)
{
/* loadb DISP20(REG) REG
* ADDR = zext24(Rbase) + zext24(disp20)
/* loadb. */
void
-OP_BF_8 ()
+OP_BF_8 (void)
{
/* loadb disp16(REGP) REG
* ADDR = RPbase + zext24(disp16)
/* loadb. */
void
-OP_125_14 ()
+OP_125_14 (void)
{
/* loadb disp20(REGP) REG
* ADDR = RPbase + zext24(disp20)
/* loadb. */
void
-OP_185_14 ()
+OP_185_14 (void)
{
/* loadb -disp20(REGP) REG
* ADDR = RPbase + zext24(-disp20)
/* loadb. */
void
-OP_126_14 ()
+OP_126_14 (void)
{
/* loadb [Rindex]disp20(RPbasexb) REG
* ADDR = RPbasex + Rindex + zext24(disp20)
/* loadw. */
void
-OP_89_8 ()
+OP_89_8 (void)
{
/* loadw ABS20, REG
* ADDR = zext24(abs20) | remap
/* loadw. */
void
-OP_12F_14 ()
+OP_12F_14 (void)
{
/* loadw ABS24, REG
* ADDR = abs24
/* loadw. */
void
-OP_47_7 ()
+OP_47_7 (void)
{
/* loadw [Rindex]ABS20 REG
* ADDR = Rindex + zext24(disp20)
/* loadw. */
void
-OP_9_4 ()
+OP_9_4 (void)
{
/* loadw DIPS4(REGP) REGP
* ADDR = RPBASE + zext24(DISP4)
/* loadw. */
void
-OP_9E_8 ()
+OP_9E_8 (void)
{
/* loadw [Rindex]disp0(RPbasex) REG
* ADDR = Rpbasex + Rindex
/* loadw. */
void
-OP_21B_A ()
+OP_21B_A (void)
{
/* loadw [Rindex]disp14(RPbasex) REG
* ADDR = Rpbasex + Rindex + zext24(disp14)
/* loadw. */
void
-OP_18C_14 ()
+OP_18C_14 (void)
{
/* loadw dispe20(REG) REGP
* REGP = [DISPE20+[REG]] */
/* loadw. */
void
-OP_12C_14 ()
+OP_12C_14 (void)
{
/* loadw DISP20(REG) REGP
* ADDR = zext24(Rbase) + zext24(disp20)
/* loadw. */
void
-OP_9F_8 ()
+OP_9F_8 (void)
{
/* loadw disp16(REGP) REGP
* ADDR = RPbase + zext24(disp16)
/* loadw. */
void
-OP_12D_14 ()
+OP_12D_14 (void)
{
/* loadw disp20(REGP) REGP
* ADDR = RPbase + zext24(disp20)
/* loadw. */
void
-OP_18D_14 ()
+OP_18D_14 (void)
{
/* loadw -disp20(REGP) REG
* ADDR = RPbase + zext24(-disp20)
/* loadw. */
void
-OP_12E_14 ()
+OP_12E_14 (void)
{
/* loadw [Rindex]disp20(RPbasexb) REG
* ADDR = RPbasex + Rindex + zext24(disp20)
/* loadd. */
void
-OP_87_8 ()
+OP_87_8 (void)
{
/* loadd ABS20, REGP
* ADDR = zext24(abs20) | remap
/* loadd. */
void
-OP_12B_14 ()
+OP_12B_14 (void)
{
/* loadd ABS24, REGP
* ADDR = abs24
/* loadd. */
void
-OP_46_7 ()
+OP_46_7 (void)
{
/* loadd [Rindex]ABS20 REGP
* ADDR = Rindex + zext24(disp20)
/* loadd. */
void
-OP_A_4 ()
+OP_A_4 (void)
{
/* loadd dips4(regp) REGP
* ADDR = Rpbase + zext24(disp4)
/* loadd. */
void
-OP_AE_8 ()
+OP_AE_8 (void)
{
/* loadd [Rindex]disp0(RPbasex) REGP
* ADDR = Rpbasex + Rindex
/* loadd. */
void
-OP_21A_A ()
+OP_21A_A (void)
{
/* loadd [Rindex]disp14(RPbasex) REGP
* ADDR = Rpbasex + Rindex + zext24(disp14)
/* loadd. */
void
-OP_188_14 ()
+OP_188_14 (void)
{
/* loadd dispe20(REG) REG
* zext24(Rbase) + zext24(dispe20)
/* loadd. */
void
-OP_128_14 ()
+OP_128_14 (void)
{
/* loadd DISP20(REG) REG
* ADDR = zext24(Rbase) + zext24(disp20)
/* loadd. */
void
-OP_AF_8 ()
+OP_AF_8 (void)
{
/* loadd disp16(REGP) REGP
* ADDR = RPbase + zext24(disp16)
/* loadd. */
void
-OP_129_14 ()
+OP_129_14 (void)
{
/* loadd disp20(REGP) REGP
* ADDR = RPbase + zext24(disp20)
/* loadd. */
void
-OP_189_14 ()
+OP_189_14 (void)
{
/* loadd -disp20(REGP) REGP
* ADDR = RPbase + zext24(-disp20)
/* loadd. */
void
-OP_12A_14 ()
+OP_12A_14 (void)
{
/* loadd [Rindex]disp20(RPbasexb) REGP
* ADDR = RPbasex + Rindex + zext24(disp20)
/* storb. */
void
-OP_C8_8 ()
+OP_C8_8 (void)
{
/* storb REG, ABS20
* ADDR = zext24(abs20) | remap
/* storb. */
void
-OP_137_14 ()
+OP_137_14 (void)
{
/* storb REG, ABS24
* ADDR = abs24
/* storb. */
void
-OP_65_7 ()
+OP_65_7 (void)
{
/* storb REG, [Rindex]ABS20
* ADDR = Rindex + zext24(disp20)
/* storb. */
void
-OP_F_4 ()
+OP_F_4 (void)
{
/* storb REG, DIPS4(REGP)
* ADDR = RPBASE + zext24(DISP4)
* [ADDR] = REG. */
uint16 a = ((GPR (OP[0])) & 0xff);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storb", OP_REG, OP_RP_BASE_DISPE4, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_FE_8 ()
+OP_FE_8 (void)
{
/* storb [Rindex]disp0(RPbasex) REG
* ADDR = Rpbasex + Rindex
/* storb. */
void
-OP_319_A ()
+OP_319_A (void)
{
/* storb REG, [Rindex]disp14(RPbasex)
* ADDR = Rpbasex + Rindex + zext24(disp14)
* [ADDR] = REGR */
uint8 a = ((GPR (OP[0])) & 0xff);
- trace_input ("storb", OP_REG, OP_RP_INDEX_DISP14, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_REG, OP_RP_INDEX_DISP14, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_194_14 ()
+OP_194_14 (void)
{
/* storb REG, DISPE20(REG)
* zext24(Rbase) + zext24(dispe20)
* [ADDR] = REG */
uint8 a = ((GPR (OP[0])) & 0xff);
- trace_input ("storb", OP_REG, OP_R_BASE_DISPE20, OP_VOID);
uint32 addr = OP[1] + (GPR (OP[2]));
+ trace_input ("storb", OP_REG, OP_R_BASE_DISPE20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_134_14 ()
+OP_134_14 (void)
{
/* storb REG, DISP20(REG)
* ADDR = zext24(Rbase) + zext24(disp20)
* [ADDR] = REG */
uint8 a = (GPR (OP[0]) & 0xff);
+ uint32 addr = OP[1] + (GPR (OP[2]));
trace_input ("storb", OP_REG, OP_R_BASE_DISPS20, OP_VOID);
- uint32 addr = OP[1] + (GPR (OP[2]));
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_FF_8 ()
+OP_FF_8 (void)
{
/* storb REG, disp16(REGP)
* ADDR = RPbase + zext24(disp16)
* [ADDR] = REGP */
uint8 a = ((GPR (OP[0])) & 0xff);
- trace_input ("storb", OP_REG, OP_RP_BASE_DISP16, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_REG, OP_RP_BASE_DISP16, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_135_14 ()
+OP_135_14 (void)
{
/* storb REG, disp20(REGP)
* ADDR = RPbase + zext24(disp20)
* [ADDR] = REGP */
uint8 a = ((GPR (OP[0])) & 0xff);
- trace_input ("storb", OP_REG, OP_RP_BASE_DISPS20, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_REG, OP_RP_BASE_DISPS20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_195_14 ()
+OP_195_14 (void)
{
/* storb REG, -disp20(REGP)
* ADDR = RPbase + zext24(-disp20)
* [ADDR] = REGP */
uint8 a = (GPR (OP[0]) & 0xff);
- trace_input ("storb", OP_REG, OP_RP_BASE_DISPE20, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_REG, OP_RP_BASE_DISPE20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_136_14 ()
+OP_136_14 (void)
{
/* storb REG, [Rindex]disp20(RPbase)
* ADDR = RPbasex + Rindex + zext24(disp20)
* [ADDR] = REGP */
uint8 a = (GPR (OP[0])) & 0xff;
- trace_input ("storb", OP_REG, OP_RP_INDEX_DISPS20, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_REG, OP_RP_INDEX_DISPS20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* STR_IMM instructions. */
/* storb . */
void
-OP_81_8 ()
+OP_81_8 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_ABS20_OUTPUT, OP_VOID);
uint32 addr = OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_ABS20_OUTPUT, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_123_14 ()
+OP_123_14 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_ABS24_OUTPUT, OP_VOID);
uint32 addr = OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_ABS24_OUTPUT, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_42_7 ()
+OP_42_7 (void)
{
uint32 addr;
uint8 a = (OP[0]) & 0xff;
/* storb. */
void
-OP_218_A ()
+OP_218_A (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP14, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP14, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_82_8 ()
+OP_82_8 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISP0, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISP0, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_120_14 ()
+OP_120_14 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_R_BASE_DISPS20, OP_VOID);
uint32 addr = (GPR (OP[2])) + OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_R_BASE_DISPS20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_83_8 ()
+OP_83_8 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP16, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISP16, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_121_14 ()
+OP_121_14 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISPS20, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_RP_BASE_DISPS20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storb. */
void
-OP_122_14 ()
+OP_122_14 (void)
{
uint8 a = (OP[0]) & 0xff;
- trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISPS20, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storb", OP_CONSTANT4, OP_RP_INDEX_DISPS20, OP_VOID);
SB (addr, a);
trace_output_32 (addr);
}
/* storw . */
void
-OP_C9_8 ()
+OP_C9_8 (void)
{
uint16 a = GPR (OP[0]);
- trace_input ("storw", OP_REG, OP_ABS20_OUTPUT, OP_VOID);
uint32 addr = OP[1];
+ trace_input ("storw", OP_REG, OP_ABS20_OUTPUT, OP_VOID);
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_13F_14 ()
+OP_13F_14 (void)
{
uint16 a = GPR (OP[0]);
- trace_input ("storw", OP_REG, OP_ABS24_OUTPUT, OP_VOID);
uint32 addr = OP[1];
+ trace_input ("storw", OP_REG, OP_ABS24_OUTPUT, OP_VOID);
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_67_7 ()
+OP_67_7 (void)
{
uint32 addr;
uint16 a = GPR (OP[0]);
/* storw. */
void
-OP_D_4 ()
+OP_D_4 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_REGP, OP_RP_BASE_DISPE4, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_DE_8 ()
+OP_DE_8 (void)
{
uint16 a = GPR (OP[0]);
- trace_input ("storw", OP_REG, OP_RP_INDEX_DISP0, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storw", OP_REG, OP_RP_INDEX_DISP0, OP_VOID);
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_31B_A ()
+OP_31B_A (void)
{
uint16 a = GPR (OP[0]);
- trace_input ("storw", OP_REG, OP_RP_INDEX_DISP14, OP_VOID);
uint32 addr = (GPR32 (OP[2])) + OP[1];
+ trace_input ("storw", OP_REG, OP_RP_INDEX_DISP14, OP_VOID);
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_19C_14 ()
+OP_19C_14 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_REGP, OP_RP_BASE_DISPE20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_13C_14 ()
+OP_13C_14 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR (OP[2])) + OP[1];
trace_input ("storw", OP_REG, OP_R_BASE_DISPS20, OP_VOID);
- uint32 addr = (GPR (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_DF_8 ()
+OP_DF_8 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_REG, OP_RP_BASE_DISP16, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_13D_14 ()
+OP_13D_14 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_REG, OP_RP_BASE_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_19D_14 ()
+OP_19D_14 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_REG, OP_RP_BASE_DISPE20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_13E_14 ()
+OP_13E_14 (void)
{
uint16 a = (GPR (OP[0]));
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_REG, OP_RP_INDEX_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* STORE-w IMM instruction *****/
/* storw . */
void
-OP_C1_8 ()
+OP_C1_8 (void)
{
uint16 a = OP[0];
+ uint32 addr = OP[1];
trace_input ("storw", OP_CONSTANT4, OP_ABS20_OUTPUT, OP_VOID);
- uint32 addr = OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_133_14 ()
+OP_133_14 (void)
{
uint16 a = OP[0];
+ uint32 addr = OP[1];
trace_input ("storw", OP_CONSTANT4, OP_ABS24_OUTPUT, OP_VOID);
- uint32 addr = OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_62_7 ()
+OP_62_7 (void)
{
uint32 addr;
uint16 a = OP[0];
/* storw. */
void
-OP_318_A ()
+OP_318_A (void)
{
uint16 a = OP[0];
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_CONSTANT4, OP_RP_BASE_DISP14, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_C2_8 ()
+OP_C2_8 (void)
{
uint16 a = OP[0];
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_CONSTANT4, OP_RP_INDEX_DISP0, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_130_14 ()
+OP_130_14 (void)
{
uint16 a = OP[0];
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_CONSTANT4, OP_R_BASE_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_C3_8 ()
+OP_C3_8 (void)
{
uint16 a = OP[0];
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_CONSTANT4, OP_RP_BASE_DISP16, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_131_14 ()
+OP_131_14 (void)
{
uint16 a = OP[0];
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_CONSTANT4, OP_RP_BASE_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* storw. */
void
-OP_132_14 ()
+OP_132_14 (void)
{
uint16 a = OP[0];
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("storw", OP_CONSTANT4, OP_RP_INDEX_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_C7_8 ()
+OP_C7_8 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = OP[1];
trace_input ("stord", OP_REGP, OP_ABS20_OUTPUT, OP_VOID);
- uint32 addr = OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_13B_14 ()
+OP_13B_14 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = OP[1];
trace_input ("stord", OP_REGP, OP_ABS24_OUTPUT, OP_VOID);
- uint32 addr = OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_66_7 ()
+OP_66_7 (void)
{
uint32 addr, a = GPR32 (OP[0]);
trace_input ("stord", OP_REGP, OP_R_INDEX8_ABS20, OP_VOID);
/* stord. */
void
-OP_E_4 ()
+OP_E_4 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_BASE_DISPE4, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_EE_8 ()
+OP_EE_8 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_INDEX_DISP0, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_31A_A ()
+OP_31A_A (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_INDEX_DISP14, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_198_14 ()
+OP_198_14 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_R_BASE_DISPE20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_138_14 ()
+OP_138_14 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_R_BASE_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_EF_8 ()
+OP_EF_8 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_BASE_DISP16, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_139_14 ()
+OP_139_14 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_BASE_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_199_14 ()
+OP_199_14 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_BASE_DISPE20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* stord. */
void
-OP_13A_14 ()
+OP_13A_14 (void)
{
uint32 a = GPR32 (OP[0]);
+ uint32 addr = (GPR32 (OP[2])) + OP[1];
trace_input ("stord", OP_REGP, OP_RP_INDEX_DISPS20, OP_VOID);
- uint32 addr = (GPR32 (OP[2])) + OP[1];
SLW (addr, a);
trace_output_32 (addr);
}
/* macqu. */
void
-OP_14D_14 ()
+OP_14D_14 (void)
{
int32 tmp;
int16 src1, src2;
/* macuw. */
void
-OP_14E_14 ()
+OP_14E_14 (void)
{
uint32 tmp;
uint16 src1, src2;
/* macsw. */
void
-OP_14F_14 ()
+OP_14F_14 (void)
{
int32 tmp;
int16 src1, src2;
/* mulb. */
void
-OP_64_8 ()
+OP_64_8 (void)
{
int16 tmp;
int8 a = (OP[0]) & 0xff;
/* mulb. */
void
-OP_64B_C ()
+OP_64B_C (void)
{
int16 tmp;
int8 a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
/* mulb. */
void
-OP_65_8 ()
+OP_65_8 (void)
{
int16 tmp;
int8 a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff;
/* mulw. */
void
-OP_66_8 ()
+OP_66_8 (void)
{
int32 tmp;
uint16 a = OP[0];
/* mulw. */
void
-OP_66B_C ()
+OP_66B_C (void)
{
int32 tmp;
int16 a = OP[0], b = (GPR (OP[1]));
/* mulw. */
void
-OP_67_8 ()
+OP_67_8 (void)
{
int32 tmp;
int16 a = (GPR (OP[0])), b = (GPR (OP[1]));
/* mulsb. */
void
-OP_B_8 ()
+OP_B_8 (void)
{
int16 tmp;
int8 a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff;
/* mulsw. */
void
-OP_62_8 ()
+OP_62_8 (void)
{
- int32 tmp, b = (GPR32 (OP[1]));
- int16 a = (GPR (OP[0]));
+ int32 tmp;
+ int16 a = (GPR (OP[0])), b = (GPR (OP[1]));
trace_input ("mulsw", OP_REG, OP_REGP, OP_VOID);
tmp = a * b;
SET_GPR32 (OP[1], tmp);
/* muluw. */
void
-OP_63_8 ()
+OP_63_8 (void)
{
- uint32 tmp, b = (GPR32 (OP[1]));
- uint16 a = (GPR (OP[0]));
+ uint32 tmp;
+ uint16 a = (GPR (OP[0])), b = (GPR (OP[1]));
trace_input ("muluw", OP_REG, OP_REGP, OP_VOID);
tmp = a * b;
SET_GPR32 (OP[1], tmp);
/* nop. */
void
-OP_2C00_10 ()
+OP_2C00_10 (void)
{
trace_input ("nop", OP_VOID, OP_VOID, OP_VOID);
/* orb. */
void
-OP_24_8 ()
+OP_24_8 (void)
{
uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("orb", OP_CONSTANT4, OP_REG, OP_VOID);
/* orb. */
void
-OP_24B_C ()
+OP_24B_C (void)
{
uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("orb", OP_CONSTANT16, OP_REG, OP_VOID);
/* orb. */
void
-OP_25_8 ()
+OP_25_8 (void)
{
uint8 tmp, a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("orb", OP_REG, OP_REG, OP_VOID);
/* orw. */
void
-OP_26_8 ()
+OP_26_8 (void)
{
uint16 tmp, a = (OP[0]), b = (GPR (OP[1]));
trace_input ("orw", OP_CONSTANT4, OP_REG, OP_VOID);
/* orw. */
void
-OP_26B_C ()
+OP_26B_C (void)
{
uint16 tmp, a = (OP[0]), b = (GPR (OP[1]));
trace_input ("orw", OP_CONSTANT16, OP_REG, OP_VOID);
/* orw. */
void
-OP_27_8 ()
+OP_27_8 (void)
{
uint16 tmp, a = (GPR (OP[0])), b = (GPR (OP[1]));
trace_input ("orw", OP_REG, OP_REG, OP_VOID);
/* lshb. */
void
-OP_13_9 ()
+OP_13_9 (void)
{
uint16 a = OP[0];
uint16 tmp, b = (GPR (OP[1])) & 0xFF;
/* lshb. */
void
-OP_44_8 ()
+OP_44_8 (void)
{
uint16 a = (GPR (OP[0])) & 0xff;
uint16 tmp, b = (GPR (OP[1])) & 0xFF;
/* lshw. */
void
-OP_46_8 ()
+OP_46_8 (void)
{
uint16 tmp, b = GPR (OP[1]);
int16 a = GPR (OP[0]);
/* lshw. */
void
-OP_49_8 ()
+OP_49_8 (void)
{
uint16 tmp, b = GPR (OP[1]);
uint16 a = OP[0];
/* lshd. */
void
-OP_25_7 ()
+OP_25_7 (void)
{
uint32 tmp, b = GPR32 (OP[1]);
uint16 a = OP[0];
/* lshd. */
void
-OP_47_8 ()
+OP_47_8 (void)
{
uint32 tmp, b = GPR32 (OP[1]);
uint16 a = GPR (OP[0]);
/* ashub. */
void
-OP_80_9 ()
+OP_80_9 (void)
{
uint16 a = OP[0];
int8 tmp, b = (GPR (OP[1])) & 0xFF;
/* ashub. */
void
-OP_81_9 ()
+OP_81_9 (void)
{
uint16 a = OP[0];
int8 tmp, b = (GPR (OP[1])) & 0xFF;
/* ashub. */
void
-OP_41_8 ()
+OP_41_8 (void)
{
int16 a = (GPR (OP[0]));
int8 tmp, b = (GPR (OP[1])) & 0xFF;
/* ashuw. */
void
-OP_42_8 ()
+OP_42_8 (void)
{
int16 tmp, b = GPR (OP[1]);
uint16 a = OP[0];
/* ashuw. */
void
-OP_43_8 ()
+OP_43_8 (void)
{
int16 tmp, b = GPR (OP[1]);
uint16 a = OP[0];
/* ashuw. */
void
-OP_45_8 ()
+OP_45_8 (void)
{
int16 tmp;
int16 a = GPR (OP[0]), b = GPR (OP[1]);
/* ashud. */
void
-OP_26_7 ()
+OP_26_7 (void)
{
int32 tmp,b = GPR32 (OP[1]);
uint32 a = OP[0];
/* ashud. */
void
-OP_27_7 ()
+OP_27_7 (void)
{
int32 tmp;
int32 a = OP[0], b = GPR32 (OP[1]);
/* ashud. */
void
-OP_48_8 ()
+OP_48_8 (void)
{
int32 tmp;
int32 a = GPR32 (OP[0]), b = GPR32 (OP[1]);
/* storm. */
void
-OP_16_D ()
+OP_16_D (void)
{
uint32 addr = GPR (1);
uint16 count = OP[0], reg = 2;
/* stormp. */
void
-OP_17_D ()
+OP_17_D (void)
{
uint32 addr = GPR32 (6);
uint16 count = OP[0], reg = 2;
/* subb. */
void
-OP_38_8 ()
+OP_38_8 (void)
{
uint8 a = OP[0];
uint8 b = (GPR (OP[1])) & 0xff;
/* subb. */
void
-OP_38B_C ()
+OP_38B_C (void)
{
uint8 a = OP[0] & 0xFF;
uint8 b = (GPR (OP[1])) & 0xFF;
/* subb. */
void
-OP_39_8 ()
+OP_39_8 (void)
{
uint8 a = (GPR (OP[0])) & 0xFF;
uint8 b = (GPR (OP[1])) & 0xFF;
/* subw. */
void
-OP_3A_8 ()
+OP_3A_8 (void)
{
uint16 a = OP[0];
uint16 b = GPR (OP[1]);
/* subw. */
void
-OP_3AB_C ()
+OP_3AB_C (void)
{
uint16 a = OP[0];
uint16 b = GPR (OP[1]);
/* subw. */
void
-OP_3B_8 ()
+OP_3B_8 (void)
{
uint16 a = GPR (OP[0]);
uint16 b = GPR (OP[1]);
/* subcb. */
void
-OP_3C_8 ()
+OP_3C_8 (void)
{
uint8 a = OP[0];
uint8 b = (GPR (OP[1])) & 0xff;
/* subcb. */
void
-OP_3CB_C ()
+OP_3CB_C (void)
{
uint16 a = OP[0];
uint16 b = (GPR (OP[1])) & 0xff;
/* subcb. */
void
-OP_3D_8 ()
+OP_3D_8 (void)
{
uint16 a = (GPR (OP[0])) & 0xff;
uint16 b = (GPR (OP[1])) & 0xff;
/* subcw. */
void
-OP_3E_8 ()
+OP_3E_8 (void)
{
uint16 a = OP[0], b = (GPR (OP[1]));
uint16 tmp1 = a + (PSR_C);
/* subcw. */
void
-OP_3EB_C ()
+OP_3EB_C (void)
{
int16 a = OP[0];
uint16 b = GPR (OP[1]);
/* subcw. */
void
-OP_3F_8 ()
+OP_3F_8 (void)
{
uint16 a = (GPR (OP[0])), b = (GPR (OP[1]));
uint16 tmp1 = a + (PSR_C);
/* subd. */
void
-OP_3_C ()
+OP_3_C (void)
{
int32 a = OP[0];
uint32 b = GPR32 (OP[1]);
/* subd. */
void
-OP_14C_14 ()
+OP_14C_14 (void)
{
uint32 a = GPR32 (OP[0]);
uint32 b = GPR32 (OP[1]);
/* excp. */
void
-OP_C_C ()
+OP_C_C (void)
{
+ uint32 tmp;
+ uint16 a;
trace_input ("excp", OP_CONSTANT4, OP_VOID, OP_VOID);
switch (OP[0])
{
switch (FUNC)
{
#if !defined(__GO32__) && !defined(_WIN32)
+#ifdef TARGET_SYS_fork
case TARGET_SYS_fork:
trace_input ("<fork>", OP_VOID, OP_VOID, OP_VOID);
RETVAL (fork ());
trace_output_16 (result);
break;
+#endif
#define getpid() 47
case TARGET_SYS_getpid:
}
break;
+#ifdef TARGET_SYS_execve
case TARGET_SYS_execve:
trace_input ("<execve>", OP_VOID, OP_VOID, OP_VOID);
RETVAL (execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2<<16|PARM3),
(char **)MEMPTR (PARM4)));
trace_output_16 (result);
break;
+#endif
#ifdef TARGET_SYS_execv
case TARGET_SYS_execv:
break;
#endif
+#ifdef TARGET_SYS_pipe
case TARGET_SYS_pipe:
{
reg_t buf;
trace_output_16 (result);
}
break;
+#endif
#ifdef TARGET_SYS_wait
case TARGET_SYS_wait:
trace_output_32 (result);
break;
+#ifdef TARGET_SYS_rename
case TARGET_SYS_rename:
trace_input ("<rename>", OP_MEMREF, OP_MEMREF, OP_VOID);
RETVAL (cr16_callback->rename (cr16_callback,
MEMPTR ((((unsigned long)PARM4)<<16) |PARM3)));
trace_output_16 (result);
break;
+#endif
case 0x408: /* REVISIT: Added a dummy getenv call. */
trace_input ("<getenv>", OP_MEMREF, OP_MEMREF, OP_VOID);
- RETVAL32(NULL);
+ RETVAL32 (0);
trace_output_32 (result);
break;
break;
#endif
+#ifdef TARGET_SYS_chown
case TARGET_SYS_chown:
trace_input ("<chown>", OP_VOID, OP_VOID, OP_VOID);
RETVAL (chown (MEMPTR (PARM1), PARM2, PARM3));
trace_output_16 (result);
break;
+#endif
case TARGET_SYS_chmod:
trace_input ("<chmod>", OP_VOID, OP_VOID, OP_VOID);
#endif
default:
- cr16_callback->error (cr16_callback, "Unknown syscall %d", FUNC);
+ a = OP[0];
+ switch (a)
+ {
+ case TRAP_BREAKPOINT:
+ State.exception = SIGTRAP;
+ tmp = (PC);
+ JMP(tmp);
+ trace_output_void ();
+ break;
+ case SIGTRAP: /* supervisor call ? */
+ State.exception = SIG_CR16_EXIT;
+ trace_output_void ();
+ break;
+ default:
+ cr16_callback->error (cr16_callback, "Unknown syscall %d", FUNC);
+ break;
+ }
}
-
if ((uint16) result == (uint16) -1)
RETERR (cr16_callback->get_errno(cr16_callback));
else
/* push. */
void
-OP_3_9 ()
+OP_3_9 (void)
{
uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0;
uint32 tmp, sp_addr = (GPR32 (15)) - (a * 2) - 4, is_regp = 0;
/* push. */
void
-OP_1_8 ()
+OP_1_8 (void)
{
uint32 sp_addr, tmp, is_regp = 0;
uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0;
/* push. */
void
-OP_11E_10 ()
+OP_11E_10 (void)
{
uint32 sp_addr = (GPR32 (15)), tmp;
trace_input ("push", OP_VOID, OP_VOID, OP_VOID);
/* pop. */
void
-OP_5_9 ()
+OP_5_9 (void)
{
uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0;
uint32 tmp, sp_addr = (GPR32 (15)), is_regp = 0;;
/* pop. */
void
-OP_2_8 ()
+OP_2_8 (void)
{
uint16 a = OP[0] + 1, b = OP[1], c = OP[2], i = 0;
uint32 tmp, sp_addr = (GPR32 (15)), is_regp = 0;
/* pop. */
void
-OP_21E_10 ()
+OP_21E_10 (void)
{
uint32 sp_addr = GPR32 (15);
uint32 tmp;
/* popret. */
void
-OP_7_9 ()
+OP_7_9 (void)
{
uint16 a = OP[0], b = OP[1];
trace_input ("popret", OP_CONSTANT3, OP_REG, OP_REG);
/* popret. */
void
-OP_3_8 ()
+OP_3_8 (void)
{
uint16 a = OP[0], b = OP[1];
trace_input ("popret", OP_CONSTANT3, OP_REG, OP_VOID);
/* popret. */
void
-OP_31E_10 ()
+OP_31E_10 (void)
{
uint32 tmp;
trace_input ("popret", OP_VOID, OP_VOID, OP_VOID);
/* cinv[i]. */
void
-OP_A_10 ()
+OP_A_10 (void)
{
trace_input ("cinv[i]", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* cinv[i,u]. */
void
-OP_B_10 ()
+OP_B_10 (void)
{
trace_input ("cinv[i,u]", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* cinv[d]. */
void
-OP_C_10 ()
+OP_C_10 (void)
{
trace_input ("cinv[d]", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* cinv[d,u]. */
void
-OP_D_10 ()
+OP_D_10 (void)
{
trace_input ("cinv[i,u]", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* cinv[d,i]. */
void
-OP_E_10 ()
+OP_E_10 (void)
{
trace_input ("cinv[d,i]", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* cinv[d,i,u]. */
void
-OP_F_10 ()
+OP_F_10 (void)
{
trace_input ("cinv[d,i,u]", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* retx. */
void
-OP_3_10 ()
+OP_3_10 (void)
{
trace_input ("retx", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* di. */
void
-OP_4_10 ()
+OP_4_10 (void)
{
trace_input ("di", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* ei. */
void
-OP_5_10 ()
+OP_5_10 (void)
{
trace_input ("ei", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* wait. */
void
-OP_6_10 ()
+OP_6_10 (void)
{
trace_input ("wait", OP_VOID, OP_VOID, OP_VOID);
State.exception = SIGTRAP;
/* ewait. */
void
-OP_7_10 ()
+OP_7_10 (void)
{
trace_input ("ewait", OP_VOID, OP_VOID, OP_VOID);
SET_PSR_I (1);
/* xorb. */
void
-OP_28_8 ()
+OP_28_8 (void)
{
uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("xorb", OP_CONSTANT4, OP_REG, OP_VOID);
/* xorb. */
void
-OP_28B_C ()
+OP_28B_C (void)
{
uint8 tmp, a = (OP[0]) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("xorb", OP_CONSTANT16, OP_REG, OP_VOID);
/* xorb. */
void
-OP_29_8 ()
+OP_29_8 (void)
{
uint8 tmp, a = (GPR (OP[0])) & 0xff, b = (GPR (OP[1])) & 0xff;
trace_input ("xorb", OP_REG, OP_REG, OP_VOID);
/* xorw. */
void
-OP_2A_8 ()
+OP_2A_8 (void)
{
uint16 tmp, a = (OP[0]), b = (GPR (OP[1]));
trace_input ("xorw", OP_CONSTANT4, OP_REG, OP_VOID);
/* xorw. */
void
-OP_2AB_C ()
+OP_2AB_C (void)
{
uint16 tmp, a = (OP[0]), b = (GPR (OP[1]));
trace_input ("xorw", OP_CONSTANT16, OP_REG, OP_VOID);
/* xorw. */
void
-OP_2B_8 ()
+OP_2B_8 (void)
{
uint16 tmp, a = (GPR (OP[0])), b = (GPR (OP[1]));
trace_input ("xorw", OP_REG, OP_REG, OP_VOID);
/* lpr. */
void
-OP_140_14 ()
+OP_140_14 (void)
{
uint16 a = GPR (OP[0]);
trace_input ("lpr", OP_REG, OP_REG, OP_VOID);
/* lprd. */
void
-OP_141_14 ()
+OP_141_14 (void)
{
uint32 a = GPR32 (OP[0]);
trace_input ("lprd", OP_REGP, OP_REG, OP_VOID);
/* spr. */
void
-OP_142_14 ()
+OP_142_14 (void)
{
uint16 a = CREG (OP[0]);
trace_input ("spr", OP_REG, OP_REG, OP_VOID);
/* sprd. */
void
-OP_143_14 ()
+OP_143_14 (void)
{
uint32 a = CREG (OP[0]);
trace_input ("sprd", OP_REGP, OP_REGP, OP_VOID);
/* null. */
void
-OP_0_20 ()
+OP_0_20 (void)
{
trace_input ("null", OP_VOID, OP_VOID, OP_VOID);
State.exception = SIG_CR16_STOP;
projects / deliverable / binutils-gdb.git / blobdiff