Emit a warning when -z relro is unsupported

[deliverable/binutils-gdb.git] / sim / cris / Makefile.in

diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index 2c901fdcabc67fc49b947efa6513d0008d66002a..a6d9c61fb8091818ff3d87602d83ad9b5b75e773 100644 (file)
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -1,7 +1,7 @@
 # Makefile template for Configure for the CRIS simulator, based on a mix
 # of the ones for m32r and i960.
 #
-# Copyright (C) 2004-2018 Free Software Foundation, Inc.
+# Copyright (C) 2004-2020 Free Software Foundation, Inc.
 # Contributed by Axis Communications.
 #
 # This program is free software; you can redistribute it and/or modify
@@ -45,8 +45,6 @@ NL_TARGET = -DNL_TARGET_cris
 
 ## COMMON_POST_CONFIG_FRAG
 
-CGEN_CPU_DIR = $(CGENDIR)/../cpu
-
 arch = cris
 
 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h)
@@ -140,17 +138,17 @@ CGEN_MAINT = ; @true
 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
 stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
 
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
        $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
-         archfile=$(CGEN_CPU_DIR)/cris.cpu \
+         archfile=$(CPU_DIR)/cris.cpu \
          FLAGS="with-scache with-profile=fn"
        touch stamp-arch
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 
 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
-stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-         archfile=$(CGEN_CPU_DIR)/cris.cpu \
+         archfile=$(CPU_DIR)/cris.cpu \
          cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
        $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
        sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
@@ -158,9 +156,9 @@ stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DI
        touch stamp-v10fcpu
 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
 
-stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
        $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-         archfile=$(CGEN_CPU_DIR)/cris.cpu \
+         archfile=$(CPU_DIR)/cris.cpu \
          cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
        $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
        sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
@@ -168,9 +166,9 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DI
        touch stamp-v32fcpu
 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
 
-stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
+stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile
        $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
-               archfile=$(CGEN_CPU_DIR)/cris.cpu \
+               archfile=$(CPU_DIR)/cris.cpu \
                cpu=cris mach=all
        touch stamp-desc
 cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc