THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-2005 Free Software Foundation, Inc.
+Copyright 1996-2020 Free Software Foundation, Inc.
This file is part of the GNU simulators.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, see <http://www.gnu.org/licenses/>.
*/
static int
model_crisv10_nop (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
#undef FLD
}
-static int
-model_crisv10_move_c_sprv10_p0 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p0.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_crisv10_move_c_sprv10_p1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p0.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_crisv10_move_c_sprv10_p4 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p4.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_const16 (current_cpu, idesc, 0, referenced);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
- }
- return cycles;
-#undef FLD
-}
-
static int
model_crisv10_move_c_sprv10_p5 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p4.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p5.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
#undef FLD
}
-static int
-model_crisv10_move_c_sprv10_p8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
- }
- return cycles;
-#undef FLD
-}
-
static int
model_crisv10_move_c_sprv10_p9 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p10 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p11 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p12 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p13 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p7 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p14 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_move_c_sprv10_p15 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_sbfs (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_addcpc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_addspcpc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
static int
model_crisv10_jump_c (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
#undef FLD
}
+static int
+model_crisv10_bdap_32_pc (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += crisv10f_model_crisv10_u_const32 (current_cpu, idesc, 0, referenced);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_crisv10_move_m_pcplus_p0 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_crisv10_move_m_spplus_p8 (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += crisv10f_model_crisv10_u_mem (current_cpu, idesc, 0, referenced);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ cycles += crisv10f_model_crisv10_u_exec (current_cpu, idesc, 1, referenced);
+ }
+ return cycles;
+#undef FLD
+}
+
static int
model_crisv10_addo_m_b_m (SIM_CPU *current_cpu, void *sem_arg)
{
static int
model_crisv10_dip_c (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p8.f
+#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{ CRISV10F_INSN_MOVE_SPR_RV10, model_crisv10_move_spr_rv10, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_RET_TYPE, model_crisv10_ret_type, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_MOVE_M_SPRV10, model_crisv10_move_m_sprv10, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
- { CRISV10F_INSN_MOVE_C_SPRV10_P0, model_crisv10_move_c_sprv10_p0, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
- { CRISV10F_INSN_MOVE_C_SPRV10_P1, model_crisv10_move_c_sprv10_p1, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
- { CRISV10F_INSN_MOVE_C_SPRV10_P4, model_crisv10_move_c_sprv10_p4, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_MOVE_C_SPRV10_P5, model_crisv10_move_c_sprv10_p5, { { (int) UNIT_CRISV10_U_CONST16, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
- { CRISV10F_INSN_MOVE_C_SPRV10_P8, model_crisv10_move_c_sprv10_p8, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_MOVE_C_SPRV10_P9, model_crisv10_move_c_sprv10_p9, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_MOVE_C_SPRV10_P10, model_crisv10_move_c_sprv10_p10, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_MOVE_C_SPRV10_P11, model_crisv10_move_c_sprv10_p11, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_LZ, model_crisv10_lz, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_ADDOQ, model_crisv10_addoq, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_BDAPQPC, model_crisv10_bdapqpc, { { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
+ { CRISV10F_INSN_BDAP_32_PC, model_crisv10_bdap_32_pc, { { (int) UNIT_CRISV10_U_CONST32, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
+ { CRISV10F_INSN_MOVE_M_PCPLUS_P0, model_crisv10_move_m_pcplus_p0, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
+ { CRISV10F_INSN_MOVE_M_SPPLUS_P8, model_crisv10_move_m_spplus_p8, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_ADDO_M_B_M, model_crisv10_addo_m_b_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_ADDO_M_W_M, model_crisv10_addo_m_w_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
{ CRISV10F_INSN_ADDO_M_D_M, model_crisv10_addo_m_d_m, { { (int) UNIT_CRISV10_U_MEM, 1, 1 }, { (int) UNIT_CRISV10_U_EXEC, 1, 1 } } },
#define TIMING_DATA(td) 0
#endif
-static const MODEL crisv10_models[] =
+static const SIM_MODEL crisv10_models[] =
{
{ "crisv10", & crisv10_mach, MODEL_CRISV10, TIMING_DATA (& crisv10_timing[0]), crisv10_model_init },
{ 0 }
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES crisv10f_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES crisv10f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
#endif
}
-const MACH crisv10_mach =
+const SIM_MACH crisv10_mach =
{
"crisv10", "cris", MACH_CRISV10,
32, 32, & crisv10_models[0], & crisv10f_imp_properties,