For "msbu", subtract unsigned product from ACC,

[deliverable/binutils-gdb.git] / sim / d10v / ChangeLog

diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index f82bf7ebd5619c3c9af4360d0a65eb60f73b57a8..013b93d179dd97859cc442776b96ead9808e3f49 100644 (file)
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,41 @@
+Tue Dec  2 15:01:08 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * simops.c (OP_3A00): For "macu", perform multiply stage using 32
+       bit rather than 16 bit precision.
+       (OP_3C00): For "mulxu", store unsigned product in ACC.
+       (OP_3800): For "msbu", subtract unsigned product from ACC,
+
+Tue Dec  2 11:04:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * simops.c (OP_1000): For "sub2w", compute carry by comparing
+       inputs.
+
+Mon Nov 17 20:57:21 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * simops.c (OP_1): Use 32 bit unsigned arithmetic for subtract,
+       carry indicated by value > 0xffff.
+
+Fri Nov 14 12:51:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * interp.c (sim_resume): Don't set up SIGINT handler using signal,
+       handled by client.
+       (sim_resume): Fix race condition of a direct assignment to
+       stop_simulator, conditionally call sim_stop.
+       (sim_stop_reason): Check stop_simulator returning SIGINT.  Clear
+       stop_simulator ready for next sim_resume call.
+       (sim_ctrl_c): Delete function.
+
+Thu Nov 13 19:29:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * interp.c (sim_resume): For "REP", only check/update the PC when
+       a branch instruction has not been executed.
+
+Mon Nov 10 17:50:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC.  Sign
+       extend bit 44 all constants.
+       (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
+       
 Fri Oct 24 10:26:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * d10v_sim.h: Include sim-types.h.