/* Simulator for the FT32 processor
- Copyright (C) 2008-2015 Free Software Foundation, Inc.
+ Copyright (C) 2008-2020 Free Software Foundation, Inc.
Contributed by FTDI <support@ftdichip.com>
This file is part of simulators.
ft32_read_item (SIM_DESC sd, int dw, uint32_t ea)
{
sim_cpu *cpu = STATE_CPU (sd, 0);
- address_word cia = CIA_GET (cpu);
+ address_word cia = CPU_PC_GET (cpu);
uint8_t byte[4];
uint32_t r;
ft32_write_item (SIM_DESC sd, int dw, uint32_t ea, uint32_t v)
{
sim_cpu *cpu = STATE_CPU (sd, 0);
- address_word cia = CIA_GET (cpu);
+ address_word cia = CPU_PC_GET (cpu);
uint8_t byte[4];
ea = ft32_align (dw, ea);
/* Simulate some IO devices */
switch (ea)
{
+ case 0x10000:
+ return getchar ();
case 0x1fff4:
/* Read the simulator cycle timer. */
return cpu->state.cycles / 100;
cpu->state.pm_addr = d;
break;
case 0x1fc88:
- /* Write to PM */
- ft32_write_item (sd, dw, cpu->state.pm_addr, d);
+ if (cpu->state.pm_unlock)
+ {
+ /* Write to PM. */
+ ft32_write_item (sd, dw, cpu->state.pm_addr, d);
+ cpu->state.pm_addr += 4;
+ }
break;
case 0x1fffc:
/* Normal exit. */
step_once (SIM_DESC sd)
{
sim_cpu *cpu = STATE_CPU (sd, 0);
- address_word cia = CIA_GET (cpu);
+ address_word cia = CPU_PC_GET (cpu);
uint32_t inst;
uint32_t dw;
uint32_t cb;
uint32_t pa;
uint32_t aa;
uint32_t k16;
- uint32_t k8;
+ uint32_t k15;
uint32_t al;
uint32_t r_1v;
uint32_t rimmv;
uint32_t bit_len;
uint32_t upper;
uint32_t insnpc;
+ unsigned int sc[2];
+ int isize;
- if (cpu->state.cycles >= cpu->state.next_tick_cycle)
- {
- cpu->state.next_tick_cycle += 100000;
- ft32_push (sd, cpu->state.pc);
- cpu->state.pc = 12; /* interrupt 1. */
- }
inst = ft32_read_item (sd, 2, cpu->state.pc);
cpu->state.cycles += 1;
+ if ((STATE_ARCHITECTURE (sd)->mach == bfd_mach_ft32b)
+ && ft32_decode_shortcode (cpu->state.pc, inst, sc))
+ {
+ if ((cpu->state.pc & 3) == 0)
+ inst = sc[0];
+ else
+ inst = sc[1];
+ isize = 2;
+ }
+ else
+ isize = 4;
+
/* Handle "call 8" (which is FT32's "break" equivalent) here. */
if (inst == 0x00340002)
{
pa = (inst >> FT32_FLD_PA_BIT) & LSBS (FT32_FLD_PA_SIZ);
aa = (inst >> FT32_FLD_AA_BIT) & LSBS (FT32_FLD_AA_SIZ);
k16 = (inst >> FT32_FLD_K16_BIT) & LSBS (FT32_FLD_K16_SIZ);
- k8 = nsigned (8, (inst >> FT32_FLD_K8_BIT) & LSBS (FT32_FLD_K8_SIZ));
+ k15 = (inst >> FT32_FLD_K15_BIT) & LSBS (FT32_FLD_K15_SIZ);
+ if (k15 & 0x80)
+ k15 ^= 0x7f00;
+ if (k15 & 0x4000)
+ k15 -= 0x8000;
al = (inst >> FT32_FLD_AL_BIT) & LSBS (FT32_FLD_AL_SIZ);
r_1v = cpu->state.regs[r_1];
upper = (inst >> 27);
insnpc = cpu->state.pc;
- cpu->state.pc += 4;
+ cpu->state.pc += isize;
switch (upper)
{
case FT32_PAT_TOC:
break;
case FT32_PAT_LPMI:
- cpu->state.regs[r_d] = ft32_read_item (sd, dw, cpu->state.regs[r_1] + k8);
+ cpu->state.regs[r_d] = ft32_read_item (sd, dw, cpu->state.regs[r_1] + k15);
cpu->state.cycles += 1;
break;
break;
case FT32_PAT_STI:
- cpu_mem_write (sd, dw, cpu->state.regs[r_d] + k8, cpu->state.regs[r_1]);
+ cpu_mem_write (sd, dw, cpu->state.regs[r_d] + k15, cpu->state.regs[r_1]);
break;
case FT32_PAT_LDA:
break;
case FT32_PAT_LDI:
- cpu->state.regs[r_d] = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k8);
+ cpu->state.regs[r_d] = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k15);
cpu->state.cycles += 1;
break;
case FT32_PAT_EXI:
{
uint32_t tmp;
- tmp = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k8);
- cpu_mem_write (sd, dw, cpu->state.regs[r_1] + k8, cpu->state.regs[r_d]);
+ tmp = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k15);
+ cpu_mem_write (sd, dw, cpu->state.regs[r_1] + k15, cpu->state.regs[r_d]);
cpu->state.regs[r_d] = tmp;
cpu->state.cycles += 1;
}
uint32_t src = r_1v;
uint32_t dst = cpu->state.regs[r_d];
uint32_t i;
- for (i = 0; i < rimmv; i++)
+ for (i = 0; i < (rimmv & 0x7fff); i++)
PUT_BYTE (dst + i, GET_BYTE (src + i));
}
break;
/* memset instruction. */
uint32_t dst = cpu->state.regs[r_d];
uint32_t i;
- for (i = 0; i < rimmv; i++)
+ for (i = 0; i < (rimmv & 0x7fff); i++)
PUT_BYTE (dst + i, r_1v);
}
break;
}
}
-int
-sim_write (SIM_DESC sd,
- SIM_ADDR addr,
- const unsigned char *buffer,
- int size)
-{
- sim_cpu *cpu = STATE_CPU (sd, 0);
-
- return sim_core_write_buffer (sd, cpu, write_map, buffer, addr, size);
-}
-
-int
-sim_read (SIM_DESC sd,
- SIM_ADDR addr,
- unsigned char *buffer,
- int size)
-{
- sim_cpu *cpu = STATE_CPU (sd, 0);
-
- return sim_core_read_buffer (sd, cpu, read_map, buffer, addr, size);
-}
-
static uint32_t *
ft32_lookup_register (SIM_CPU *cpu, int nr)
{
static sim_cia
ft32_pc_get (SIM_CPU *cpu)
{
- return 32;
+ return cpu->state.pc;
}
static void
sim_open (SIM_OPEN_KIND kind,
host_callback *cb,
struct bfd *abfd,
- char **argv)
+ char * const *argv)
{
char c;
size_t i;
return 0;
}
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
+ /* The parser will print an error message for us, so we silently return. */
if (sim_parse_args (sd, argv) != SIM_RC_OK)
{
free_state (sd);
return sd;
}
-void
-sim_close (SIM_DESC sd, int quitting)
-{
- sim_module_uninstall (sd);
-}
-
SIM_RC
sim_create_inferior (SIM_DESC sd,
struct bfd *abfd,
- char **argv,
- char **env)
+ char * const *argv,
+ char * const *env)
{
uint32_t addr;
sim_cpu *cpu = STATE_CPU (sd, 0);
else
addr = 0;
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
+ /* Standalone mode (i.e. `run`) will take care of the argv for us in
+ sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
+ with `gdb`), we need to handle it because the user can change the
+ argv on the fly via gdb's 'run'. */
+ if (STATE_PROG_ARGV (sd) != argv)
{
freeargv (STATE_PROG_ARGV (sd));
STATE_PROG_ARGV (sd) = dupargv (argv);
projects / deliverable / binutils-gdb.git / blobdiff