THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+Copyright 1996-2010 Free Software Foundation, Inc.
This file is part of the GNU simulators.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3 of the License, or
-(at your option) any later version.
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License
-along with this program. If not, see <http://www.gnu.org/licenses/>.
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
{ M32R_INSN_BTST, M32RXF_INSN_BTST, M32RXF_SFMT_BTST, M32RXF_INSN_PAR_BTST, M32RXF_INSN_WRITE_BTST },
};
-static const struct insn_sem m32rxf_insn_sem_invalid = {
+static const struct insn_sem m32rxf_insn_sem_invalid =
+{
VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR
};
const IDESC *
m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
- CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
+ CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
ARGBUF *abuf)
{
/* Result of decoder. */
M32RXF_INSN_TYPE itype;
{
- CGEN_INSN_INT insn = base_insn;
+ CGEN_INSN_WORD insn = base_insn;
{
unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz;
- case 3 : itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz;
+ case 0 :
+ if ((entire_insn & 0xfff0) == 0x70)
+ { itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xfff0) == 0x370)
+ { itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 12 : itype = M32RXF_INSN_AND; goto extract_sfmt_add;
case 13 : itype = M32RXF_INSN_XOR; goto extract_sfmt_add;
case 14 : itype = M32RXF_INSN_OR; goto extract_sfmt_add;
- case 15 : itype = M32RXF_INSN_BTST; goto extract_sfmt_btst;
+ case 15 :
+ if ((entire_insn & 0xf8f0) == 0xf0)
+ { itype = M32RXF_INSN_BTST; goto extract_sfmt_btst; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 16 : itype = M32RXF_INSN_SRL; goto extract_sfmt_add;
case 18 : itype = M32RXF_INSN_SRA; goto extract_sfmt_add;
case 20 : itype = M32RXF_INSN_SLL; goto extract_sfmt_add;
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_JC; goto extract_sfmt_jc;
- case 1 : itype = M32RXF_INSN_JNC; goto extract_sfmt_jc;
- case 2 : itype = M32RXF_INSN_JL; goto extract_sfmt_jl;
- case 3 : itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp;
+ case 0 :
+ if ((entire_insn & 0xfff0) == 0x1cc0)
+ { itype = M32RXF_INSN_JC; goto extract_sfmt_jc; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfff0) == 0x1dc0)
+ { itype = M32RXF_INSN_JNC; goto extract_sfmt_jc; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xfff0) == 0x1ec0)
+ { itype = M32RXF_INSN_JL; goto extract_sfmt_jl; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xfff0) == 0x1fc0)
+ { itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 29 : itype = M32RXF_INSN_RTE; goto extract_sfmt_rte;
- case 31 : itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap;
+ case 29 :
+ if ((entire_insn & 0xffff) == 0x10d6)
+ { itype = M32RXF_INSN_RTE; goto extract_sfmt_rte; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 31 :
+ if ((entire_insn & 0xfff0) == 0x10f0)
+ { itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 32 : itype = M32RXF_INSN_STB; goto extract_sfmt_stb;
case 33 : itype = M32RXF_INSN_STB_PLUS; goto extract_sfmt_stb_plus;
case 34 : itype = M32RXF_INSN_STH; goto extract_sfmt_sth;
unsigned int val = (((insn >> 0) & (1 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a;
- case 1 : itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a;
+ case 0 :
+ if ((entire_insn & 0xf0f3) == 0x5070)
+ { itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xf0f3) == 0x5071)
+ { itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 88 : itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi;
- case 89 : itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi;
+ case 88 :
+ if ((entire_insn & 0xf3f2) == 0x5080)
+ { itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 89 :
+ if ((entire_insn & 0xf3f2) == 0x5090)
+ { itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 90 : itype = M32RXF_INSN_MULWU1; goto extract_sfmt_mulwu1;
case 91 : itype = M32RXF_INSN_MACWU1; goto extract_sfmt_macwu1;
case 92 : itype = M32RXF_INSN_MACLH1; goto extract_sfmt_macwu1;
case 93 : itype = M32RXF_INSN_MSBLO; goto extract_sfmt_msblo;
- case 94 : itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd;
+ case 94 :
+ if ((entire_insn & 0xffff) == 0x50e4)
+ { itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 95 :
{
unsigned int val = (((insn >> 0) & (3 << 0)));
unsigned int val = (((insn >> 7) & (15 << 1)) | ((insn >> 0) & (1 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_NOP; goto extract_sfmt_nop;
+ case 0 :
+ if ((entire_insn & 0xffff) == 0x7000)
+ { itype = M32RXF_INSN_NOP; goto extract_sfmt_nop; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 2 : /* fall through */
case 3 : itype = M32RXF_INSN_SETPSW; goto extract_sfmt_setpsw;
case 4 : /* fall through */
case 5 : itype = M32RXF_INSN_CLRPSW; goto extract_sfmt_clrpsw;
- case 9 : itype = M32RXF_INSN_SC; goto extract_sfmt_sc;
- case 11 : itype = M32RXF_INSN_SNC; goto extract_sfmt_sc;
+ case 9 :
+ if ((entire_insn & 0xffff) == 0x7401)
+ { itype = M32RXF_INSN_SC; goto extract_sfmt_sc; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 11 :
+ if ((entire_insn & 0xffff) == 0x7501)
+ { itype = M32RXF_INSN_SNC; goto extract_sfmt_sc; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 16 : /* fall through */
case 17 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8;
case 18 : /* fall through */
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 132 : itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi;
- case 133 : itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi;
+ case 132 :
+ if ((entire_insn & 0xfff00000) == 0x80400000)
+ { itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 133 :
+ if ((entire_insn & 0xfff00000) == 0x80500000)
+ { itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 134 :
{
- unsigned int val = (((insn >> -8) & (3 << 0)));
+ unsigned int val = (((entire_insn >> 8) & (3 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_SAT; goto extract_sfmt_sat;
- case 2 : itype = M32RXF_INSN_SATH; goto extract_sfmt_satb;
- case 3 : itype = M32RXF_INSN_SATB; goto extract_sfmt_satb;
+ case 0 :
+ if ((entire_insn & 0xf0f0ffff) == 0x80600000)
+ { itype = M32RXF_INSN_SAT; goto extract_sfmt_sat; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xf0f0ffff) == 0x80600200)
+ { itype = M32RXF_INSN_SATH; goto extract_sfmt_satb; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xf0f0ffff) == 0x80600300)
+ { itype = M32RXF_INSN_SATB; goto extract_sfmt_satb; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 142 : itype = M32RXF_INSN_OR3; goto extract_sfmt_or3;
case 144 :
{
- unsigned int val = (((insn >> -12) & (1 << 0)));
+ unsigned int val = (((entire_insn >> 4) & (1 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_DIV; goto extract_sfmt_div;
- case 1 : itype = M32RXF_INSN_DIVH; goto extract_sfmt_div;
+ case 0 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90000000)
+ { itype = M32RXF_INSN_DIV; goto extract_sfmt_div; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90000010)
+ { itype = M32RXF_INSN_DIVH; goto extract_sfmt_div; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 145 : itype = M32RXF_INSN_DIVU; goto extract_sfmt_div;
- case 146 : itype = M32RXF_INSN_REM; goto extract_sfmt_div;
- case 147 : itype = M32RXF_INSN_REMU; goto extract_sfmt_div;
+ case 145 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90100000)
+ { itype = M32RXF_INSN_DIVU; goto extract_sfmt_div; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 146 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90200000)
+ { itype = M32RXF_INSN_REM; goto extract_sfmt_div; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 147 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90300000)
+ { itype = M32RXF_INSN_REMU; goto extract_sfmt_div; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 152 : itype = M32RXF_INSN_SRL3; goto extract_sfmt_sll3;
case 154 : itype = M32RXF_INSN_SRA3; goto extract_sfmt_sll3;
case 156 : itype = M32RXF_INSN_SLL3; goto extract_sfmt_sll3;
- case 159 : itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16;
+ case 159 :
+ if ((entire_insn & 0xf0ff0000) == 0x90f00000)
+ { itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 160 : itype = M32RXF_INSN_STB_D; goto extract_sfmt_stb_d;
case 162 : itype = M32RXF_INSN_STH_D; goto extract_sfmt_sth_d;
case 164 : itype = M32RXF_INSN_ST_D; goto extract_sfmt_st_d;
- case 166 : itype = M32RXF_INSN_BSET; goto extract_sfmt_bset;
- case 167 : itype = M32RXF_INSN_BCLR; goto extract_sfmt_bset;
+ case 166 :
+ if ((entire_insn & 0xf8f00000) == 0xa0600000)
+ { itype = M32RXF_INSN_BSET; goto extract_sfmt_bset; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 167 :
+ if ((entire_insn & 0xf8f00000) == 0xa0700000)
+ { itype = M32RXF_INSN_BCLR; goto extract_sfmt_bset; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 168 : itype = M32RXF_INSN_LDB_D; goto extract_sfmt_ldb_d;
case 169 : itype = M32RXF_INSN_LDUB_D; goto extract_sfmt_ldb_d;
case 170 : itype = M32RXF_INSN_LDH_D; goto extract_sfmt_ldh_d;
case 172 : itype = M32RXF_INSN_LD_D; goto extract_sfmt_ld_d;
case 176 : itype = M32RXF_INSN_BEQ; goto extract_sfmt_beq;
case 177 : itype = M32RXF_INSN_BNE; goto extract_sfmt_beq;
- case 184 : itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz;
- case 185 : itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz;
- case 186 : itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz;
- case 187 : itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz;
- case 188 : itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz;
- case 189 : itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz;
- case 220 : itype = M32RXF_INSN_SETH; goto extract_sfmt_seth;
+ case 184 :
+ if ((entire_insn & 0xfff00000) == 0xb0800000)
+ { itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 185 :
+ if ((entire_insn & 0xfff00000) == 0xb0900000)
+ { itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 186 :
+ if ((entire_insn & 0xfff00000) == 0xb0a00000)
+ { itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 187 :
+ if ((entire_insn & 0xfff00000) == 0xb0b00000)
+ { itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 188 :
+ if ((entire_insn & 0xfff00000) == 0xb0c00000)
+ { itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 189 :
+ if ((entire_insn & 0xfff00000) == 0xb0d00000)
+ { itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 220 :
+ if ((entire_insn & 0xf0ff0000) == 0xd0c00000)
+ { itype = M32RXF_INSN_SETH; goto extract_sfmt_seth; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 224 : /* fall through */
case 225 : /* fall through */
case 226 : /* fall through */
unsigned int val = (((insn >> 8) & (7 << 0)));
switch (val)
{
- case 0 : itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24;
- case 1 : itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24;
- case 4 : itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24;
- case 5 : itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24;
- case 6 : itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24;
- case 7 : itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24;
+ case 0 :
+ if ((entire_insn & 0xff000000) == 0xf8000000)
+ { itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xff000000) == 0xf9000000)
+ { itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 4 :
+ if ((entire_insn & 0xff000000) == 0xfc000000)
+ { itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 5 :
+ if ((entire_insn & 0xff000000) == 0xfd000000)
+ { itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 6 :
+ if ((entire_insn & 0xff000000) == 0xfe000000)
+ { itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 7 :
+ if ((entire_insn & 0xff000000) == 0xff000000)
+ { itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24; }
+ itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
extract_sfmt_empty:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
/* Record the fields for the semantic handler. */
extract_sfmt_add:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
extract_sfmt_add3:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_and3:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_and3.f
UINT f_r1;
UINT f_r2;
extract_sfmt_or3:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_and3.f
UINT f_r1;
UINT f_r2;
extract_sfmt_addi:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_addi.f
UINT f_r1;
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
+ f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
extract_sfmt_addv:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
extract_sfmt_addv3:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_addx:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
extract_sfmt_bc8:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
+ f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
extract_sfmt_bc24:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
+ f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
extract_sfmt_beq:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_beq.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
+ f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r1) = f_r1;
extract_sfmt_beqz:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_beq.f
UINT f_r2;
SI f_disp16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
+ f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (f_r2) = f_r2;
extract_sfmt_bl8:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
+ f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
extract_sfmt_bl24:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
+ f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
extract_sfmt_bcl8:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
+ f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
extract_sfmt_bcl24:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
+ f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
extract_sfmt_bra8:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
+ f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
/* Record the fields for the semantic handler. */
FLD (i_disp8) = f_disp8;
extract_sfmt_bra24:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
+ f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
/* Record the fields for the semantic handler. */
FLD (i_disp24) = f_disp24;
extract_sfmt_cmp:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_cmpi:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r2;
INT f_simm16;
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_cmpz:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r2;
extract_sfmt_div:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
extract_sfmt_jc:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_jl.f
UINT f_r2;
extract_sfmt_jl:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_jl.f
UINT f_r2;
extract_sfmt_jmp:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_jl.f
UINT f_r2;
extract_sfmt_ld:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_ld_d:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_ldb:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_ldb_d:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_ldh:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_ldh_d:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_ld_plus:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_ld24:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld24.f
UINT f_r1;
UINT f_uimm24;
extract_sfmt_ldi8:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_addi.f
UINT f_r1;
INT f_simm8;
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
+ f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
/* Record the fields for the semantic handler. */
FLD (f_simm8) = f_simm8;
extract_sfmt_ldi16:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
INT f_simm16;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_lock:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_machi_a:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_machi_a.f
UINT f_r1;
UINT f_acc;
extract_sfmt_mulhi_a:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_machi_a.f
UINT f_r1;
UINT f_acc;
extract_sfmt_mv:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_mvfachi_a:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
UINT f_r1;
UINT f_accs;
extract_sfmt_mvfc:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_mvtachi_a:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
UINT f_r1;
UINT f_accs;
extract_sfmt_mvtc:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_nop:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
/* Record the fields for the semantic handler. */
extract_sfmt_rac_dsi:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
UINT f_accd;
UINT f_accs;
extract_sfmt_rte:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
/* Record the fields for the semantic handler. */
extract_sfmt_seth:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_seth.f
UINT f_r1;
UINT f_hi16;
extract_sfmt_sll3:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_slli:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_slli.f
UINT f_r1;
UINT f_uimm5;
extract_sfmt_st:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_st_d:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_stb:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_stb_d:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_sth:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_sth_d:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r1;
UINT f_r2;
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_st_plus:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_sth_plus:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_stb_plus:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_trap:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_trap.f
UINT f_uimm4;
extract_sfmt_unlock:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_satb:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_sat:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_sadd:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
/* Record the fields for the semantic handler. */
extract_sfmt_macwu1:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_msblo:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_mulwu1:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
extract_sfmt_sc:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
+#define FLD(f) abuf->fields.sfmt_empty.f
/* Record the fields for the semantic handler. */
extract_sfmt_clrpsw:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_clrpsw.f
UINT f_uimm8;
extract_sfmt_setpsw:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_clrpsw.f
UINT f_uimm8;
extract_sfmt_bset:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bset.f
UINT f_uimm3;
UINT f_r2;
f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3);
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
+ f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
/* Record the fields for the semantic handler. */
FLD (f_simm16) = f_simm16;
extract_sfmt_btst:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
+ CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bset.f
UINT f_uimm3;
UINT f_r2;
projects / deliverable / binutils-gdb.git / blobdiff