THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+Copyright 1996-2020 Free Software Foundation, Inc.
-This file is part of the GNU Simulators.
+This file is part of the GNU simulators.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, see <http://www.gnu.org/licenses/>.
*/
/* Model handlers for each insn. */
-static int
-model_m32rx_x_invalid (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_x_after (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_x_before (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_x_cti_chain (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_x_chain (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_x_begin (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
- }
- return cycles;
-#undef FLD
-}
-
static int
model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_and3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_and3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_or3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_and3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_and3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_and3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_addi.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_addi.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
- sr = FLD (in_dr);
- referenced |= 1 << 0;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_addv.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_addv3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_addx.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_beq.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl8.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_bl24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
+ INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmp.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmpi.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_d.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmp.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmpi.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_d.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmp.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmpz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_div.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_div.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_div.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_div.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_div.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_jl.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_jl.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_jl.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_jl.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ in_sr = FLD (in_sr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr);
+ cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
static int
model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ld.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ld_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldb.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldb_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldh.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldh_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldb.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldb_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldh.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldh_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ld_plus.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_sr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_sr);
+ out_dr = FLD (out_sr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ld24.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld24.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldi8.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_addi.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_ldi16.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_lock.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_machi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_machi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_machi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_machi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_machi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mv.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvfachi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvfachi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvfachi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvfc.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvtachi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_src1);
- referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_src1);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvtachi_a.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_src1);
- referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_src1);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mvtc.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mv.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_nop.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mv.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_rac_dsi.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_rac_dsi.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_rac_dsi.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_rac_dsi.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_seth.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_seth.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ out_dr = FLD (out_dr);
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sll3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_slli.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sll3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_slli.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sll3.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add3.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_slli.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_slli.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_st.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_st_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_d.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_stb.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_stb_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_d.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sth.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sth_d.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_d.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_st_plus.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_src2);
- sr = FLD (in_src2);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_sth_plus (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr);
+ referenced |= 1 << 1;
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
-model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
+model_m32rx_stb_plus (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_st_plus.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = 0;
- INT src2 = 0;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- dr = FLD (out_src2);
- sr = FLD (in_src2);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_src1 = 0;
+ INT in_src2 = 0;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr);
+ referenced |= 1 << 1;
+ cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
+ }
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_dr = FLD (in_src2);
+ out_dr = FLD (out_src2);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_add.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_addv.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_addx.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_add.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ in_dr = FLD (in_dr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
+ referenced |= 1 << 1;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_trap.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_unlock.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = 0;
- INT dr = 0;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr);
+ INT in_sr = 0;
+ INT out_dr = 0;
+ cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_satb.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_satb.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sat.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- sr = FLD (in_sr);
- dr = FLD (out_dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ out_dr = FLD (out_dr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_cmpz.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src2 = FLD (in_src2);
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_sadd.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_macwu1.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_msblo.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_mulwu1.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.fmt_macwu1.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT src1 = -1;
- INT src2 = -1;
- src1 = FLD (in_src1);
- src2 = FLD (in_src2);
+ INT in_src1 = -1;
+ INT in_src2 = -1;
+ in_src1 = FLD (in_src1);
+ in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2);
+ cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
static int
model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
static int
model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg)
{
-#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
- ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+#define FLD(f) abuf->fields.sfmt_empty.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_clrpsw (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_clrpsw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_setpsw (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_clrpsw.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_bset (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_bset.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ referenced |= 1 << 0;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_bclr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_bset.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
- INT sr = -1;
- INT sr2 = -1;
- INT dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr);
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ referenced |= 1 << 0;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+ }
+ return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_btst (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_bset.f
+ const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+ const IDESC * UNUSED idesc = abuf->idesc;
+ int cycles = 0;
+ {
+ int referenced = 0;
+ int UNUSED insn_referenced = abuf->written;
+ INT in_sr = -1;
+ INT in_dr = -1;
+ INT out_dr = -1;
+ in_sr = FLD (in_sr);
+ referenced |= 1 << 0;
+ cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
/* Model timing data for `m32rx'. */
static const INSN_TIMING m32rx_timing[] = {
- { M32RXF_INSN_X_INVALID, model_m32rx_x_invalid, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_AFTER, model_m32rx_x_after, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_BEFORE, model_m32rx_x_before, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_CTI_CHAIN, model_m32rx_x_cti_chain, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_CHAIN, model_m32rx_x_chain, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_BEGIN, model_m32rx_x_begin, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_X_INVALID, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_X_AFTER, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_X_BEFORE, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_X_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_X_BEGIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_ADD, model_m32rx_add, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_ADD3, model_m32rx_add3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_AND, model_m32rx_and, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_STH, model_m32rx_sth, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
{ M32RXF_INSN_STH_D, model_m32rx_sth_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
{ M32RXF_INSN_ST_PLUS, model_m32rx_st_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
+ { M32RXF_INSN_STH_PLUS, model_m32rx_sth_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
+ { M32RXF_INSN_STB_PLUS, model_m32rx_stb_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
{ M32RXF_INSN_ST_MINUS, model_m32rx_st_minus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
{ M32RXF_INSN_SUB, model_m32rx_sub, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_SUBV, model_m32rx_subv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_MACLH1, model_m32rx_maclh1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
{ M32RXF_INSN_SC, model_m32rx_sc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
{ M32RXF_INSN_SNC, model_m32rx_snc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_CLRPSW, model_m32rx_clrpsw, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_SETPSW, model_m32rx_setpsw, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_BSET, model_m32rx_bset, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_BCLR, model_m32rx_bclr, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+ { M32RXF_INSN_BTST, model_m32rx_btst, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
};
#endif /* WITH_PROFILE_MODEL_P */
#define TIMING_DATA(td) 0
#endif
-static const MODEL m32rx_models[] =
+static const SIM_MODEL m32rx_models[] =
{
{ "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init },
{ 0 }
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES m32rxf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
#endif
};
+
+static void
+m32rxf_prepare_run (SIM_CPU *cpu)
+{
+ if (CPU_IDESC (cpu) == NULL)
+ m32rxf_init_idesc_table (cpu);
+}
+
static const CGEN_INSN *
-m32rxf_opcode (SIM_CPU *cpu, int inum)
+m32rxf_get_idata (SIM_CPU *cpu, int inum)
{
- return CPU_IDESC (cpu) [inum].opcode;
+ return CPU_IDESC (cpu) [inum].idata;
}
-/* start-sanitize-m32rx */
static void
m32rx_init_cpu (SIM_CPU *cpu)
{
CPU_REG_STORE (cpu) = m32rxf_store_register;
CPU_PC_FETCH (cpu) = m32rxf_h_pc_get;
CPU_PC_STORE (cpu) = m32rxf_h_pc_set;
- CPU_OPCODE (cpu) = m32rxf_opcode;
- CPU_MAX_INSNS (cpu) = M32RXF_INSN_MAX;
+ CPU_GET_IDATA (cpu) = m32rxf_get_idata;
+ CPU_MAX_INSNS (cpu) = M32RXF_INSN__MAX;
CPU_INSN_NAME (cpu) = cgen_insn_name;
CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full;
#if WITH_FAST
#else
CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_full;
#endif
- m32rxf_init_idesc_table (cpu);
}
-const MACH m32rx_mach =
+const SIM_MACH m32rx_mach =
{
- "m32rx", "m32rx",
+ "m32rx", "m32rx", MACH_M32RX,
32, 32, & m32rx_models[0], & m32rxf_imp_properties,
- m32rx_init_cpu
+ m32rx_init_cpu,
+ m32rxf_prepare_run
};
-/* end-sanitize-m32rx */