PR26132, ar creates invalid libraries for some targets with plugins enabled

[deliverable/binutils-gdb.git] / sim / m32r / modelx.c

diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c
index 5eb3601eda1dfd40e0c9e2898526f13dab0b0a7a..a17493ddb8b9a8b2e0f6bb00960480e0dc17cbcf 100644 (file)
--- a/sim/m32r/modelx.c
+++ b/sim/m32r/modelx.c
@@ -2,23 +2,22 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+Copyright 1996-2020 Free Software Foundation, Inc.
 
-This file is part of the GNU Simulators.
+This file is part of the GNU simulators.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+   You should have received a copy of the GNU General Public License along
+   with this program; if not, see <http://www.gnu.org/licenses/>.
 
 */
 
@@ -37,21 +36,23 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 static int
 model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -60,21 +61,21 @@ model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add3.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -83,21 +84,23 @@ model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -106,21 +109,21 @@ model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and3.f
+#define FLD(f) abuf->fields.sfmt_and3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -129,21 +132,23 @@ model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -152,21 +157,21 @@ model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_or3.f
+#define FLD(f) abuf->fields.sfmt_and3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -175,21 +180,23 @@ model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -198,21 +205,21 @@ model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and3.f
+#define FLD(f) abuf->fields.sfmt_and3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -221,21 +228,21 @@ model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
-    sr = FLD (in_dr);
-    referenced |= 1 << 0;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -244,21 +251,23 @@ model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addv.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -267,21 +276,21 @@ model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addv3.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -290,21 +299,23 @@ model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addx.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -313,16 +324,16 @@ model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
+#define FLD(f) abuf->fields.sfmt_bl8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -331,16 +342,16 @@ model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
+#define FLD(f) abuf->fields.sfmt_bl24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -349,27 +360,27 @@ model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -378,25 +389,25 @@ model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -405,25 +416,25 @@ model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -432,25 +443,25 @@ model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -459,25 +470,25 @@ model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -486,25 +497,25 @@ model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -513,25 +524,25 @@ model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -540,16 +551,16 @@ model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
+#define FLD(f) abuf->fields.sfmt_bl8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -558,16 +569,16 @@ model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
+#define FLD(f) abuf->fields.sfmt_bl24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -576,16 +587,16 @@ model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
+#define FLD(f) abuf->fields.sfmt_bl8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -594,16 +605,16 @@ model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
+#define FLD(f) abuf->fields.sfmt_bl24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -612,16 +623,16 @@ model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
+#define FLD(f) abuf->fields.sfmt_bl8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -630,16 +641,16 @@ model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
+#define FLD(f) abuf->fields.sfmt_bl24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -648,27 +659,27 @@ model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
+#define FLD(f) abuf->fields.sfmt_beq.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -677,16 +688,16 @@ model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
+#define FLD(f) abuf->fields.sfmt_bl8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -695,16 +706,16 @@ model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
+#define FLD(f) abuf->fields.sfmt_bl24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -713,16 +724,16 @@ model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
+#define FLD(f) abuf->fields.sfmt_bl8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -731,16 +742,16 @@ model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
+#define FLD(f) abuf->fields.sfmt_bl24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
+    INT in_sr = -1;
     if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -749,20 +760,20 @@ model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -771,18 +782,18 @@ model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_st_d.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -791,20 +802,20 @@ model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -813,18 +824,18 @@ model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_st_d.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -833,20 +844,20 @@ model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -855,18 +866,18 @@ model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpz.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -875,21 +886,23 @@ model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -898,21 +911,23 @@ model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -921,21 +936,23 @@ model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -944,21 +961,23 @@ model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -967,21 +986,23 @@ model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -990,18 +1011,18 @@ model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
+#define FLD(f) abuf->fields.sfmt_jl.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    sr = FLD (in_sr);
+    INT in_sr = -1;
+    in_sr = FLD (in_sr);
     if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -1010,18 +1031,18 @@ model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
+#define FLD(f) abuf->fields.sfmt_jl.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    sr = FLD (in_sr);
+    INT in_sr = -1;
+    in_sr = FLD (in_sr);
     if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
     if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -1030,18 +1051,18 @@ model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
+#define FLD(f) abuf->fields.sfmt_jl.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    sr = FLD (in_sr);
+    INT in_sr = -1;
+    in_sr = FLD (in_sr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -1050,18 +1071,18 @@ model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_jl.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    sr = FLD (in_sr);
+    INT in_sr = -1;
+    in_sr = FLD (in_sr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, sr);
+    cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
   }
   return cycles;
 #undef FLD
@@ -1070,20 +1091,20 @@ model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1092,20 +1113,20 @@ model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_d.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1114,20 +1135,20 @@ model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldb.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1136,20 +1157,20 @@ model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldb_d.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1158,20 +1179,20 @@ model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldh.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1180,20 +1201,20 @@ model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldh_d.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1202,20 +1223,20 @@ model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldb.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1224,20 +1245,20 @@ model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldb_d.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1246,20 +1267,20 @@ model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldh.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1268,20 +1289,20 @@ model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldh_d.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1290,32 +1311,32 @@ model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld_plus.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_sr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_sr);
+    out_dr = FLD (out_sr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1324,19 +1345,19 @@ model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld24.f
+#define FLD(f) abuf->fields.sfmt_ld24.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1345,19 +1366,19 @@ model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi8.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1366,19 +1387,19 @@ model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi16.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1387,20 +1408,20 @@ model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lock.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1409,20 +1430,20 @@ model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_machi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1431,20 +1452,20 @@ model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_machi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1453,20 +1474,20 @@ model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_machi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1475,20 +1496,20 @@ model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_machi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1497,21 +1518,23 @@ model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1520,20 +1543,20 @@ model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1542,20 +1565,20 @@ model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1564,20 +1587,20 @@ model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1586,20 +1609,20 @@ model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulhi_a.f
+#define FLD(f) abuf->fields.sfmt_machi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1608,21 +1631,21 @@ model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mv.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1631,19 +1654,19 @@ model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvfachi_a.f
+#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1652,19 +1675,19 @@ model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvfachi_a.f
+#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1673,19 +1696,19 @@ model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvfachi_a.f
+#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1694,19 +1717,19 @@ model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvfc.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1715,19 +1738,18 @@ model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvtachi_a.f
+#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_src1);
-    referenced |= 1 << 0;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_src1);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1736,19 +1758,18 @@ model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvtachi_a.f
+#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_src1);
-    referenced |= 1 << 0;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_src1);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1757,19 +1778,19 @@ model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mvtc.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
     referenced |= 1 << 0;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1778,21 +1799,21 @@ model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mv.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1801,17 +1822,17 @@ model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_nop.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1820,21 +1841,21 @@ model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mv.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1843,16 +1864,16 @@ model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_rac_dsi.f
+#define FLD(f) abuf->fields.sfmt_rac_dsi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1861,16 +1882,16 @@ model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_rac_dsi.f
+#define FLD(f) abuf->fields.sfmt_rac_dsi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -1879,17 +1900,17 @@ model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1898,19 +1919,19 @@ model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_seth.f
+#define FLD(f) abuf->fields.sfmt_seth.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    out_dr = FLD (out_dr);
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1919,21 +1940,23 @@ model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1942,21 +1965,21 @@ model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sll3.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1965,19 +1988,21 @@ model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_slli.f
+#define FLD(f) abuf->fields.sfmt_slli.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -1986,21 +2011,23 @@ model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2009,21 +2036,21 @@ model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sll3.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2032,19 +2059,21 @@ model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_slli.f
+#define FLD(f) abuf->fields.sfmt_slli.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2053,21 +2082,23 @@ model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2076,21 +2107,21 @@ model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sll3.f
+#define FLD(f) abuf->fields.sfmt_add3.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2099,19 +2130,21 @@ model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_slli.f
+#define FLD(f) abuf->fields.sfmt_slli.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2120,20 +2153,20 @@ model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2142,20 +2175,20 @@ model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_d.f
+#define FLD(f) abuf->fields.sfmt_st_d.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2164,20 +2197,20 @@ model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stb.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2186,20 +2219,20 @@ model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stb_d.f
+#define FLD(f) abuf->fields.sfmt_st_d.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2208,20 +2241,20 @@ model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sth.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2230,20 +2263,20 @@ model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sth_d.f
+#define FLD(f) abuf->fields.sfmt_st_d.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2252,66 +2285,126 @@ model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_plus.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_src2);
-    sr = FLD (in_src2);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_src2);
+    out_dr = FLD (out_src2);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_sth_plus (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
-    referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, sr, sr2, dr);
+    referenced |= 1 << 1;
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
+  }
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_src2);
+    out_dr = FLD (out_src2);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
 }
 
 static int
-model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
+model_m32rx_stb_plus (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st_plus.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = 0;
-    INT src2 = 0;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    dr = FLD (out_src2);
-    sr = FLD (in_src2);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_src2);
+    out_dr = FLD (out_src2);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_st_plus.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_src1 = 0;
+    INT in_src2 = 0;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
-    referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, sr, sr2, dr);
+    referenced |= 1 << 1;
+    cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
+  }
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_dr = FLD (in_src2);
+    out_dr = FLD (out_src2);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2320,21 +2413,23 @@ model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2343,21 +2438,23 @@ model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addv.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2366,21 +2463,23 @@ model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addx.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    in_dr = FLD (in_dr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
+    referenced |= 1 << 1;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2389,17 +2488,17 @@ model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
+#define FLD(f) abuf->fields.sfmt_trap.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2408,16 +2507,16 @@ model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_unlock.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = 0;
-    INT dr = 0;
-    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, sr, dr);
+    INT in_sr = 0;
+    INT out_dr = 0;
+    cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2426,21 +2525,21 @@ model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_satb.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2449,21 +2548,21 @@ model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_satb.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2472,21 +2571,21 @@ model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sat.f
+#define FLD(f) abuf->fields.sfmt_ld_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    sr = FLD (in_sr);
-    dr = FLD (out_dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    out_dr = FLD (out_dr);
     if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
     referenced |= 1 << 2;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2495,18 +2594,18 @@ model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpz.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2515,16 +2614,16 @@ model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_sadd.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2533,20 +2632,20 @@ model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_macwu1.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2555,20 +2654,20 @@ model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_msblo.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2577,20 +2676,20 @@ model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulwu1.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2599,20 +2698,20 @@ model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_macwu1.f
+#define FLD(f) abuf->fields.sfmt_st_plus.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT src1 = -1;
-    INT src2 = -1;
-    src1 = FLD (in_src1);
-    src2 = FLD (in_src2);
+    INT in_src1 = -1;
+    INT in_src2 = -1;
+    in_src1 = FLD (in_src1);
+    in_src2 = FLD (in_src2);
     referenced |= 1 << 0;
     referenced |= 1 << 1;
-    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, src1, src2);
+    cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
   }
   return cycles;
 #undef FLD
@@ -2621,17 +2720,17 @@ model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2640,17 +2739,118 @@ model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_sc.f
+#define FLD(f) abuf->fields.sfmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
   {
     int referenced = 0;
     int UNUSED insn_referenced = abuf->written;
-    INT sr = -1;
-    INT sr2 = -1;
-    INT dr = -1;
-    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, sr, sr2, dr);
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_clrpsw (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_clrpsw.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_setpsw (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_clrpsw.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_bset (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_bset.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    referenced |= 1 << 0;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_bclr (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_bset.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    referenced |= 1 << 0;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
+  }
+  return cycles;
+#undef FLD
+}
+
+static int
+model_m32rx_btst (SIM_CPU *current_cpu, void *sem_arg)
+{
+#define FLD(f) abuf->fields.sfmt_bset.f
+  const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
+  const IDESC * UNUSED idesc = abuf->idesc;
+  int cycles = 0;
+  {
+    int referenced = 0;
+    int UNUSED insn_referenced = abuf->written;
+    INT in_sr = -1;
+    INT in_dr = -1;
+    INT out_dr = -1;
+    in_sr = FLD (in_sr);
+    referenced |= 1 << 0;
+    cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
   }
   return cycles;
 #undef FLD
@@ -2770,6 +2970,8 @@ static const INSN_TIMING m32rx_timing[] = {
   { M32RXF_INSN_STH, model_m32rx_sth, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
   { M32RXF_INSN_STH_D, model_m32rx_sth_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
   { M32RXF_INSN_ST_PLUS, model_m32rx_st_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
+  { M32RXF_INSN_STH_PLUS, model_m32rx_sth_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
+  { M32RXF_INSN_STB_PLUS, model_m32rx_stb_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
   { M32RXF_INSN_ST_MINUS, model_m32rx_st_minus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
   { M32RXF_INSN_SUB, model_m32rx_sub, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
   { M32RXF_INSN_SUBV, model_m32rx_subv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
@@ -2787,6 +2989,11 @@ static const INSN_TIMING m32rx_timing[] = {
   { M32RXF_INSN_MACLH1, model_m32rx_maclh1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
   { M32RXF_INSN_SC, model_m32rx_sc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
   { M32RXF_INSN_SNC, model_m32rx_snc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+  { M32RXF_INSN_CLRPSW, model_m32rx_clrpsw, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+  { M32RXF_INSN_SETPSW, model_m32rx_setpsw, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+  { M32RXF_INSN_BSET, model_m32rx_bset, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+  { M32RXF_INSN_BCLR, model_m32rx_bclr, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
+  { M32RXF_INSN_BTST, model_m32rx_btst, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
 };
 
 #endif /* WITH_PROFILE_MODEL_P */
@@ -2803,7 +3010,7 @@ m32rx_model_init (SIM_CPU *cpu)
 #define TIMING_DATA(td) 0
 #endif
 
-static const MODEL m32rx_models[] =
+static const SIM_MODEL m32rx_models[] =
 {
   { "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init },
   { 0 }
@@ -2811,7 +3018,7 @@ static const MODEL m32rx_models[] =
 
 /* The properties of this cpu's implementation.  */
 
-static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES m32rxf_imp_properties =
 {
   sizeof (SIM_CPU),
 #if WITH_SCACHE
@@ -2821,13 +3028,20 @@ static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
 #endif
 };
 
+
+static void
+m32rxf_prepare_run (SIM_CPU *cpu)
+{
+  if (CPU_IDESC (cpu) == NULL)
+    m32rxf_init_idesc_table (cpu);
+}
+
 static const CGEN_INSN *
-m32rxf_opcode (SIM_CPU *cpu, int inum)
+m32rxf_get_idata (SIM_CPU *cpu, int inum)
 {
-  return CPU_IDESC (cpu) [inum].opcode;
+  return CPU_IDESC (cpu) [inum].idata;
 }
 
-/* start-sanitize-m32rx */
 static void
 m32rx_init_cpu (SIM_CPU *cpu)
 {
@@ -2835,8 +3049,8 @@ m32rx_init_cpu (SIM_CPU *cpu)
   CPU_REG_STORE (cpu) = m32rxf_store_register;
   CPU_PC_FETCH (cpu) = m32rxf_h_pc_get;
   CPU_PC_STORE (cpu) = m32rxf_h_pc_set;
-  CPU_OPCODE (cpu) = m32rxf_opcode;
-  CPU_MAX_INSNS (cpu) = M32RXF_INSN_MAX;
+  CPU_GET_IDATA (cpu) = m32rxf_get_idata;
+  CPU_MAX_INSNS (cpu) = M32RXF_INSN__MAX;
   CPU_INSN_NAME (cpu) = cgen_insn_name;
   CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full;
 #if WITH_FAST
@@ -2844,14 +3058,13 @@ m32rx_init_cpu (SIM_CPU *cpu)
 #else
   CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_full;
 #endif
-  m32rxf_init_idesc_table (cpu);
 }
 
-const MACH m32rx_mach =
+const SIM_MACH m32rx_mach =
 {
-  "m32rx", "m32rx",
+  "m32rx", "m32rx", MACH_M32RX,
   32, 32, & m32rx_models[0], & m32rxf_imp_properties,
-  m32rx_init_cpu
+  m32rx_init_cpu,
+  m32rxf_prepare_run
 };
 
-/* end-sanitize-m32rx */