/* dv-m68hc11.c -- CPU 68HC11&68HC12 as a device.
- Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
+ Copyright (C) 1999-2020 Free Software Foundation, Inc.
+ Written by Stephane Carrez (stcarrez@nerim.fr)
(From a driver model Contributed by Cygnus Solutions.)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
-
+
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "sim-hw.h"
#include "hw-main.h"
#include "sim-options.h"
+#include "hw-base.h"
#include <limits.h>
/* DEVICE
SET_PORT_A,
SET_PORT_C,
SET_PORT_D,
+ CPU_WRITE_PORT,
PORT_A,
PORT_B,
PORT_C,
{ "set-port-c", SET_PORT_C, 0, input_port, },
{ "set-port-d", SET_PORT_D, 0, input_port, },
+ { "cpu-write-port", CPU_WRITE_PORT, 0, input_port, },
+
/* Events generated for connection to other devices. */
{ "cpu-reset", CPU_RESET_PORT, 0, output_port, },
cpu->cpu_frequency = 8*1000*1000;
}
+ if (hw_find_property (me, "use_bank") != NULL)
+ hw_attach_address (hw_parent (me), 0,
+ exec_map,
+ cpu->bank_start,
+ cpu->bank_end - cpu->bank_start,
+ me);
+
cpu_mode = "expanded";
if (hw_find_property (me, "mode") != NULL)
cpu_mode = hw_find_string_property (me, "mode");
{
struct m68hc11cpu *controller = hw_data (me);
SIM_DESC sd;
- sim_cpu* cpu;
+ sim_cpu *cpu;
sd = hw_system (me);
cpu = STATE_CPU (sd, 0);
m68hc11cpu_set_port (me, cpu, M6811_PORTD, level);
break;
+ case CPU_WRITE_PORT:
+ break;
+
default:
hw_abort (me, "bad switch");
break;
" %d %d %35.35s\n",
osc->name, freq,
cur_value, next_value,
- cycle_to_string (cpu, t));
+ cycle_to_string (cpu, t,
+ PRINT_TIME | PRINT_CYCLE));
else
sim_io_printf (sd, " %4.4s %8.8s hz "
" %d %d %35.35s\n",
osc->name, freq,
cur_value, next_value,
- cycle_to_string (cpu, t));
+ cycle_to_string (cpu, t,
+ PRINT_TIME | PRINT_CYCLE));
}
}
break;
sd = hw_system (me);
cpu = STATE_CPU (sd, 0);
+ if (base >= cpu->bank_start && base < cpu->bank_end)
+ {
+ address_word virt_addr = phys_to_virt (cpu, base);
+ if (virt_addr != base)
+ return sim_core_read_buffer (sd, cpu, space, dest,
+ virt_addr, nr_bytes);
+ }
+
/* Handle reads for the sub-devices. */
base -= controller->attach_address;
result = sim_core_read_buffer (sd, cpu,
break;
memcpy (dest, &cpu->ios[base], 1);
- dest++;
+ dest = (char*) dest + 1;
base++;
byte++;
nr_bytes--;
/* Update IO mapping. Detach from the old address
and attach to the new one. */
- if ((old_bank & 0xF0) != (val & 0xF0))
+ if ((old_bank & 0x0F) != (val & 0x0F))
{
struct m68hc11cpu *controller = hw_data (me);
controller->attach_size,
me);
}
- if ((old_bank & 0x0F) != (val & 0x0F))
+ if ((old_bank & 0xF0) != (val & 0xF0))
{
;
}
sd = hw_system (me);
cpu = STATE_CPU (sd, 0);
+
+ if (base >= cpu->bank_start && base < cpu->bank_end)
+ {
+ address_word virt_addr = phys_to_virt (cpu, base);
+ if (virt_addr != base)
+ return sim_core_write_buffer (sd, cpu, space, source,
+ virt_addr, nr_bytes);
+ }
base -= controller->attach_address;
result = sim_core_write_buffer (sd, cpu,
io_map, source, base, nr_bytes);
val = *((uint8*) source);
m68hc11cpu_io_write (me, cpu, base, val);
- source++;
+ source = (char*) source + 1;
base++;
byte++;
nr_bytes--;