/* Simulator for Xilinx MicroBlaze processor
- Copyright 2009-2015 Free Software Foundation, Inc.
+ Copyright 2009-2016 Free Software Foundation, Inc.
This file is part of GDB, the GNU debugger.
}
}
-/* TODO: Convert to common tracing framework. */
-static int issue_messages = 0;
-
-static void /* INLINE */
-wbat (SIM_CPU *cpu, word x, word v)
-{
- if (((uword)x) >= CPU.msize)
- {
- if (issue_messages)
- fprintf (stderr, "byte write to 0x%x outside memory range\n", x);
-
- CPU.exception = SIGSEGV;
- }
- else
- {
- unsigned char *p = CPU.memory + x;
- p[0] = v;
- }
-}
-
-static void /* INLINE */
-wlat (SIM_CPU *cpu, word x, word v)
-{
- if (((uword)x) >= CPU.msize)
- {
- if (issue_messages)
- fprintf (stderr, "word write to 0x%x outside memory range\n", x);
-
- CPU.exception = SIGSEGV;
- }
- else
- {
- if ((x & 3) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "word write to unaligned memory address: 0x%x\n", x);
-
- CPU.exception = SIGBUS;
- }
- else if (!target_big_endian)
- {
- unsigned char *p = CPU.memory + x;
- p[3] = v >> 24;
- p[2] = v >> 16;
- p[1] = v >> 8;
- p[0] = v;
- }
- else
- {
- unsigned char *p = CPU.memory + x;
- p[0] = v >> 24;
- p[1] = v >> 16;
- p[2] = v >> 8;
- p[3] = v;
- }
- }
-}
-
-static void /* INLINE */
-what (SIM_CPU *cpu, word x, word v)
-{
- if (((uword)x) >= CPU.msize)
- {
- if (issue_messages)
- fprintf (stderr, "short write to 0x%x outside memory range\n", x);
-
- CPU.exception = SIGSEGV;
- }
- else
- {
- if ((x & 1) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "short write to unaligned memory address: 0x%x\n",
- x);
-
- CPU.exception = SIGBUS;
- }
- else if (!target_big_endian)
- {
- unsigned char *p = CPU.memory + x;
- p[1] = v >> 8;
- p[0] = v;
- }
- else
- {
- unsigned char *p = CPU.memory + x;
- p[0] = v >> 8;
- p[1] = v;
- }
- }
-}
-
-/* Read functions. */
-static int /* INLINE */
-rbat (SIM_CPU *cpu, word x)
-{
- if (((uword)x) >= CPU.msize)
- {
- if (issue_messages)
- fprintf (stderr, "byte read from 0x%x outside memory range\n", x);
-
- CPU.exception = SIGSEGV;
- return 0;
- }
- else
- {
- unsigned char *p = CPU.memory + x;
- return p[0];
- }
-}
-
-static int /* INLINE */
-rlat (SIM_CPU *cpu, word x)
-{
- if (((uword) x) >= CPU.msize)
- {
- if (issue_messages)
- fprintf (stderr, "word read from 0x%x outside memory range\n", x);
-
- CPU.exception = SIGSEGV;
- return 0;
- }
- else
- {
- if ((x & 3) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "word read from unaligned address: 0x%x\n", x);
-
- CPU.exception = SIGBUS;
- return 0;
- }
- else if (! target_big_endian)
- {
- unsigned char *p = CPU.memory + x;
- return (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
- }
- else
- {
- unsigned char *p = CPU.memory + x;
- return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
- }
- }
-}
-
-static int /* INLINE */
-rhat (SIM_CPU *cpu, word x)
-{
- if (((uword)x) >= CPU.msize)
- {
- if (issue_messages)
- fprintf (stderr, "short read from 0x%x outside memory range\n", x);
-
- CPU.exception = SIGSEGV;
- return 0;
- }
- else
- {
- if ((x & 1) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "short read from unaligned address: 0x%x\n", x);
-
- CPU.exception = SIGBUS;
- return 0;
- }
- else if (!target_big_endian)
- {
- unsigned char *p = CPU.memory + x;
- return (p[1] << 8) | p[0];
- }
- else
- {
- unsigned char *p = CPU.memory + x;
- return (p[0] << 8) | p[1];
- }
- }
-}
-
-/* TODO: Delete all sim_size and use common memory functions. */
-/* Default to a 8 Mbyte (== 2^23) memory space. */
-static int sim_memory_size = 1 << 23;
-
-#define MEM_SIZE_FLOOR 64
-static void
-sim_size (SIM_CPU *cpu, int size)
-{
- sim_memory_size = size;
- CPU.msize = sim_memory_size;
-
- if (CPU.memory)
- free (CPU.memory);
-
- CPU.memory = (unsigned char *) calloc (1, CPU.msize);
-
- if (!CPU.memory)
- {
- if (issue_messages)
- fprintf (stderr,
- "Not enough VM for simulation of %ld bytes of RAM\n",
- CPU.msize);
-
- CPU.msize = 1;
- CPU.memory = (unsigned char *) calloc (1, 1);
- }
-}
-
-static void
-init_pointers (SIM_CPU *cpu)
-{
- if (CPU.msize != (sim_memory_size))
- sim_size (cpu, sim_memory_size);
-}
-
static void
set_initial_gprs (SIM_CPU *cpu)
{
int i;
long space;
- unsigned long memsize;
-
- init_pointers (cpu);
/* Set up machine just out of reset. */
PC = 0;
MSR = 0;
- memsize = CPU.msize / (1024 * 1024);
-
- if (issue_messages > 1)
- fprintf (stderr, "Simulated memory of %ld Mbytes (0x0 .. 0x%08lx)\n",
- memsize, CPU.msize - 1);
-
/* Clean out the GPRs */
for (i = 0; i < 32; i++)
CPU.regs[i] = 0;
static int tracing = 0;
void
-sim_resume (SIM_DESC sd, int step, int siggnal)
+sim_engine_run (SIM_DESC sd,
+ int next_cpu_nr, /* ignore */
+ int nr_cpus, /* ignore */
+ int siggnal) /* ignore */
{
SIM_CPU *cpu = STATE_CPU (sd, 0);
int needfetch;
short num_delay_slot; /* UNUSED except as reqd parameter */
enum microblaze_instr_type insn_type;
- CPU.exception = step ? SIGTRAP : 0;
-
memops = 0;
bonus_cycles = 0;
insts = 0;
- do
+ while (1)
{
/* Fetch the initial instructions that we'll decode. */
- inst = rlat (cpu, PC & 0xFFFFFFFC);
+ inst = MEM_RD_WORD (PC & 0xFFFFFFFC);
op = get_insn_microblaze (inst, &imm_unsigned, &insn_type,
&num_delay_slot);
delay_slot_enable = 0;
branch_taken = 0;
if (op == microblaze_brk)
- CPU.exception = SIGTRAP;
+ sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
else if (inst == MICROBLAZE_HALT_INST)
{
- CPU.exception = SIGQUIT;
insts += 1;
bonus_cycles++;
+ sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_exited, RETREG);
}
else
{
#undef INSTRUCTION
default:
- CPU.exception = SIGILL;
+ sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_signalled,
+ SIM_SIGILL);
fprintf (stderr, "ERROR: Unknown opcode\n");
}
/* Make R0 consistent */
{
newpc = PC;
PC = oldpc + INST_SIZE;
- inst = rlat (cpu, PC & 0xFFFFFFFC);
+ inst = MEM_RD_WORD (PC & 0xFFFFFFFC);
op = get_insn_microblaze (inst, &imm_unsigned, &insn_type,
&num_delay_slot);
if (op == invalid_inst)
/* immword = IMM_W; */
if (op == microblaze_brk)
{
- if (issue_messages)
+ if (STATE_VERBOSE_P (sd))
fprintf (stderr, "Breakpoint set in delay slot "
"(at address 0x%x) will not be honored\n", PC);
/* ignore the breakpoint */
}
else if (insn_type == branch_inst || insn_type == return_inst)
{
- if (issue_messages)
+ if (STATE_VERBOSE_P (sd))
fprintf (stderr, "Cannot have branch or return instructions "
"in delay slot (at address 0x%x)\n", PC);
- CPU.exception = SIGILL;
+ sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_signalled,
+ SIM_SIGILL);
}
else
{
#undef INSTRUCTION
default:
- CPU.exception = SIGILL;
+ sim_engine_halt (sd, NULL, NULL, NULL_CIA,
+ sim_signalled, SIM_SIGILL);
fprintf (stderr, "ERROR: Unknown opcode at 0x%x\n", PC);
}
/* Update cycle counts */
if (tracing)
fprintf (stderr, "\n");
+
+ if (sim_events_tick (sd))
+ sim_events_process (sd);
}
- while (!CPU.exception);
/* Hide away the things we've cached while executing. */
/* CPU.pc = pc; */
CPU.cycles += memops; /* and memop cycle delays */
}
-
-int
-sim_write (SIM_DESC sd, SIM_ADDR addr, const unsigned char *buffer, int size)
+static int
+microblaze_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length)
{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
- int i;
-
- init_pointers (cpu);
-
- memcpy (&CPU.memory[addr], buffer, size);
-
- return size;
-}
-
-int
-sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
- int i;
-
- init_pointers (cpu);
-
- memcpy (buffer, &CPU.memory[addr], size);
-
- return size;
-}
-
-
-int
-sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- init_pointers (cpu);
-
if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0)
{
if (length == 4)
return 0;
}
-int
-sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
+static int
+microblaze_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length)
{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
long ival;
- init_pointers (cpu);
-
if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0)
{
if (length == 4)
return 0;
}
-void
-sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- if (CPU.exception == SIGQUIT)
- {
- *reason = sim_exited;
- *sigrc = RETREG;
- }
- else
- {
- *reason = sim_stopped;
- *sigrc = CPU.exception;
- }
-}
-
void
sim_info (SIM_DESC sd, int verbose)
{
}
SIM_DESC
-sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv)
+sim_open (SIM_OPEN_KIND kind, host_callback *cb,
+ struct bfd *abfd, char * const *argv)
{
int i;
SIM_DESC sd = sim_state_alloc (kind, cb);
return 0;
}
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
+ /* The parser will print an error message for us, so we silently return. */
if (sim_parse_args (sd, argv) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
- if (kind == SIM_OPEN_STANDALONE)
- issue_messages = 1;
-
/* CPU specific initialization. */
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
{
SIM_CPU *cpu = STATE_CPU (sd, i);
- int osize = sim_memory_size;
+ CPU_REG_FETCH (cpu) = microblaze_reg_fetch;
+ CPU_REG_STORE (cpu) = microblaze_reg_store;
CPU_PC_FETCH (cpu) = microblaze_pc_get;
CPU_PC_STORE (cpu) = microblaze_pc_set;
set_initial_gprs (cpu);
-
- /* Discard and reacquire memory -- start with a clean slate. */
- sim_size (cpu, 1); /* small */
- sim_size (cpu, osize); /* and back again */
}
- return sd;
-}
+ /* Default to a 8 Mbyte (== 2^23) memory space. */
+ sim_do_commandf (sd, "memory-size 0x800000");
-void
-sim_close (SIM_DESC sd, int quitting)
-{
- /* Do nothing. */
+ return sd;
}
SIM_RC
-sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char **argv, char **env)
+sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd,
+ char * const *argv, char * const *env)
{
SIM_CPU *cpu = STATE_CPU (sd, 0);
return SIM_RC_OK;
}
-
-void
-sim_do_command (SIM_DESC sd, const char *cmd)
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- /* Nothing there yet; it's all an error. */
-
- if (cmd != NULL)
- {
- char ** simargv = buildargv (cmd);
-
- if (strcmp (simargv[0], "dumpmem") == 0)
- {
- unsigned char * p;
- FILE * dumpfile;
-
- if (simargv[1] == NULL)
- fprintf (stderr, "Error: missing argument to dumpmem cmd.\n");
-
- fprintf (stderr, "Writing dumpfile %s...",simargv[1]);
-
- dumpfile = fopen (simargv[1], "w");
- p = CPU.memory;
- fwrite (p, CPU.msize-1, 1, dumpfile);
- fclose (dumpfile);
-
- fprintf (stderr, "done.\n");
- }
- else if (strcmp (simargv[0], "clearstats") == 0)
- {
- CPU.cycles = 0;
- CPU.insts = 0;
- }
- else if (strcmp (simargv[0], "verbose") == 0)
- {
- issue_messages = 2;
- }
- else
- {
- fprintf (stderr,"Error: \"%s\" is not a valid M.CORE simulator command.\n",
- cmd);
- }
-
- freeargv (simargv);
- }
- else
- {
- fprintf (stderr, "M.CORE sim commands: \n");
- fprintf (stderr, " dumpmem <filename>\n");
- fprintf (stderr, " clearstats\n");
- fprintf (stderr, " verbose\n");
- }
-}
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