+2002-06-06 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.h: New file.
+ * sim-main.h: Include cp1.h.
+ (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
+ (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
+ (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
+ (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
+ (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
+ (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
+ * cp1.c: Don't include sim-fpu.h; already included by
+ sim-main.h. Clean up formatting of some comments.
+ (NaN, Equal, Less): Remove.
+ (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
+ (fp_cmp): New functions.
+ * mips.igen (do_c_cond_fmt): Remove.
+ (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
+ Compare. Add result tracing.
+ (CxC1): Remove, replace with...
+ (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
+ (DMxC1): Remove, replace with...
+ (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
+ (MxC1): Remove, replace with...
+ (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
+
+2002-06-04 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (FGRIDX): Remove, replace all uses with...
+ (FGR_BASE): New macro.
+ (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
+ (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
+ (NR_FGR, FGR): Likewise.
+ * interp.c: Replace all uses of FGRIDX with FGR_BASE.
+ * mips.igen: Likewise.
+
+2002-06-04 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Add an FSF Copyright notice to this file.
+
+2002-06-04 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.c (Infinity): Remove.
+ * sim-main.h (Infinity): Likewise.
+
+ * cp1.c (fp_unary, fp_binary): New functions.
+ (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
+ (fp_sqrt): New functions, implemented in terms of the above.
+ (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
+ (Recip, SquareRoot): Remove (replaced by functions above).
+ * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
+ (fp_recip, fp_sqrt): New prototypes.
+ (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
+ (Recip, SquareRoot): Replace prototypes with #defines which
+ invoke the functions above.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
+ (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
+ file, remove PARAMS from prototypes.
+ (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
+ simulator state arguments.
+ (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
+ pass simulator state arguments.
+ * cp1.c (SD): Redefine as CPU_STATE(cpu).
+ (store_fpr, convert): Remove 'sd' argument.
+ (value_fpr): Likewise. Convert to use 'SD' instead.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (Min, Max): Remove #if 0'd functions.
+ * sim-main.h (Min, Max): Remove.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: fix formatting of switch case and default labels.
+ * interp.c: Likewise.
+ * sim-main.c: Likewise.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Clean up comments which describe FP formats.
+ (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * configure.in (mipsisa64sb1*-*-*): New target for supporting
+ Broadcom SiByte SB-1 processor configurations.
+ * configure: Regenerate.
+ * sb1.igen: New file.
+ * mips.igen: Include sb1.igen.
+ (sb1): New model.
+ * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
+ * mdmx.igen: Add "sb1" model to all appropriate functions and
+ instructions.
+ * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
+ (ob_func, ob_acc): Reference the above.
+ (qh_acc): Adjust to keep the same size as ob_acc.
+ * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
+ (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
+
+2002-06-02 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * mips.igen (mdmx): New (pseudo-)model.
+ * mdmx.c, mdmx.igen: New files.
+ * Makefile.in (SIM_OBJS): Add mdmx.o.
+ * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
+ New typedefs.
+ (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
+ (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
+ (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
+ (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
+ (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
+ (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
+ (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
+ (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
+ (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
+ (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
+ (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
+ (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
+ (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
+ (qh_fmtsel): New macros.
+ (_sim_cpu): New member "acc".
+ (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
+ (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
+
+2002-05-01 Chris Demetriou <cgd@broadcom.com>
+
+ * interp.c: Use 'deprecated' rather than 'depreciated.'
+ * sim-main.h: Likewise.
+
+2002-05-01 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
+ which wouldn't compile anyway.
+ * sim-main.h (unpredictable_action): New function prototype.
+ (Unpredictable): Define to call igen function unpredictable().
+ (NotWordValue): New macro to call igen function not_word_value().
+ (UndefinedResult): Remove.
+ * interp.c (undefined_result): Remove.
+ (unpredictable_action): New function.
+ * mips.igen (not_word_value, unpredictable): New functions.
+ (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
+ (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
+ (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
+ NotWordValue() to check for unpredictable inputs, then
+ Unpredictable() to handle them.
+
+2002-02-24 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Fix formatting of calls to Unpredictable().
+
+2002-04-20 Andrew Cagney <ac131313@redhat.com>
+
+ * interp.c (sim_open): Revert previous change.
+
+2002-04-18 Alexandre Oliva <aoliva@redhat.com>
+
+ * interp.c (sim_open): Disable chunk of code that wrote code in
+ vector table entries.
+
+2002-03-19 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
+ (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
+ unused definitions.
+
+2002-03-19 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Fix many formatting issues.
+
+2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
+
+ * cp1.c (fpu_format_name): New function to replace...
+ (DOFMT): This. Delete, and update all callers.
+ (fpu_rounding_mode_name): New function to replace...
+ (RMMODE): This. Delete, and update all callers.
+
+2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
+
+ * interp.c: Move FPU support routines from here to...
+ * cp1.c: Here. New file.
+ * Makefile.in (SIM_OBJS): Add cp1.o to object list.
+ (cp1.o): New target.
+
2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
projects / deliverable / binutils-gdb.git / blobdiff