* configure.ac: Change license of multi-run.c to GPL version 3.

[deliverable/binutils-gdb.git] / sim / mips / ChangeLog

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 632ae32880fc548a4527741e17378d9ff1cbeaa0..e70f2921abade11eff94ace6bbb6bfc821c44f75 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,8 +1,81 @@
-2007-02-19  Thiemo Seufer <ths@mips.com>
+2007-08-24  Joel Brobecker  <brobecker@adacore.com>
+
+       * configure.ac: Change license of multi-run.c to GPL version 3.
+       * configure: Regenerate.
+
+2007-06-28  Richard Sandiford  <richard@codesourcery.com>
+
+       * configure.ac, configure: Revert last patch.
+
+2007-06-26  Richard Sandiford  <richard@codesourcery.com>
+
+       * configure.ac (sim_mipsisa3264_configs): New variable.
+       (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
+       every configuration support all four targets, using the triplet to
+       determine the default.
+       * configure: Regenerate.
+
+2007-06-25  Richard Sandiford  <richard@codesourcery.com>
+
+       * Makefile.in (m16run.o): New rule.
+
+2007-05-15  Thiemo Seufer  <ths@mips.com>
+
+       * mips3264r2.igen (DSHD): Fix compile warning.
+
+2007-05-14  Thiemo Seufer  <ths@mips.com>
+
+       * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
+       CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
+       NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
+       RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
+       for mips32r2.
+
+2007-03-01  Thiemo Seufer  <ths@mips.com>
+
+       * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
+       and mips64.
+
+2007-02-20  Thiemo Seufer  <ths@mips.com>
+
+       * dsp.igen: Update copyright notice.
+       * dsp2.igen: Fix copyright notice.
+
+2007-02-20  Thiemo Seufer  <ths@mips.com>
+            Chao-Ying Fu  <fu@mips.com>
+
+       * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
+       * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
+       Add dsp2 to sim_igen_machine.
+       * configure: Regenerate.
+       * dsp.igen (do_ph_op): Add MUL support when op = 2.
+       (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
+       (mulq_rs.ph): Use do_ph_mulq.
+       (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
+       * mips.igen: Add dsp2 model and include dsp2.igen.
+       (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
+       for *mips32r2, *mips64r2, *dsp.
+       (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
+       for *mips32r2, *mips64r2, *dsp2.
+       * dsp2.igen: New file for MIPS DSP REV 2 ASE.
+
+2007-02-19  Thiemo Seufer  <ths@mips.com>
             Nigel Stephens  <nigel@mips.com>
-       
-       (ColdReset): Set CP0 Config0 to reflect the address size supported
-       by this simulator.
+
+       * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
+       jumps with hazard barrier.
+
+2007-02-19  Thiemo Seufer  <ths@mips.com>
+            Nigel Stephens  <nigel@mips.com>
+
+       * interp.c (sim_monitor): Flush stdout and stderr file descriptors
+       after each call to sim_io_write.
+
+2007-02-19  Thiemo Seufer  <ths@mips.com>
+            Nigel Stephens  <nigel@mips.com>
+
+       * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
+       supported by this simulator.
        (decode_coproc): Recognise additional CP0 Config registers
        correctly.