cp1.o \
interp.o \
mdmx.o \
+ dsp.o \
sim-main.o \
sim-hload.o \
sim-engine.o \
mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
+dsp.o: $(srcdir)/dsp.c $(srcdir)/sim-main.h
+
multi-run.o: multi-include.h tmp-mach-multi
../igen/igen:
M16_DC=$(srcdir)/m16.dc
IGEN_INCLUDE=\
$(srcdir)/m16.igen \
+ $(srcdir)/m16e.igen \
$(srcdir)/mdmx.igen \
$(srcdir)/mips3d.igen \
$(srcdir)/sb1.igen \
$(srcdir)/tx.igen \
$(srcdir)/vr.igen \
+ $(srcdir)/dsp.igen \
+ $(srcdir)/dsp2.igen \
+ $(srcdir)/mips3264r2.igen \
# NB: Since these can be built by a number of generators, care
# must be taken to ensure that they are only dependant on
support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
+m16run.o: sim-main.h m16_idecode.h m32_idecode.h $(SIM_EXTRA_DEPS)
+m16_semantics.o: sim-main.h m16_semantics.c $(SIM_EXTRA_DEPS)
+m16_support.o: sim-main.h m16_support.c $(SIM_EXTRA_DEPS)
+m16_idecode.o: sim-main.h m16_idecode.c $(SIM_EXTRA_DEPS)
+m16_icache.o: sim-main.h m16_icache.c $(SIM_EXTRA_DEPS)
-
+m32_semantics.o: sim-main.h m32_semantics.c $(SIM_EXTRA_DEPS)
+m32_support.o: sim-main.h m32_support.c $(SIM_EXTRA_DEPS)
+m32_idecode.o: sim-main.h m32_idecode.c $(SIM_EXTRA_DEPS)
+m32_icache.o: sim-main.h m32_icache.c $(SIM_EXTRA_DEPS)
BUILT_SRC_FROM_M16 = \
m16_icache.h \