* configure: Regenerate for ../common/aclocal.m4 update.

[deliverable/binutils-gdb.git] / sim / mips / configure

diff --git a/sim/mips/configure b/sim/mips/configure
index a0471b3c752588284bf385a2e46f3440e1002a7f..c918a37baf7a603b0a9778b26c24b6acd6db68c9 100755 (executable)
--- a/sim/mips/configure
+++ b/sim/mips/configure
@@ -4061,7 +4061,7 @@ fi
 #
 sim_gen=IGEN
 sim_igen_machine="-M mipsIV"
-sim_m16_machine="-M mips16"
+sim_m16_machine="-M mips16,mipsIII"
 sim_igen_filter="32,64,f"
 sim_m16_filter="16"
 sim_mach_default="mips8000"
@@ -4109,7 +4109,7 @@ case "${target}" in
                        sim_mach_default="mipsisa32"
                        ;;
   mipsisa64sb1*-*-*)   sim_gen=IGEN
-                       sim_igen_machine="-M mips64,sb1"
+                       sim_igen_machine="-M mips64,mips3d,sb1"
                        sim_igen_filter="32,64,f"
                        sim_mach_default="mips_sb1"
                        ;;
@@ -4808,6 +4808,11 @@ done
 
 
 
+cgen_breaks=""
+if grep CGEN_MAINT $srcdir/Makefile.in >/dev/null; then
+cgen_breaks="break cgen_rtx_error";
+fi
+
 trap '' 1 2 15
 cat > confcache <<\EOF
 # This file is a shell script that caches the results of configure
@@ -5027,6 +5032,7 @@ s%@sim_multi_obj@%$sim_multi_obj%g
 s%@mips_extra_objs@%$mips_extra_objs%g
 s%@mips_igen_engine@%$mips_igen_engine%g
 s%@mips_extra_libs@%$mips_extra_libs%g
+s%@cgen_breaks@%$cgen_breaks%g
 
 CEOF
 EOF