sim: watchpoints: use common sim_pc_get

[deliverable/binutils-gdb.git] / sim / mips / dv-tx3904irc.c

diff --git a/sim/mips/dv-tx3904irc.c b/sim/mips/dv-tx3904irc.c
index f0d32601ffa6352d1783b9ab1dbba6cf1c472db5..d9a919752e3dee63dce534eba4c9c58bbd5a6ff4 100644 (file)
--- a/sim/mips/dv-tx3904irc.c
+++ b/sim/mips/dv-tx3904irc.c
@@ -1,21 +1,20 @@
 /*  This file is part of the program GDB, the GNU debugger.
     
-    Copyright (C) 1998 Free Software Foundation, Inc.
+    Copyright (C) 1998-2021 Free Software Foundation, Inc.
     Contributed by Cygnus Solutions.
     
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
+    the Free Software Foundation; either version 3 of the License, or
     (at your option) any later version.
-    
+
     This program is distributed in the hope that it will be useful,
     but WITHOUT ANY WARRANTY; without even the implied warranty of
     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     GNU General Public License for more details.
-    
+
     You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
     
     */
 
@@ -40,6 +39,9 @@
    That is, it implements edge- rather than level-triggered
    interrupts.
 
+   This implementation does not support multiple concurrent
+   interrupts.
+
 
    PROPERTIES
 
@@ -68,25 +70,27 @@
    that even though INT[0] is tied externally to IP[5], we simulate
    it as passing through the controller.
 
+   An output level of zero signals the clearing of a level interrupt.
+
 
    int0-7 (input)
 
-   External interrupts.
+   External interrupts.  Level = 0 -> level interrupt cleared.
 
    
    dmac0-3 (input)
 
-   DMA internal interrupts, correspond to DMA channels 0-3.
+   DMA internal interrupts, correspond to DMA channels 0-3.  Level = 0 -> level interrupt cleared.
 
 
    sio0-1 (input)
 
-   SIO internal interrupts.
+   SIO internal interrupts.  Level = 0 -> level interrupt cleared.
 
 
    tmr0-2 (input)
 
-   Timer internal interrupts.
+   Timer internal interrupts.  Level = 0 -> level interrupt cleared.
 
    */
 
@@ -251,13 +255,19 @@ tx3904irc_finish (struct hw *me)
 static void
 tx3904irc_port_event (struct hw *me,
                     int my_port,
-                    struct hw *source,
+                    struct hw *source_dev,
                     int source_port,
                     int level)
 {
   struct tx3904irc *controller = hw_data (me);
 
-  /* Ignore level - use only edge-triggered interrupts */
+  /* handle deactivated interrupt */
+  if(level == 0)
+    {
+      HW_TRACE ((me, "interrupt cleared on port %d", my_port));
+      hw_port_event(me, IP_PORT, 0);
+      return;
+    }
 
   switch (my_port)
     {
@@ -276,12 +286,12 @@ tx3904irc_port_event (struct hw *me,
       {
        int source = my_port - INT1_PORT;
 
-       HW_TRACE ((me, "port-event interrupt source %d", source));
+       HW_TRACE ((me, "interrupt asserted on port %d", source));
        ISR_SET(controller, source);
        if(ILR_GET(controller, source) > IMR_GET(controller))
          {
            int ip_number = 16 + source; /* compute IP[4:0] */
-           HW_TRACE ((me, "interrupt level %ld", ILR_GET(controller,source)));
+           HW_TRACE ((me, "interrupt level %d", ILR_GET(controller,source)));
            hw_port_event(me, IP_PORT, ip_number);
          }
        break;
@@ -343,6 +353,7 @@ tx3904irc_io_read_buffer (struct hw *me,
        }
 
       /* write requested byte out */
+      register_value = H2T_4(register_value);
       memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1);
     }
 
@@ -382,12 +393,14 @@ tx3904irc_io_write_buffer (struct hw *me,
        default: register_ptr = & register_value; /* used as a dummy */
        }
 
-      HW_TRACE ((me, "reg %d pre: %08lx", reg_number, (long) *register_ptr));
+      /* HW_TRACE ((me, "reg %d pre: %08lx", reg_number, (long) *register_ptr)); */
 
       /* overwrite requested byte */
-      memcpy (((char*)register_ptr)+reg_offset, (char*)source + byte, 1);
+      register_value = H2T_4(* register_ptr);
+      memcpy (((char*)&register_value)+reg_offset, (const char*)source + byte, 1);
+      * register_ptr = T2H_4(register_value);
 
-      HW_TRACE ((me, "post: %08lx", (long) *register_ptr));
+      /* HW_TRACE ((me, "post: %08lx", (long) *register_ptr)); */
     }
   return nr_bytes;
 }