arc: Don't generate dynamic relocation for non SEC_ALLOC sections

[deliverable/binutils-gdb.git] / sim / mips / m16.igen

diff --git a/sim/mips/m16.igen b/sim/mips/m16.igen
index f87a863629bfe0789ffb940c87dfbf290b772ac5..74adacdbf5f242ffd56183defcfae615237f0b88 100644 (file)
--- a/sim/mips/m16.igen
+++ b/sim/mips/m16.igen
@@ -1075,6 +1075,10 @@
 
 011101,26.IMMED:JALX:32::JALX32
 "jalx <IMMED>"
+*mips32:
+*mips64:
+*mips32r2:
+*mips64r2:
 *mips16:
 *vr4100:
 {
@@ -1228,9 +1232,5 @@
 *mips16:
 *vr4100:
 {
-  if (STATE & simDELAYSLOT)
-    PC = cia - 2; /* reference the branch instruction */
-  else
-    PC = cia;
-  SignalException (BreakPoint, instruction_0);
+  do_break16 (SD_, instruction_0);
 }