/* Simulation code for the MIPS MDMX ASE.
- Copyright (C) 2002 Free Software Foundation, Inc.
- Contributed by Broadcom Corporation (SiByte).
+ Copyright (C) 2002, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
+ Contributed by Ed Satterthwaite and Chris Demetriou, of Broadcom
+ Corporation (SiByte).
This file is part of GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+You should have received a copy of the GNU General Public License
+along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include <stdio.h>
/* Within mdmx.c we refer to the sim_cpu directly. */
#define CPU cpu
#define SD (CPU_STATE(CPU))
-#define SD_ cpu, cia, -1
+
+/* XXX FIXME: temporary hack while the impact of making unpredictable()
+ a "normal" (non-igen) function is evaluated. */
+#undef Unpredictable
+#define Unpredictable() unpredictable_action (cpu, cia)
/* MDMX Representations
return t;
}
-
static signed16
SRAQH(signed16 ts, signed16 tt)
{
}
+/* "pabsdiff" and "pavg" are defined only for OB format. */
+
+static unsigned8
+AbsDiffOB(unsigned8 ts, unsigned8 tt)
+{
+ return (ts >= tt ? ts - tt : tt - ts);
+}
+
+static unsigned8
+AvgOB(unsigned8 ts, unsigned8 tt)
+{
+ return ((unsigned32)ts + (unsigned32)tt + 1) >> 1;
+}
+
+
/* Dispatch tables for operations that update a CPR. */
static const QH_FUNC qh_func[] = {
static const OB_FUNC ob_func[] = {
AndOB, NorOB, OrOB, XorOB, SLLOB, SRLOB,
AddOB, SubOB, MinOB, MaxOB,
- MulOB, NULL, NULL, NULL, NULL
+ MulOB, NULL, NULL, AbsDiffOB, AvgOB
};
/* Auxiliary functions for CPR updates. */
*a = (signed24)ts - (signed24)tt;
}
+static void
+AccAbsDiffOB(signed24 *a, unsigned8 ts, unsigned8 tt)
+{
+ unsigned8 t = (ts >= tt ? ts - tt : tt - ts);
+ *a += (signed24)t;
+}
+
/* Dispatch tables for operations that update a CPR. */
static const QH_ACC qh_acc[] = {
AccAddAQH, AccAddAQH, AccMulAQH, AccMulLQH,
- SubMulAQH, SubMulLQH, AccSubAQH, AccSubLQH
+ SubMulAQH, SubMulLQH, AccSubAQH, AccSubLQH,
+ NULL
};
static const OB_ACC ob_acc[] = {
AccAddAOB, AccAddLOB, AccMulAOB, AccMulLOB,
- SubMulAOB, SubMulLOB, AccSubAOB, AccSubLOB
+ SubMulAOB, SubMulLOB, AccSubAOB, AccSubLOB,
+ AccAbsDiffOB
};
ob_vector_acc(ACC.ob, op1, ValueFPR(vt, fmt_mdmx), ob_acc[op]);
break;
case sel_imm:
- ob_map_acc(ACC.ob, op1, op2, ob_acc[op]);
+ ob_map_acc(ACC.ob, op1, vt, ob_acc[op]);
break;
}
break;