#include "sky-device.h"
-
/* External functions */
+struct pke_fifo;
+struct fifo_quadword;
+struct pke_device;
+
void pke0_attach(SIM_DESC sd);
-void pke0_issue(void);
+void pke0_issue(SIM_DESC sd);
void pke1_attach(SIM_DESC sd);
-void pke1_issue(void);
+void pke1_issue(SIM_DESC sd);
+
+void pke_options(struct pke_device *device, unsigned_4 option, char *option_string);
+int read_pke_reg (struct pke_device *device, int regno, void *buf);
+int write_pke_reg (struct pke_device *device, int regno, const void *buf);
+int read_pke_pc (struct pke_device *device, void *buf);
+int read_pke_pcx (struct pke_device *device, void *buf);
+struct fifo_quadword* pke_fifo_access(struct pke_fifo*, unsigned_4 qwnum);
+
/* Quadword data type */
/* SCEI memory mapping information */
-#define PKE0_REGISTER_WINDOW_START 0x10000800
-#define PKE1_REGISTER_WINDOW_START 0x10000A00
-#define PKE0_FIFO_ADDR 0x10008000
-#define PKE1_FIFO_ADDR 0x10008010
+#define PKE0_REGISTER_WINDOW_START 0x10003800
+#define PKE1_REGISTER_WINDOW_START 0x10003C00
+#define PKE0_FIFO_ADDR 0x10004000
+#define PKE1_FIFO_ADDR 0x10005000
+
+
+/* VU source-addr tracking tables */ /* changed from 1998-01-22 e-mail plans */
+#define VU0_MEM0_SRCADDR_START 0x21000000
+#define VU0_MEM1_SRCADDR_START 0x21004000
+#define VU1_MEM0_SRCADDR_START 0x21008000
+#define VU1_MEM1_SRCADDR_START 0x2100C000
+
+#define VU0_CIA (VU0_REGISTER_WINDOW_START + VU_REG_CIA)
+#define VU1_CIA (VU1_REGISTER_WINDOW_START + VU_REG_CIA)
+
+/* GPUIF STAT register */
+#define GPUIF_REG_STAT_APATH_E 11
+#define GPUIF_REG_STAT_APATH_B 10
+
+/* COP2 STAT register */
+#define COP2_REG_STAT_ADDR VPU_STAT_ADDR
+#define COP2_REG_STAT_VBS1_E 8
+#define COP2_REG_STAT_VBS1_B 8
+#define COP2_REG_STAT_VBS0_E 0
+#define COP2_REG_STAT_VBS0_B 0
/* Quadword indices of PKE registers. Actual registers sit at bottom
#define PKE_REGISTER_WINDOW_SIZE (sizeof(quadword) * PKE_NUM_REGS)
-/* virtual addresses for source-addr tracking */
-#define PKE0_SRCADDR 0x20000020
-#define PKE1_SRCADDR 0x20000024
-
/* PKE commands */
#define PKE_REG_STAT_PPS_IDLE 0x00 /* ready to execute next instruction */
#define PKE_REG_STAT_PPS_WAIT 0x01 /* not enough words in FIFO */
#define PKE_REG_STAT_PPS_DECODE 0x02 /* decoding instruction */
-#define PKE_REG_STAT_PPS_STALL 0x02 /* alias state for FLUSHE stall */
+#define PKE_REG_STAT_PPS_STALL 0x02 /* alias state for stall (e.g., FLUSHE) */
#define PKE_REG_STAT_PPS_XFER 0x03 /* transferring instruction operands */
/* DBF register */
#define PKE_REG_MODE_MDE_E 1
#define PKE_REG_MODE_MDE_B 0
+/* NUM register */
+#define PKE_REG_NUM_NUM_E 9
+#define PKE_REG_NUM_NUM_B 0
+
/* MARK register */
#define PKE_REG_MARK_MARK_E 15
#define PKE_REG_MARK_MARK_B 0
#define PKE_REG_ERR_MII_E 0
#define PKE_REG_ERR_MII_B 0
+/* FBRST command bitfields */
+#define PKE_REG_FBRST_STC_E 3
+#define PKE_REG_FBRST_STC_B 3
+#define PKE_REG_FBRST_STP_E 2
+#define PKE_REG_FBRST_STP_B 2
+#define PKE_REG_FBRST_FBK_E 1
+#define PKE_REG_FBRST_FBK_B 1
+#define PKE_REG_FBRST_RST_E 0
+#define PKE_REG_FBRST_RST_B 0
-/* source-addr for words written to VU/GPUIF ports */
-#define PKE0_SRCADDR 0x20000020 /* from 1998-01-22 e-mail plans */
-#define PKE1_SRCADDR 0x20000024 /* from 1998-01-22 e-mail plans */
+/* MSKPATH3 command bitfields */
+#define PKE_REG_MSKPATH3_E 15
+#define PKE_REG_MSKPATH3_B 15
/* UNPACK opcodes */
((((me)->regs[PKE_REG_MASK][0]) >> (8*(row) + 2*(col))) & 0x03)
-/* and now a few definitions that rightfully belong elsewhere */
-#ifdef PKE_DEBUG
-
-/* GPUIF addresses */
-#define GPUIF_PATH3_FIFO_ADDR 0x10008020 /* data from CORE */
-#define GPUIF_PATH1_FIFO_ADDR 0x10008030 /* data from VU1 */
-#define GPUIF_PATH2_FIFO_ADDR 0x10008040 /* data from PKE1 */
-
-/* VU STAT register */
-#define VU_REG_STAT_VGW_E 4
-#define VU_REG_STAT_VGW_B 4
-#define VU_REG_STAT_VBS_E 0
-#define VU_REG_STAT_VBS_B 0
-
-/* VU PC pseudo-registers */ /* omitted from 1998-01-22 e-mail plans */
-#define VU0_PC_START 0x20025000
-#define VU1_PC_START 0x20026000
-
-/* VU source-addr tracking tables */ /* changed from 1998-01-22 e-mail plans */
-#define VU0_MEM0_SRCADDR_START 0x21000000
-#define VU0_MEM1_SRCADDR_START 0x21004000
-#define VU1_MEM0_SRCADDR_START 0x21008000
-#define VU1_MEM1_SRCADDR_START 0x2100C000
-
-#endif /* PKE_DEBUG */
-
+/* operations - replace with those in sim-bits.h when convenient */
-/* operations */
/* unsigned 32-bit mask of given width */
-#define BIT_MASK(width) (width == 31 ? 0xffffffff : (((unsigned_4)1) << (width+1)) - 1)
+#define BIT_MASK(width) ((width) == 31 ? 0xffffffff : (((unsigned_4)1) << (width+1)) - 1)
/* e.g.: BIT_MASK(4) = 00011111 */
/* mask between given given bits numbers (MSB) */
-#define BIT_MASK_BTW(begin,end) (BIT_MASK(end) & ~BIT_MASK(begin))
+#define BIT_MASK_BTW(begin,end) ((BIT_MASK(end) & ~((begin) == 0 ? 0 : BIT_MASK((begin)-1))))
/* e.g.: BIT_MASK_BTW(4,11) = 0000111111110000 */
/* set bitfield value */
#define BIT_MASK_SET(lvalue,begin,end,value) \
do { \
- lvalue &= ~BIT_MASK_BTW(begin,end); \
- lvalue |= (((value) << (begin)) & BIT_MASK_BTW(begin,end)); \
+ ASSERT((begin) <= (end)); \
+ (lvalue) &= ~BIT_MASK_BTW((begin),(end)); \
+ (lvalue) |= ((value) << (begin)) & BIT_MASK_BTW((begin),(end)); \
} while(0)
/* get bitfield value */
(((rvalue) & BIT_MASK_BTW(begin,end)) >> (begin))
/* e.g., BIT_MASK_GET(0000111100001111, 2, 8) = 0000000100001100 */
-/* get bitfield value, sign-extended to given bit number */
-#define BIT_MASK_GET_SX(rvalue,begin,end,sx) \
- (BIT_MASK_GET(rvalue,begin,end) | ((BIT_MASK_GET(rvalue,begin,end) & BIT_MASK_BTW(end,end)) ? BIT_MASK_BTW(end,sx) : 0))
-/* e.g., BIT_MASK_GET_SX(0000111100001111, 2, 8, 15) = 1111111100001100 */
-
-
/* These ugly macro hacks allow succinct bitfield accesses */
/* set a bitfield in a register by "name" */
#define PKE_REG_MASK_SET(me,reg,flag,value) \
- BIT_MASK_SET(((me)->regs[PKE_REG_##reg][0]), \
- PKE_REG_##reg##_##flag##_B, PKE_REG_##reg##_##flag##_E, \
- (value))
+ do { \
+ unsigned_4 old = BIT_MASK_GET(((me)->regs[PKE_REG_##reg][0]), \
+ PKE_REG_##reg##_##flag##_B, PKE_REG_##reg##_##flag##_E); \
+ BIT_MASK_SET(((me)->regs[PKE_REG_##reg][0]), \
+ PKE_REG_##reg##_##flag##_B, PKE_REG_##reg##_##flag##_E, \
+ (value)); \
+ if( indebug ((me)->dev.name)) \
+ { \
+ if (old != (value)) \
+ { \
+ if (((me)->fifo_trace_file == NULL ) && \
+ ((me)->fifo_trace_file_name != NULL )) \
+ sky_open_file (&((me)->fifo_trace_file), \
+ (me)->fifo_trace_file_name, \
+ (char *) NULL, _IOLBF ); \
+ fprintf (((me)->fifo_trace_file != NULL) ? \
+ (me)->fifo_trace_file : stdout, \
+ "# Reg %s:%s = 0x%x\n", #reg, #flag, (unsigned)(value)); \
+ } \
+ } \
+ } while(0)
/* get a bitfield from a register by "name" */
#define PKE_REG_MASK_GET(me,reg,flag) \
#define PKE_LIMIT(value,max) ((value) > (max) ? (max) : (value))
+/* Classify words in a FIFO quadword */
+enum wordclass
+{
+ wc_dma = 'D',
+ wc_pkecode = 'P',
+ wc_unknown = '?',
+ wc_pkedata = '.',
+ wc_gpuiftag = 'g'
+};
+
+
/* One row in the FIFO */
struct fifo_quadword
{
/* 128 bits of data */
quadword data;
/* source main memory address (or 0: unknown) */
- address_word source_address;
- /* DMA tag present in lower 64 bits */
- unsigned_4 dma_tag_present;
+ unsigned_4 source_address;
+ /* classification of words in quadword; wc_dma set on DMA tags at FIFO write */
+ enum wordclass word_class[4];
};
+/* quadword FIFO structure for PKE */
+typedef struct pke_fifo
+{
+ struct fifo_quadword** quadwords; /* pointer to fifo quadwords */
+ unsigned_4 origin; /* quadword serial number of quadwords[0] */
+ unsigned_4 length; /* length of quadword pointer array: 0..N */
+ unsigned_4 next; /* relative index of first unfilled quadword: 0..length-1 */
+} pke_fifo;
+
+#define PKE_FIFO_GROW_SIZE 1000 /* number of quadword pointers to allocate */
+#define PKE_FIFO_ARCHEOLOGY 1000 /* number of old quadwords to keep as history */
+
+
+
/* PKE internal state: FIFOs, registers, handle to VU friend */
struct pke_device
{
int pke_number;
int flags;
- /* quadword registers */
+ /* quadword registers: data in [0] word only */
quadword regs[PKE_NUM_REGS];
- /* FIFO */
- struct fifo_quadword* fifo;
- int fifo_num_elements; /* no. of quadwords occupied in FIFO */
- int fifo_buffer_size; /* no. of quadwords of space in FIFO */
- FILE* fifo_trace_file; /* or 0 for no trace */ /* XXX: tracing not done */
- /* XXX: assumes FIFOs grow indefinately */
+ /* write buffer for FIFO address */
+ quadword fifo_qw_in_progress;
+ int fifo_qw_done; /* bitfield */
+
+ /* FIFO - private: use only pke_fifo_* routines to access */
+ struct pke_fifo fifo; /* array of FIFO quadword pointers */
+ FILE* fifo_trace_file; /* stdio stream open in append mode, or 0 for no trace */
+ char* fifo_trace_file_name; /* user defined debug trace file name */
+
+ /* FIFO cache -- curry last search pke_pcrel_fifo results */
+ unsigned_4 last_fifo_pc;
+ unsigned_4 last_qw_pc;
+ unsigned_4 last_num;
+ unsigned_4 last_new_fifo_pc;
+ unsigned_4 last_new_qw_pc;
/* PC */
int fifo_pc; /* 0 .. (fifo_num_elements-1): quadword index of next instruction */
int qw_pc; /* 0 .. 3: word index of next instruction */
+
+ /* Disassembly state */
+ FILE *trace_file;
+ char *trace_file_name;
};
+extern struct pke_device pke0_device;
+extern struct pke_device pke1_device;
+
+
+
/* Flags for PKE.flags */
-#define PKE_FLAG_NONE 0
-/* none at present */
+#define PKE_FLAG_NONE 0x00
+#define PKE_FLAG_PENDING_PSS 0x01 /* PSS bit written-to; set STAT:PSS after current instruction */
+#define PKE_FLAG_INT_NOLOOP 0x02 /* INT PKEcode received; INT/PIS set; suppress loop after resumption */
+#define PKE_FLAG_TRACE_ON 0x04 /* Trace file request from command line */
+
+/* Kludge alert */
+
+#define PKE_MEM_READ(me,addr,data,size) \
+ do { \
+ sim_cpu* cpu = STATE_CPU(CURRENT_STATE, 0); \
+ unsigned_##size value = \
+ sim_core_read_aligned_##size(cpu, CIA_GET(cpu), read_map, \
+ (SIM_ADDR)(addr)); \
+ memcpy((unsigned_##size*) (data), (void*) & value, size); \
+ } while(0)
+
+#define PKE_MEM_WRITE(me,addr,data,size) \
+ do { sim_cpu* cpu = STATE_CPU(CURRENT_STATE, 0); \
+ unsigned_##size value; \
+ memcpy((void*) & value, (unsigned_##size*)(data), size); \
+ sim_core_write_aligned_##size(cpu, CIA_GET(cpu), write_map, \
+ (SIM_ADDR)(addr), value); \
+ if (indebug ((me)->dev.name)) \
+ { \
+ int i; \
+ unsigned_##size value_te; \
+ value_te = H2T_##size(value); \
+ if (((me)->fifo_trace_file == NULL ) && \
+ ((me)->fifo_trace_file_name != NULL )) \
+ sky_open_file (&((me)->fifo_trace_file), \
+ (me)->fifo_trace_file_name, \
+ (char *) NULL, _IOLBF ); \
+ fprintf (((me)->fifo_trace_file != NULL) ? \
+ (me)->fifo_trace_file : stdout, \
+ "# Write %2d bytes to ", size); \
+ fprintf (((me)->fifo_trace_file != NULL) ? \
+ (me)->fifo_trace_file : stdout, \
+ "0x%08lx: ", (unsigned long)(addr)); \
+ for(i=0; i<size; i++) \
+ fprintf (((me)->fifo_trace_file != NULL) ? \
+ (me)->fifo_trace_file : stdout, \
+ " %02x", ((unsigned_1*)(& value_te))[i]); \
+ fprintf (((me)->fifo_trace_file != NULL) ? \
+ (me)->fifo_trace_file : stdout, \
+ "\n"); \
+ } \
+ } while(0)
#endif /* H_PKE_H */
projects / deliverable / binutils-gdb.git / blobdiff