/* This file is part of the program GDB, the GNU debugger.
- Copyright (C) 1998 Free Software Foundation, Inc.
+ Copyright (C) 1998-2020 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
-
+
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-
+
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* DEVICE
- mn103ser - mn103002 I/O ports 0-3.
+ mn103iop - mn103002 I/O ports 0-3.
DESCRIPTION
io_port->port[i].control = 0;
io_port->port[i].pin = 0;
}
+ io_port->port[2].output_mode = 0xff;
io_port->p2ss = 0;
- io_port->p4ss = 0;
+ io_port->p4ss = 0x0f;
}
const void *source,
unsigned nr_bytes)
{
+ unsigned8 buf = *(unsigned8 *)source;
if ( nr_bytes == 1 )
{
- io_port->port[io_port_reg].output = *(unsigned16 *)source;
+ if ( io_port_reg == 3 && (buf & 0xfc) != 0 )
+ {
+ hw_abort(me, "Cannot write to read-only bits of P3OUT.");
+ }
+ else
+ {
+ io_port->port[io_port_reg].output = buf;
+ }
}
else
{
const void *source,
unsigned nr_bytes)
{
+ unsigned8 buf = *(unsigned8 *)source;
if ( nr_bytes == 1 )
{
/* check if there are fields which can't be written and
take appropriate action depending what bits are set */
- io_port->port[io_port_reg].output_mode = *(unsigned8 *)source;
+ if ( ( io_port_reg == 3 && (buf & 0xfc) != 0 )
+ || ( (io_port_reg == 0 || io_port_reg == 1) && (buf & 0xfe) != 0 ) )
+ {
+ hw_abort(me, "Cannot write to read-only bits of output mode register.");
+ }
+ else
+ {
+ io_port->port[io_port_reg].output_mode = buf;
+ }
}
else
{
const void *source,
unsigned nr_bytes)
{
+ unsigned8 buf = *(unsigned8 *)source;
if ( nr_bytes == 1 )
{
- io_port->port[io_port_reg].control = *(unsigned8 *)source;
+ if ( io_port_reg == 3 && (buf & 0xfc) != 0 )
+ {
+ hw_abort(me, "Cannot write to read-only bits of P3DIR.");
+ }
+ else
+ {
+ io_port->port[io_port_reg].control = buf;
+ }
}
else
{
const void *source,
unsigned nr_bytes)
{
+ unsigned8 buf = *(unsigned8 *)source;
if ( nr_bytes == 1 )
{
/* select on io_port_reg: */
if ( io_port_reg == P2SS )
{
- io_port->p2ss = *(unsigned8 *)source;
+ if ( (buf & 0xfc) != 0 )
+ {
+ hw_abort(me, "Cannot write to read-only bits in p2ss.");
+ }
+ else
+ {
+ io_port->p2ss = buf;
+ }
}
else
{
- io_port->p4ss = *(unsigned8 *)source;
+ if ( (buf & 0xf0) != 0 )
+ {
+ hw_abort(me, "Cannot write to read-only bits in p4ss.");
+ }
+ else
+ {
+ io_port->p4ss = buf;
+ }
}
}
else