#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
+#include <unistd.h>
#include <assert.h>
#include "bfd.h"
#include "opcode/msp430-decode.h"
#include "sim-main.h"
+#include "sim-syscall.h"
#include "dis-asm.h"
#include "targ-vals.h"
+#include "trace.h"
static int
loader_write_mem (SIM_DESC sd,
CPU_REG_FETCH (MSP430_CPU (sd)) = msp430_reg_fetch;
CPU_REG_STORE (MSP430_CPU (sd)) = msp430_reg_store;
- /* Allocate memory if none specified by user. */
- if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x130, 1) == 0)
- sim_do_commandf (sd, "memory-region 0,0x20");
+ /* Allocate memory if none specified by user.
+ Note - these values match the memory regions in the libgloss/msp430/msp430[xl]-sim.ld scripts. */
+ if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x2, 1) == 0)
+ sim_do_commandf (sd, "memory-region 0,0x20"); /* Needed by the GDB testsuite. */
if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x200, 1) == 0)
- sim_do_commandf (sd, "memory-region 0x200,0xffe00");
+ sim_do_commandf (sd, "memory-region 0x200,0xfd00"); /* RAM and/or ROM */
if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0xfffe, 1) == 0)
- sim_do_commandf (sd, "memory-region 0xfffe,2");
+ sim_do_commandf (sd, "memory-region 0xffc0,0x40"); /* VECTORS. */
if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x10000, 1) == 0)
- sim_do_commandf (sd, "memory-region 0x10000,0x100000");
+ sim_do_commandf (sd, "memory-region 0x10000,0x80000"); /* HIGH FLASH RAM. */
+ if (sim_core_read_buffer (sd, MSP430_CPU (sd), read_map, &c, 0x90000, 1) == 0)
+ sim_do_commandf (sd, "memory-region 0x90000,0x70000"); /* HIGH ROM. */
/* Check for/establish the a reference program image. */
if (sim_analyze_program (sd,
0 /* verbose */,
1 /* use LMA instead of VMA */,
loader_write_mem);
- if (prog_bfd == NULL)
- {
- sim_state_free (sd);
- return 0;
- }
+ /* Allow prog_bfd to be NULL - this is needed by the GDB testsuite. */
/* Establish any remaining configuration options. */
if (sim_config (sd) != SIM_RC_OK)
msp430_trace_init (STATE_PROG_BFD (sd));
- MSP430_CPU (sd)->state.cio_breakpoint = lookup_symbol (sd, "C$$IO$$");
- MSP430_CPU (sd)->state.cio_buffer = lookup_symbol (sd, "__CIOBUF__");
- if (MSP430_CPU (sd)->state.cio_buffer == -1)
- MSP430_CPU (sd)->state.cio_buffer = lookup_symbol (sd, "_CIOBUF_");
+ if (prog_bfd != NULL)
+ {
+ MSP430_CPU (sd)->state.cio_breakpoint = lookup_symbol (sd, "C$$IO$$");
+ MSP430_CPU (sd)->state.cio_buffer = lookup_symbol (sd, "__CIOBUF__");
+ if (MSP430_CPU (sd)->state.cio_buffer == -1)
+ MSP430_CPU (sd)->state.cio_buffer = lookup_symbol (sd, "_CIOBUF_");
+ }
return sd;
}
static void
trace_reg_put (SIM_DESC sd, int n, unsigned int v)
{
- if (TRACE_VPU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_VPU_IDX,
- "PUT: %#x -> %s", v, register_names [n]);
+ TRACE_VPU (MSP430_CPU (sd), "PUT: %#x -> %s", v, register_names[n]);
REG (n) = v;
}
static unsigned int
trace_reg_get (SIM_DESC sd, int n)
{
- if (TRACE_VPU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_VPU_IDX,
- "GET: %s -> %#x", register_names [n], REG (n));
+ TRACE_VPU (MSP430_CPU (sd), "GET: %s -> %#x", register_names[n], REG (n));
return REG (n);
}
addr = op->addend;
if (op->reg != MSR_None)
{
- int reg;
- /* Index values are signed, but the sum is limited to 16
- bits if the register < 64k, for MSP430 compatibility in
- MSP430X chips. */
- if (addr & 0x8000)
- addr |= -1 << 16;
- reg = REG_GET (op->reg);
+ int reg = REG_GET (op->reg);
+ int sign = opc->ofs_430x ? 20 : 16;
+
+ /* Index values are signed. */
+ if (addr & (1 << (sign - 1)))
+ addr |= -1 << sign;
+
addr += reg;
+
+ /* For MSP430 instructions the sum is limited to 16 bits if the
+ address in the index register is less than 64k even if we are
+ running on an MSP430X CPU. This is for MSP430 compatibility. */
if (reg < 0x10000 && ! opc->ofs_430x)
- addr &= 0xffff;
+ {
+ if (addr >= 0x10000)
+ fprintf (stderr, " XXX WRAPPING ADDRESS %x on read\n", addr);
+
+ addr &= 0xffff;
+ }
}
addr &= 0xfffff;
switch (opc->size)
case UNSIGN_32:
rv = zero_ext (HWMULT (sd, hwmult_result), 16);
break;
- case SIGN_MAC_32:
+ case SIGN_MAC_32:
case SIGN_32:
rv = sign_ext (HWMULT (sd, hwmult_signed_result), 16);
break;
break;
default:
- fprintf (stderr, "unimplemented HW MULT read!\n");
+ fprintf (stderr, "unimplemented HW MULT read from %x!\n", addr);
break;
}
}
- if (TRACE_MEMORY_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_MEMORY_IDX,
- "GET: [%#x].%d -> %#x", addr, opc->size, rv);
+ TRACE_MEMORY (MSP430_CPU (sd), "GET: [%#x].%d -> %#x", addr, opc->size,
+ rv);
break;
+
default:
fprintf (stderr, "invalid operand %d type %d\n", n, op->type);
abort ();
addr = op->addend;
if (op->reg != MSR_None)
{
- int reg;
- /* Index values are signed, but the sum is limited to 16
- bits if the register < 64k, for MSP430 compatibility in
- MSP430X chips. */
- if (addr & 0x8000)
- addr |= -1 << 16;
- reg = REG_GET (op->reg);
+ int reg = REG_GET (op->reg);
+ int sign = opc->ofs_430x ? 20 : 16;
+
+ /* Index values are signed. */
+ if (addr & (1 << (sign - 1)))
+ addr |= -1 << sign;
+
addr += reg;
- if (reg < 0x10000)
- addr &= 0xffff;
+
+ /* For MSP430 instructions the sum is limited to 16 bits if the
+ address in the index register is less than 64k even if we are
+ running on an MSP430X CPU. This is for MSP430 compatibility. */
+ if (reg < 0x10000 && ! opc->ofs_430x)
+ {
+ if (addr >= 0x10000)
+ fprintf (stderr, " XXX WRAPPING ADDRESS %x on write\n", addr);
+
+ addr &= 0xffff;
+ }
}
addr &= 0xfffff;
- if (TRACE_MEMORY_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_MEMORY_IDX,
- "PUT: [%#x].%d <- %#x", addr, opc->size, val);
+ TRACE_MEMORY (MSP430_CPU (sd), "PUT: [%#x].%d <- %#x", addr, opc->size,
+ val);
#if 0
/* Hack - MSP430X5438 serial port transmit register. */
if (addr == 0x5ce)
int s1 = DSRC; \
int s2 = SRC; \
int result = s1 OP s2 MORE; \
- if (TRACE_ALU_P (MSP430_CPU (sd))) \
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX, \
- "ALU: %#x %s %#x %s = %#x", s1, SOP, s2, #MORE, result); \
+ TRACE_ALU (MSP430_CPU (sd), "ALU: %#x %s %#x %s = %#x", s1, SOP, \
+ s2, #MORE, result); \
DEST (result); \
}
new_f |= MSP430_FLAG_C;
new_f = f | (new_f & opcode->flags_set);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- {
- if (SR != new_f)
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "FLAGS: %s -> %s", flags2string (SR),
- flags2string (new_f));
- else
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "FLAGS: %s", flags2string (new_f));
- }
+ if (SR != new_f)
+ TRACE_ALU (MSP430_CPU (sd), "FLAGS: %s -> %s", flags2string (SR),
+ flags2string (new_f));
+ else
+ TRACE_ALU (MSP430_CPU (sd), "FLAGS: %s", flags2string (new_f));
SR = new_f;
}
return r;
}
-static int
-syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-static int
-syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, const char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
static const char *
cond_string (int cond)
{
{
/* Syscall! */
int syscall_num = call_addr & 0x3f;
- host_callback *cb = STATE_CALLBACK (sd);
- CB_SYSCALL sc;
-
- CB_SYSCALL_INIT (&sc);
-
- sc.func = syscall_num;
- sc.arg1 = MSP430_CPU (sd)->state.regs[12];
- sc.arg2 = MSP430_CPU (sd)->state.regs[13];
- sc.arg3 = MSP430_CPU (sd)->state.regs[14];
- sc.arg4 = MSP430_CPU (sd)->state.regs[15];
-
- if (TRACE_SYSCALL_P (MSP430_CPU (sd)))
- {
- const char *syscall_name = "*unknown*";
-
- switch (syscall_num)
- {
- case TARGET_SYS_exit:
- syscall_name = "exit(%d)";
- break;
- case TARGET_SYS_open:
- syscall_name = "open(%#x,%#x)";
- break;
- case TARGET_SYS_close:
- syscall_name = "close(%d)";
- break;
- case TARGET_SYS_read:
- syscall_name = "read(%d,%#x,%d)";
- break;
- case TARGET_SYS_write:
- syscall_name = "write(%d,%#x,%d)";
- break;
- }
- trace_generic (sd, MSP430_CPU (sd), TRACE_SYSCALL_IDX,
- syscall_name, sc.arg1, sc.arg2, sc.arg3, sc.arg4);
- }
-
- /* Handle SYS_exit here. */
- if (syscall_num == 1)
- {
- sim_engine_halt (sd, MSP430_CPU (sd), NULL,
- MSP430_CPU (sd)->state.regs[0],
- sim_exited, sc.arg1);
- return 1;
- }
-
- sc.p1 = sd;
- sc.p2 = MSP430_CPU (sd);
- sc.read_mem = syscall_read_mem;
- sc.write_mem = syscall_write_mem;
-
- cb_syscall (cb, &sc);
-
- if (TRACE_SYSCALL_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_SYSCALL_IDX,
- "returns %ld", sc.result);
-
- MSP430_CPU (sd)->state.regs[12] = sc.result;
+ int arg1 = MSP430_CPU (sd)->state.regs[12];
+ int arg2 = MSP430_CPU (sd)->state.regs[13];
+ int arg3 = MSP430_CPU (sd)->state.regs[14];
+ int arg4 = MSP430_CPU (sd)->state.regs[15];
+
+ MSP430_CPU (sd)->state.regs[12] = sim_syscall (MSP430_CPU (sd),
+ syscall_num, arg1, arg2,
+ arg3, arg4);
return 1;
}
if (TRACE_ANY_P (MSP430_CPU (sd)))
trace_prefix (sd, MSP430_CPU (sd), NULL_CIA, opcode_pc,
- TRACE_LINENUM_P (MSP430_CPU (sd)), NULL, 0, "");
+ TRACE_LINENUM_P (MSP430_CPU (sd)), NULL, 0, "");
carry_to_use = 0;
switch (opcode->id)
s2 = SX (u2);
uresult = u1 + u2 + carry_to_use;
result = s1 + s2 + carry_to_use;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "ADDC: %#x + %#x + %d = %#x",
- u1, u2, carry_to_use, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "ADDC: %#x + %#x + %d = %#x",
+ u1, u2, carry_to_use, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = u1 + u2;
result = s1 + s2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "ADD: %#x + %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "ADD: %#x + %#x = %#x",
+ u1, u2, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = ZX (~u2) + u1 + carry_to_use;
result = s1 - s2 + (carry_to_use - 1);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SUBC: %#x - %#x + %d = %#x",
- u1, u2, carry_to_use, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SUBC: %#x - %#x + %d = %#x",
+ u1, u2, carry_to_use, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = ZX (~u2) + u1 + 1;
result = SX (uresult);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SUB: %#x - %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SUB: %#x - %#x = %#x",
+ u1, u2, uresult);
DEST (result);
FLAGS (result, uresult != ZX (uresult));
}
s2 = SX (u2);
uresult = ZX (~u2) + u1 + 1;
result = s1 - s2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "CMP: %#x - %#x = %x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "CMP: %#x - %#x = %x",
+ u1, u2, uresult);
FLAGS (result, uresult != ZX (uresult));
}
break;
u2 = SRC;
uresult = bcd_to_binary (u1) + bcd_to_binary (u2) + carry_to_use;
result = binary_to_bcd (uresult);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "DADD: %#x + %#x + %d = %#x",
- u1, u2, carry_to_use, result);
+ TRACE_ALU (MSP430_CPU (sd), "DADD: %#x + %#x + %d = %#x",
+ u1, u2, carry_to_use, result);
DEST (result);
FLAGS (result, uresult > ((opcode->size == 8) ? 99 : 9999));
}
u1 = DSRC;
u2 = SRC;
uresult = u1 & u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "AND: %#x & %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "AND: %#x & %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
FLAGS (uresult, uresult != 0);
}
u1 = DSRC;
u2 = SRC;
uresult = u1 & u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "BIT: %#x & %#x -> %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "BIT: %#x & %#x -> %#x",
+ u1, u2, uresult);
FLAGS (uresult, uresult != 0);
}
break;
u1 = DSRC;
u2 = SRC;
uresult = u1 & ~ u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "BIC: %#x & ~ %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "BIC: %#x & ~ %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
}
break;
u1 = DSRC;
u2 = SRC;
uresult = u1 | u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "BIS: %#x | %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "BIS: %#x | %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
}
break;
u1 = DSRC;
u2 = SRC;
uresult = u1 ^ u2;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "XOR: %#x & %#x = %#x",
- u1, u2, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "XOR: %#x & %#x = %#x",
+ u1, u2, uresult);
DEST (uresult);
FLAGSV (uresult, uresult != 0, (u1 & s1) && (u2 & s1));
}
uresult = u1 >> 1;
if (SR & MSP430_FLAG_C)
uresult |= (1 << (opcode->size - 1));
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RRC: %#x >>= %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "RRC: %#x >>= %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, carry_to_use);
}
{
u1 = SRC;
uresult = ((u1 >> 8) & 0x00ff) | ((u1 << 8) & 0xff00);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SWPB: %#x -> %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SWPB: %#x -> %#x",
+ u1, uresult);
DEST (uresult);
}
break;
c = u1 & 1;
s1 = 1 << (opcode->size - 1);
uresult = (u1 >> 1) | (u1 & s1);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RRA: %#x >>= %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "RRA: %#x >>= %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, c);
}
u1 = SRC;
c = u1 & 1;
uresult = (u1 >> 1);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RRU: %#x >>= %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "RRU: %#x >>= %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, c);
}
uresult = u1 | 0xfff00;
else
uresult = u1 & 0x000ff;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "SXT: %#x -> %#x",
- u1, uresult);
+ TRACE_ALU (MSP430_CPU (sd), "SXT: %#x -> %#x",
+ u1, uresult);
DEST (uresult);
FLAGS (uresult, c);
}
REG_PUT (MSR_SP, REG_GET (MSR_SP) - op_bytes);
mem_put_val (sd, SP, PC, op_bits);
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "CALL: func %#x ret %#x, sp %#x",
- u1, PC, SP);
+ TRACE_ALU (MSP430_CPU (sd), "CALL: func %#x ret %#x, sp %#x",
+ u1, PC, SP);
REG_PUT (MSR_PC, u1);
break;
8-bits of SR will have been written to the stack here, and will
have been read as 0. */
PC |= (u1 & 0xF000) << 4;
- if (TRACE_ALU_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_ALU_IDX,
- "RETI: pc %#x sr %#x",
- PC, SR);
+ TRACE_ALU (MSP430_CPU (sd), "RETI: pc %#x sr %#x",
+ PC, SR);
break;
/* Jumps. */
if (u1)
{
- if (TRACE_BRANCH_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_BRANCH_IDX,
- "J%s: pc %#x -> %#x sr %#x, taken",
- cond_string (opcode->cond), PC, i, SR);
+ TRACE_BRANCH (MSP430_CPU (sd), "J%s: pc %#x -> %#x sr %#x, taken",
+ cond_string (opcode->cond), PC, i, SR);
PC = i;
if (PC == opcode_pc)
exit (0);
}
else
- if (TRACE_BRANCH_P (MSP430_CPU (sd)))
- trace_generic (sd, MSP430_CPU (sd), TRACE_BRANCH_IDX,
- "J%s: pc %#x to %#x sr %#x, not taken",
- cond_string (opcode->cond), PC, i, SR);
+ TRACE_BRANCH (MSP430_CPU (sd), "J%s: pc %#x to %#x sr %#x, not taken",
+ cond_string (opcode->cond), PC, i, SR);
break;
default: