/* This file is part of the program psim.
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
+ Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "misc.h"
#include "lf.h"
#include "table.h"
-#include "config.h"
+#include "build-config.h"
#include "filter.h"
-#include "ld-decode.h"
#include "ld-cache.h"
+#include "ld-decode.h"
#include "ld-insn.h"
#include "igen.h"
switch (*pos) {
case '/':
case '-':
+ case '(':
+ case ')':
break;
case ' ':
nr += lf_putchr(file, '_');
SEMANTIC_FUNCTION_FORMAL);
lf_printf(file, "\n");
if ((code & generate_calls)) {
+ lf_printf(file, "extern int option_mpc860c0;\n");
+ lf_printf(file, "#define PAGE_SIZE 0x1000\n");
+ lf_printf(file, "\n");
+ lf_printf(file, "PSIM_EXTERN_SEMANTICS(void)\n");
+ lf_printf(file, "semantic_init(device* root);\n");
+ lf_printf(file, "\n");
if (generate_expanded_instructions)
insn_table_traverse_tree(table,
file, NULL,
lf_printf(file, "#include \"cpu.h\"\n");
lf_printf(file, "#include \"idecode.h\"\n");
lf_printf(file, "#include \"semantics.h\"\n");
+ lf_printf(file, "#ifdef HAVE_COMMON_FPU\n");
+ lf_printf(file, "#include \"sim-inline.h\"\n");
+ lf_printf(file, "#include \"sim-fpu.h\"\n");
+ lf_printf(file, "#endif\n");
lf_printf(file, "#include \"support.h\"\n");
lf_printf(file, "\n");
+ lf_printf(file, "int option_mpc860c0 = 0;\n");
+ lf_printf(file, "\n");
+ lf_printf(file, "PSIM_EXTERN_SEMANTICS(void)\n");
+ lf_printf(file, "semantic_init(device* root)\n");
+ lf_printf(file, "{\n");
+ lf_printf(file, " option_mpc860c0 = 0;\n");
+ lf_printf(file, " if (tree_find_property(root, \"/options/mpc860c0\"))\n");
+ lf_printf(file, " option_mpc860c0 = tree_find_integer_property(root, \"/options/mpc860c0\");\n");
+ lf_printf(file, " option_mpc860c0 *= 4; /* convert word count to byte count */\n");
+ lf_printf(file, "}\n");
+ lf_printf(file, "\n");
if (generate_expanded_instructions)
insn_table_traverse_tree(table,
file, cache_rules,
lf_printf(file, "#include \"idecode.h\"\n");
lf_printf(file, "#include \"semantics.h\"\n");
lf_printf(file, "#include \"icache.h\"\n");
+ lf_printf(file, "#ifdef HAVE_COMMON_FPU\n");
+ lf_printf(file, "#include \"sim-inline.h\"\n");
+ lf_printf(file, "#include \"sim-fpu.h\"\n");
+ lf_printf(file, "#endif\n");
lf_printf(file, "#include \"support.h\"\n");
lf_printf(file, "\n");
insn_table_traverse_function(table,
decode_table *decode_rules = NULL;
filter *filters = NULL;
insn_table *instructions = NULL;
+ table_include *includes = NULL;
char *real_file_name = NULL;
int is_header = 0;
int ch;
printf(" -H <high-bit> Set the nr of the high (msb bit)\n");
printf(" -N <nr-cpus> Specify the max number of cpus the simulation will support\n");
printf(" -J Use jumps instead of function calls\n");
+ printf(" -T <mechanism> Override the mechanism used to decode an instruction\n");
+ printf(" using <mechanism> instead of what was specified in the\n");
+ printf(" decode-rules input file\n");
printf("\n");
printf("Input options (ucase version also dumps loaded table):\n");
- printf(" -o <opcode-rules>\n");
+ printf(" -o <decode-rules>\n");
printf(" -k <cache-rules>\n");
printf(" -i <instruction-table>\n");
printf("\n");
}
while ((ch = getopt(argc, argv,
- "F:EI:RSLJCB:H:N:o:k:i:n:hc:d:m:s:t:f:"))
+ "F:EI:RSLJT:CB:H:N:o:k:i:n:hc:d:m:s:t:f:"))
!= -1) {
fprintf(stderr, "\t-%c %s\n", ch, (optarg ? optarg : ""));
switch(ch) {
case 'E':
generate_expanded_instructions = 1;
break;
+ case 'G':
+ {
+ int enable_p;
+ char *argp;
+ if (strncmp (optarg, "no-", strlen ("no-")) == 0)
+ {
+ argp = optarg + strlen ("no-");
+ enable_p = 0;
+ }
+ else if (strncmp (optarg, "!", strlen ("!")) == 0)
+ {
+ argp = optarg + strlen ("no-");
+ enable_p = 0;
+ }
+ else
+ {
+ argp = optarg;
+ enable_p = 1;
+ }
+ if (strncmp (argp, "gen-icache", strlen ("gen-icache")) == 0)
+ {
+ switch (argp[strlen ("gen-icache")])
+ {
+ case '=':
+ icache_size = atoi (argp + strlen ("gen-icache") + 1);
+ code |= generate_with_icache;
+ break;
+ case '\0':
+ code |= generate_with_icache;
+ break;
+ default:
+ error (NULL, "Expecting -Ggen-icache or -Ggen-icache=<N>\n");
+ }
+ }
+ }
case 'I':
- icache_size = a2i(optarg);
- code |= generate_with_icache;
+ {
+ table_include **dir = &includes;
+ while ((*dir) != NULL)
+ dir = &(*dir)->next;
+ (*dir) = ZALLOC (table_include);
+ (*dir)->dir = strdup (optarg);
+ }
break;
case 'N':
generate_smp = a2i(optarg);
code &= ~generate_calls;
code |= generate_jumps;
break;
+ case 'T':
+ force_decode_gen_type(optarg);
+ break;
case 'i':
- if (decode_rules == NULL || cache_rules == NULL) {
- fprintf(stderr, "Must specify decode and cache tables\n");
+ if (decode_rules == NULL) {
+ fprintf(stderr, "Must specify decode tables\n");
exit (1);
}
- instructions = load_insn_table(optarg, decode_rules, filters);
+ instructions = load_insn_table(optarg, decode_rules, filters, includes,
+ &cache_rules);
fprintf(stderr, "\texpanding ...\n");
insn_table_expand_insns(instructions);
break;