gdb/

[deliverable/binutils-gdb.git] / sim / ppc / ppc-instructions

diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions
index 1991c49309c785f39100a08399220dbc6836e356..1b8fd89ad29a369b793002f6ed462996b52150bb 100644 (file)
--- a/sim/ppc/ppc-instructions
+++ b/sim/ppc/ppc-instructions
@@ -21,7 +21,7 @@
 #
 #   This program is free software; you can redistribute it and/or modify
 #   it under the terms of the GNU General Public License as published by
-#   the Free Software Foundation; either version 2 of the License, or
+#   the Free Software Foundation; either version 3 of the License, or
 #   (at your option) any later version.
 #
 #   This program is distributed in the hope that it will be useful,
@@ -30,8 +30,7 @@
 #   GNU General Public License for more details.
 #
 #   You should have received a copy of the GNU General Public License
-#   along with this program; if not, write to the Free Software
-#   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#   along with this program; if not, see <http://www.gnu.org/licenses/>.
 #
 
 :cache::::RA:RA:
@@ -2494,7 +2493,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
        }
        PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 1/*Rc*/);
 
-0.31,6./,11./,16./,21.598,31./:X::sync:Synchronize
+0.31,6./,9.L,11./,16./,21.598,31./:X::sync:Synchronize
 *601: PPC_UNIT_IU,    PPC_UNIT_IU,    1,  1,  0
 *603: PPC_UNIT_SRU,   PPC_UNIT_SRU,   1,  1,  0
 *603e:PPC_UNIT_SRU,   PPC_UNIT_SRU,   1,  1,  0
@@ -3402,6 +3401,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
            case spr_dec:
              *rT = cpu_get_decrementer(processor);
              break;
+               case spr_tbrl:
+                 if (is_64bit_implementation) *rT = TB;
+                 else                         *rT = EXTRACTED64(TB, 32, 63);
+               break;
+               case spr_tbru:
+                 if (is_64bit_implementation) *rT = EXTRACTED64(TB, 0, 31);
+                 else                         *rT = EXTRACTED64(TB, 0, 31);
+               break;
            case spr_tbu:
            case spr_tbl:
              /* NOTE - these SPR's are not readable. Use mftb[ul] */
@@ -3644,6 +3651,18 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
        STORE(EA, 8, *frS);
        PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK);
 
+0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f::Store Floating-Point Integer Word Indexed
+*603: PPC_UNIT_LSU,   PPC_UNIT_LSU,   1,  2,  0
+*603e:PPC_UNIT_LSU,   PPC_UNIT_LSU,   1,  2,  0
+*604: PPC_UNIT_LSU,   PPC_UNIT_LSU,   1,  3,  0
+       unsigned_word b;
+       unsigned_word EA;
+       if (RA_is_0) b = 0;
+       else         b = *rA;
+       EA = b + *rB;
+       STORE(EA, 4, *frS);
+       PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK);
+
 0.55,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double with Update
 *601: PPC_UNIT_IU,    PPC_UNIT_IU,    1,  1,  0
 *603: PPC_UNIT_LSU,   PPC_UNIT_LSU,   1,  2,  0
@@ -3953,12 +3972,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 0, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -3998,12 +4019,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 1, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4043,12 +4066,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 0, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4088,12 +4113,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 1, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4133,12 +4160,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 0, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4178,12 +4207,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 1, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4223,12 +4254,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 0, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4268,12 +4301,14 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
                                 fpscr_vxsnan | fpscr_vximz,
                                 1, /*single?*/
                                 0) /*negate?*/) {
+         union { double d; unsigned64 u; } tmp;
          invalid_arithemetic_operation(processor, cia,
-                                       (unsigned64*)&product, *frA, 0, *frC,
+                                       &tmp.u, *frA, 0, *frC,
                                        0, /*instruction_is_frsp*/
                                        0, /*instruction_is_convert_to_64bit*/
                                        0, /*instruction_is_convert_to_32bit*/
                                        0); /*single-precision*/
+         product = tmp.d;
        }
        else {
          /*HACK!*/
@@ -4682,13 +4717,6 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
        FPSCR |= bit;
        FPSCR_END(Rc);
 
-
-#
-# I.A.1.1 Floating-Point Store Instruction
-#
-0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f,o::Store Floating-Point as Integer Word Indexed
-       program_interrupt(processor, cia, optional_instruction_program_interrupt);
-
 #
 # I.A.1.2 Floating-Point Arithmetic Instructions
 #