#
# This file is part of the program psim.
#
-# Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
+# Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
#
# --
#
do { \
if (CURRENT_MODEL_ISSUE > 0) { \
if (RC) \
- ppc_insn_int(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \
- else \
ppc_insn_int_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \
+ else \
+ ppc_insn_int(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \
} \
} while (0)
tail->count = model_ptr->nr_stalls_writeback;
tail->name = "";
tail->suffix_plural = "times a write-back slot was unavailable";
- tail->suffix_singular = "time a writeback was unavilable";
+ tail->suffix_singular = "time a writeback was unavailable";
}
if (model_ptr->nr_branches) {
: 0);
int::function::is_inf:unsigned64 frs, int single
int exp = biased_exp(frs, single);
- int frac = fraction(frs, single);
+ unsigned64 frac = fraction(frs, single);
return (exp == (single ? 255 : 2047) && frac == 0
? sign(frs)
: 0);
int::function::is_NaN:unsigned64 frs, int single
int exp = biased_exp(frs, single);
- int frac = fraction(frs, single);
+ unsigned64 frac = fraction(frs, single);
return (exp == (single ? 255 : 2047) && frac != 0
? sign(frs)
: 0);
}
else { /* arrith, frsp */
*frt = select_qnan(fra, frb, frc,
- instruction_is_frsp, 0/*generate*/, single);
+ instruction_is_frsp, 1/*generate*/, single);
FPSCR_SET_FR(0);
FPSCR_SET_FI(0);
FPSCR_SET_FPRF(fpscr_rf_quiet_nan);
+# detect divide by zero
+int::function::is_invalid_zero_divide:cpu *processor, unsigned_word cia, unsigned64 fra, unsigned64 frb, int single
+ int fail = 0;
+ if (is_zero (frb)) {
+ FPSCR_SET_ZX (1);
+ fail = 1;
+ }
+ return fail;
+
+
+
+
+# handle case of invalid operation
+void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia, unsigned64 *frt, unsigned64 fra, unsigned64 frb, int single
+ if (FPSCR & fpscr_ze) {
+ /* zero-divide exception enabled */
+ /* FRT unchaged */
+ FPSCR_SET_FR(0);
+ FPSCR_SET_FI(0);
+ /* fpscr_FPRF unchanged */
+ }
+ else {
+ /* zero-divide exception disabled */
+ FPSCR_SET_FR(0);
+ FPSCR_SET_FI(0);
+ if ((sign (fra) < 0 && sign (frb) < 0)
+ || (sign (fra) > 0 && sign (frb) > 0)) {
+ *frt = MASK64 (1, 11); /* 0 : 2047 : 0..0 */
+ FPSCR_SET_FPRF(fpscr_rf_pos_infinity);
+ }
+ else {
+ *frt = MASK64 (0, 11); /* 1 : 2047 : 0..0 */
+ FPSCR_SET_FPRF(fpscr_rf_neg_infinity);
+ }
+ }
+
+
+
+
+
#
# 0.0.0.0 Illegal instruction used for kernel mode emulation
#
*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
+ /* option_mpc860c0:
+ No problem here because this branch is predicted taken (unconditional). */
if (AA) NIA = IEA(EXTS(LI_0b00));
else NIA = IEA(CIA + EXTS(LI_0b00));
if (LK) LR = (spreg)CIA+4;
else
succeed = 0;
if (LK) LR = (spreg)IEA(CIA + 4);
+ if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) {
+ /* This branch is predicted as "normal".
+ If this is a forward branch and it is near the end of a page,
+ we've detected a problematic branch. */
+ if (succeed && NIA > CIA) {
+ if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0)
+ program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt);
+ }
+ }
if (CURRENT_MODEL_ISSUE > 0)
model_branches(cpu_model(processor), succeed, BO);
if (! BO{0}) {
else
succeed = 0;
if (LK) LR = (spreg)IEA(CIA + 4);
+ if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) {
+ /* This branch is predicted as not-taken.
+ If this is a forward branch and it is near the end of a page,
+ we've detected a problematic branch. */
+ if (succeed && NIA > CIA) {
+ if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0)
+ program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt);
+ }
+ }
if (CURRENT_MODEL_ISSUE > 0) {
model_branches(cpu_model(processor), succeed, BO);
if (! BO{0})
else
succeed = 0;
if (LK) LR = (spreg)IEA(CIA + 4);
+ if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) {
+ /* This branch is predicted as not-taken.
+ If this is a forward branch and it is near the end of a page,
+ we've detected a problematic branch. */
+ if (succeed && NIA > CIA) {
+ if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0)
+ program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt);
+ }
+ }
if (CURRENT_MODEL_ISSUE > 0) {
model_branches(cpu_model(processor), succeed, BO);
if (! BO{0})
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
*rT = MEM(unsigned, EA, 1);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*rT = MEM(unsigned, EA, 1);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
*rT = MEM(unsigned, EA, 2);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*rT = MEM(unsigned, EA, 2);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
*rT = MEM(signed, EA, 2);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*rT = MEM(signed, EA, 2);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*rT = MEM(signed, EA, 2);
+ *rA = EA;
PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK, 0);
0.31,6.RT,11.RA,16.RB,21.375,31./:X:::Load Halfword Algebraic with Update Indexed
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
*rT = MEM(unsigned, EA, 4);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*rT = MEM(unsigned, EA, 4);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
unsigned_word EA;
- if (RA == 0 || RA == RT)
+ if (RA_is_0 || RA == RT)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
0.58,6.RT,11.RA,16.DS,30.2:DS:64::Load Word Algebraic
# unsigned_word b;
# unsigned_word EA;
-# if (RA == 0) b = 0;
+# if (RA_is_0) b = 0;
# else b = *rA;
# EA = b + EXTS(DS_0b00);
# *rT = MEM(signed, EA, 4);
0.31,6.RT,11.RA,16.RB,21.341,31./:X:64::Load Word Algebraic Indexed
# unsigned_word b;
# unsigned_word EA;
-# if (RA == 0) b = 0;
+# if (RA_is_0) b = 0;
# else b = *rA;
# EA = b + *rB;;
# *rT = MEM(signed, EA, 4);
0.31,6.RT,11.RA,16.RB,21.373,31./:X:64::Load Word Algebraic with Update Indexed
# unsigned_word EA;
-# if (RA == 0 || RA == RT)
+# if (RA_is_0 || RA == RT)
# program_interrupt(processor, cia
# illegal_instruction_program_interrupt);
# EA = *rA + *rB;
0.58,6.RT,11.RA,16.DS,30.0:DS:64::Load Doubleword
# unsigned_word b;
# unsigned_word EA;
-# if (RA == 0) b = 0;
+# if (RA_is_0) b = 0;
# else b = *rA;
# EA = b + EXTS(DS_0b00);
# *rT = MEM(unsigned, EA, 8);
0.31,6.RT,11.RA,16.RB,21.21,31./:X:64::Load Doubleword Indexed
# unsigned_word b;
# unsigned_word EA;
-# if (RA == 0) b = 0;
+# if (RA_is_0) b = 0;
# else b = *rA;
# EA = b + *rB;
# *rT = MEM(unsigned, EA, 8);
0.58,6.RT,11.RA,16.DS,30.1:DS:64::Load Doubleword with Update
# unsigned_word EA;
-# if (RA == 0 || RA == RT)
+# if (RA_is_0 || RA == RT)
# program_interrupt(processor, cia
# illegal_instruction_program_interrupt);
# EA = *rA + EXTS(DS_0b00);
0.31,6.RT,11.RA,16.RB,21.53,31./:DS:64::Load Doubleword with Update Indexed
# unsigned_word EA;
-# if (RA == 0 || RA == RT)
+# if (RA_is_0 || RA == RT)
# program_interrupt(processor, cia
# illegal_instruction_program_interrupt);
# EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
STORE(EA, 1, *rS);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 1, *rS);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
STORE(EA, 2, *rS);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 2, *rS);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
STORE(EA, 4, *rS);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 4, *rS);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
0.62,6.RS,11.RA,16.DS,30.0:DS:64::Store Doubleword
# unsigned_word b;
# unsigned_word EA;
-# if (RA == 0) b = 0;
+# if (RA_is_0) b = 0;
# else b = *rA;
# EA = b + EXTS(DS_0b00);
# STORE(EA, 8, *rS);
0.31,6.RS,11.RA,16.RB,21.149,31./:X:64::Store Doubleword Indexed
# unsigned_word b;
# unsigned_word EA;
-# if (RA == 0) b = 0;
+# if (RA_is_0) b = 0;
# else b = *rA;
# EA = b + *rB;
# STORE(EA, 8, *rS);
0.62,6.RS,11.RA,16.DS,30.1:DS:64::Store Doubleword with Update
# unsigned_word EA;
-# if (RA == 0)
+# if (RA_is_0)
# program_interrupt(processor, cia
# illegal_instruction_program_interrupt);
# EA = *rA + EXTS(DS_0b00);
# *rA = EA;
0.31,6.RS,11.RA,16.RB,21.181,31./:X:64::Store Doubleword with Update Indexed
# unsigned_word EA;
-# if (RA == 0)
+# if (RA_is_0)
# program_interrupt(processor, cia
# illegal_instruction_program_interrupt);
# EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*rT = SWAP_2(MEM(unsigned, EA, 2));
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*rT = SWAP_4(MEM(unsigned, EA, 4));
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 2, SWAP_2(*rS));
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 4, SWAP_4(*rS));
unsigned_word EA;
unsigned_word b;
int r;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
r = RT;
unsigned_word EA;
unsigned_word b;
int r;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT
#
0.31,6.RT,11.RA,16.NB,21.597,31./:X:::Load String Word Immediate
-# unsigned_word EA;
-# int n;
-# int r;
-# int i;
-# int nr;
-# if (RA == 0) EA = 0;
-# else EA = *rA;
-# if (NB == 0) n = 32;
-# else n = NB;
-# r = RT - 1;
-# i = 32;
-# nr = (n + 3) / 4;
-# if ((RT + nr >= 32)
-# ? (RA >= RT && RA < RT + nr)
-# : (RA >= RT || RA < (RT + nr) % 32))
-# program_interrupt(processor, cia,
-# illegal_instruction_program_interrupt);
-# if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
-# alignment_interrupt(processor, cia, EA);
-# while (n > 0) {
-# if (i == 32) {
-# r = (r + 1) % 32;
-# GPR(r) = 0;
-# }
-# GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
-# if (i == 64) i = 32;
-# EA = EA + 1;
-# n = n - 1;
-# }
+ unsigned_word EA;
+ int n;
+ int r;
+ int i;
+ int nr;
+ if (RA_is_0) EA = 0;
+ else EA = *rA;
+ if (NB == 0) n = 32;
+ else n = NB;
+ r = RT - 1;
+ i = 32;
+ nr = (n + 3) / 4;
+ if ((RT + nr >= 32)
+ ? (RA >= RT || RA < (RT + nr) % 32)
+ : (RA >= RT && RA < RT + nr))
+ program_interrupt(processor, cia,
+ illegal_instruction_program_interrupt);
+ if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
+ alignment_interrupt(processor, cia, EA);
+ while (n > 0) {
+ if (i == 32) {
+ r = (r + 1) % 32;
+ GPR(r) = 0;
+ }
+ GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
+ if (i == 64) i = 32;
+ EA = EA + 1;
+ n = n - 1;
+ }
0.31,6.RT,11.RA,16.RB,21.533,31./:X:::Load String Word Indexed
-# unsigned_word EA;
-# unsigned_word b;
-# int n;
-# int r;
-# int i;
-# int nr;
-# if (RA == 0) b = 0;
-# else b = *rA;
-# EA = b + *rB;
-# n = EXTRACTED32(XER, 25, 31);
-# r = RT - 1;
-# i = 32;
-# nr = (n + 3) / 4;
-# if (((RT + n >= 32)
-# ? ((RA >= RT && RA < RT + n)
-# || (RB >= RT && RB < RT + n))
-# : ((RA >= RT || RA < (RT + n) % 32)
-# || (RB >= RT || RB < (RT + n) % 32)))
-# || (RT == RA || RT == RB))
-# program_interrupt(processor, cia,
-# illegal_instruction_program_interrupt);
-# if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
-# alignment_interrupt(processor, cia, EA);
-# while (n > 0) {
-# if (i == 32) {
-# r = (r + 1) % 32;
-# GPR(i) = 0;
-# }
-# GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
-# i = i + 8;
-# if (i == 64) i = 32;
-# EA = EA + 1;
-# n = n - 1;
-# }
+ unsigned_word EA;
+ unsigned_word b;
+ int n;
+ int r;
+ int i;
+ int nr;
+ if (RA_is_0) b = 0;
+ else b = *rA;
+ EA = b + *rB;
+ n = EXTRACTED32(XER, 25, 31);
+ r = RT - 1;
+ i = 32;
+ nr = (n + 3) / 4;
+ if (((RT + n >= 32)
+ ? ((RA >= RT || RA < (RT + n) % 32)
+ || (RB >= RT || RB < (RT + n) % 32))
+ : ((RA >= RT && RA < RT + n)
+ || (RB >= RT && RB < RT + n)))
+ || (RT == RA || RT == RB))
+ program_interrupt(processor, cia,
+ illegal_instruction_program_interrupt);
+ if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
+ alignment_interrupt(processor, cia, EA);
+ while (n > 0) {
+ if (i == 32) {
+ r = (r + 1) % 32;
+ GPR(i) = 0;
+ }
+ GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
+ i = i + 8;
+ if (i == 64) i = 32;
+ EA = EA + 1;
+ n = n - 1;
+ }
0.31,6.RS,11.RA,16.NB,21.725,31./:X:::Store String Word Immedate
-# unsigned_word EA;
-# int n;
-# int r;
-# int i;
-# if (RA == 0) EA = 0;
-# else EA = *rA;
-# if (NB == 0) n = 32;
-# else n = NB;
-# r = RS - 1;
-# i = 32;
-# if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
-# alignment_interrupt(processor, cia, EA);
-# while (n > 0) {
-# if (i == 32) r = (r + 1) % 32;
-# STORE(EA, 1, EXTRACTED(GPR(r), i, i+7));
-# i = i + 8;
-# if (i == 64) i = 32;
-# EA = EA + 1;
-# n = n - 1;
-# }
+ unsigned_word EA;
+ int n;
+ int r;
+ int i;
+ if (RA_is_0) EA = 0;
+ else EA = *rA;
+ if (NB == 0) n = 32;
+ else n = NB;
+ r = RS - 1;
+ i = 32;
+ if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
+ alignment_interrupt(processor, cia, EA);
+ while (n > 0) {
+ if (i == 32) r = (r + 1) % 32;
+ STORE(EA, 1, EXTRACTED(GPR(r), i, i+7));
+ i = i + 8;
+ if (i == 64) i = 32;
+ EA = EA + 1;
+ n = n - 1;
+ }
0.31,6.RS,11.RA,16.RB,21.661,31./:X:::Store String Word Indexed
-# unsigned_word EA;
-# unsigned_word b;
-# int n;
-# int r;
-# int i;
-# if (RA == 0) b = 0;
-# else b = *rA;
-# EA = b + *rB;
-# if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
-# alignment_interrupt(processor, cia, EA);
-# n = EXTRACTED32(XER, 25, 31);
-# r = RS - 1;
-# i = 32;
-# while (n > 0) {
-# if (i == 32) r = (r + 1) % 32;
-# STORE(EA, 1, EXTRACTED(GPR(r), i, i+7));
-# i = i + 8;
-# if (i == 64) i = 32;
-# EA = EA + 1;
-# n = n - 1;
-# }
+ unsigned_word EA;
+ unsigned_word b;
+ int n;
+ int r;
+ int i;
+ if (RA_is_0) b = 0;
+ else b = *rA;
+ EA = b + *rB;
+ if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
+ alignment_interrupt(processor, cia, EA);
+ n = EXTRACTED32(XER, 25, 31);
+ r = RS - 1;
+ i = 32;
+ while (n > 0) {
+ if (i == 32) r = (r + 1) % 32;
+ STORE(EA, 1, EXTRACTED(GPR(r), i, i+7));
+ i = i + 8;
+ if (i == 64) i = 32;
+ EA = EA + 1;
+ n = n - 1;
+ }
#
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
RESERVE = 1;
0.31,6.RT,11.RA,16.RB,21.84,31./:X:64::Load Doubleword And Reserve Indexed
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
RESERVE = 1;
*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
if (RESERVE) {
0.31,6.RS,11.RA,16.RB,21.214,31.1:X:64::Store Doubleword Conditional Indexed
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
if (RESERVE) {
0.31,6.RT,11.RA,16.RB,21./,22.9,31.Rc:XO:64::Multiply High Doubleword Unsigned
-0.31,6.RT,11.RA,16.RB,21./,22.11,31.Rc:XO::milhwu:Multiply High Word Unsigned
+0.31,6.RT,11.RA,16.RB,21./,22.11,31.Rc:XO::mulhwu:Multiply High Word Unsigned
*601: PPC_UNIT_IU, PPC_UNIT_IU, 10, 10, 0
*603: PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0
*603e:PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0
*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int n = MASKED(*rB, 59, 63);
+ int n = MASKED(*rB, 58, 63);
unsigned32 source = *rS;
signed_word shifted;
if (n < 32)
*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int n = MASKED(*rB, 59, 63);
+ int n = MASKED(*rB, 58, 63);
unsigned32 source = *rS;
signed_word shifted;
if (n < 32)
*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int n = MASKED(*rB, 58, 63);
- int shift = (n >= 31 ? 31 : n);
+ unsigned64 mask;
+ int n = MASKED(*rB, 59, 63);
signed32 source = (signed32)*rS; /* signed to keep sign bit */
- signed32 shifted = source >> shift;
- unsigned32 mask = ((unsigned32)-1) >> (31-shift);
- *rA = (signed_word)shifted; /* if 64bit will sign extend */
- if (source < 0 && (source & mask))
+ signed32 shifted = source >> n;
+ int S = (MASKED(*rS,32,32) != 0);
+ signed64 r = ((unsigned64) source);
+ r = ((unsigned64) source) << 32 | (unsigned32) source;
+ r = ROTL64(r,64-n);
+ if (MASKED(*rB,58,58) == 0)
+ mask = (unsigned64) MASK64(n+32,63);
+ else
+ mask = (unsigned64) 0;
+ *rA = (signed_word) (r & mask | ((signed64) -1*S) & ~mask); /* if 64bit will sign extend */
+ if (S && (MASKED(r & ~mask,32,63)!=0))
XER |= xer_carry;
else
XER &= ~xer_carry;
- CR0_COMPARE(shifted, 0, Rc);
+ CR0_COMPARE(*rA, 0, Rc);
ITRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n",
(long)*rA, (long)*rA, (long)XER));
PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
*frT = DOUBLE(MEM(unsigned, EA, 4));
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*frT = DOUBLE(MEM(unsigned, EA, 4));
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*rA = EA;
PPC_INSN_INT_FLOAT(RA_BITMASK, FRT_BITMASK, (RA_BITMASK & ~1), 0);
-0.31,6.FRT,11.RA,16.RB,21.576,31./:X:f::Load Floating-Point Single with Update Indexed
+0.31,6.FRT,11.RA,16.RB,21.567,31./:X:f::Load Floating-Point Single with Update Indexed
*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
*frT = MEM(unsigned, EA, 8);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
*frT = MEM(unsigned, EA, 8);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
STORE(EA, 4, SINGLE(*frS));
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 4, SINGLE(*frS));
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + EXTS(D);
STORE(EA, 8, *frS);
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word b;
unsigned_word EA;
- if (RA == 0) b = 0;
+ if (RA_is_0) b = 0;
else b = *rA;
EA = b + *rB;
STORE(EA, 8, *frS);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + EXTS(D);
*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
unsigned_word EA;
- if (RA == 0)
+ if (RA_is_0)
program_interrupt(processor, cia,
illegal_instruction_program_interrupt);
EA = *rA + *rB;
0, /*instruction_is_convert_to_32bit*/
0); /*single-precision*/
}
+ else if (is_invalid_zero_divide (processor, cia,
+ *frA, *frB,
+ 0 /*single?*/)) {
+ invalid_zero_divide_operation (processor, cia,
+ frT, *frA, *frB,
+ 0 /*single?*/);
+ }
else {
/*HACK!*/
double s = *(double*)frA / *(double*)frB;
0, /*instruction_is_convert_to_32bit*/
1); /*single-precision*/
}
+ else if (is_invalid_zero_divide (processor, cia,
+ *frA, *frB,
+ 1 /*single?*/)) {
+ invalid_zero_divide_operation (processor, cia,
+ frT, *frA, *frB,
+ 1 /*single?*/);
+ }
else {
/*HACK!*/
float s = *(double*)frA / *(double*)frB;
}
/* G|R|X == zero from above */
while (exp < -126) {
- exp = exp - 1;
+ exp = exp + 1;
frac_grx = (INSERTED64(EXTRACTED64(frac_grx, 0, 54), 1, 55)
| MASKED64(frac_grx, 55, 55));
}
#
0.63,6.FRT,11./,16./,21.583,31.Rc:X:f::Move From FPSCR
- floating_point_assist_interrupt(processor, cia);
-# FPSCR_BEGIN;
-# *frT = FPSCR;
-# FPSCR_END(Rc);
+ FPSCR_BEGIN;
+ *frT = FPSCR;
+ FPSCR_END(Rc);
0.63,6.BF,9./,11.BFA,14./,16./,21.64,31./:X:f::Move to Condition Register from FPSCR
- floating_point_assist_interrupt(processor, cia);
-# FPSCR_BEGIN;
-# unsigned field = FPSCR_FIELD(BFA);
-# CR_SET(BF, field);
-# switch (BFA) {
-# case 0:
-# FPSCR &= ~(fpscr_fx | fpscr_ox);
-# break;
-# case 1:
-# FPSCR &= ~(fpscr_ux | fpscr_zx | fpscr_xx | fpscr_vxsnan);
-# break;
-# case 2:
-# FPSCR &= ~(fpscr_vxisi | fpscr_vxidi | fpscr_vxzdz | fpscr_vximz);
-# break;
-# case 3:
-# FPSCR &= ~(fpscr_vxvc);
-# break;
-# case 5:
-# FPSCR &= ~(fpscr_vxsoft | fpscr_vxsqrt | fpscr_vxcvi);
-# break;
-# }
-# FPSCR_END(0);
+ FPSCR_BEGIN;
+ unsigned field = FPSCR_FIELD(BFA);
+ CR_SET(BF, field);
+ FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */
+ FPSCR_END(0);
0.64,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate
- floating_point_assist_interrupt(processor, cia);
-# FPSCR_BEGIN;
-# FPSCR_SET(BF, U);
-# /* FIXME - what about the effect this has on exception bits */
-# FPSCR_END(Rc);
+ FPSCR_BEGIN;
+ FPSCR_SET(BF, U);
+ FPSCR_END(Rc);
0.63,6./,7.FLM,15./,16.FRB,21.711,31.Rc:XFL:f::Move To FPSCR Fields
FPSCR_BEGIN;
FPSCR_END(Rc);
0.63,6.BT,11./,16./,21.70,31.Rc:X:f::Move To FPSCR Bit 0
- floating_point_assist_interrupt(processor, cia);
-# FPSCR_BEGIN;
-# unsigned32 mask = ~BIT32(BT) | (fpscr_fex | fpscr_vx);
-# FPSCR &= mask;
-# /* FIXME - what about the effect this has on exception bits */
-# FPSCR_END(Rc);
+ FPSCR_BEGIN;
+ unsigned32 bit = BIT32(BT);
+ FPSCR &= ~bit;
+ FPSCR_END(Rc);
0.63,6.BT,11./,16./,21.38,31.Rc:X:f::Move To FPSCR Bit 1
- floating_point_assist_interrupt(processor, cia);
-# FPSCR_BEGIN;
-# unsigned32 bit = BIT32(BT) & ~(fpscr_fex | fpscr_vx);
-# FPSCR |= bit;
-# /* FIXME - need to take care of when and why FX is set */
-# /* FIXME - if FX (or another exception bit is set) shall
-# an exception occure */
-# /* FPSCR |= fpscr_fx; */
-# /* FIXME - what about the effect this has on exception bits */
-# FPSCR_END(Rc);
+ FPSCR_BEGIN;
+ unsigned32 bit = BIT32(BT);
+ if (bit & fpscr_fi)
+ bit |= fpscr_xx;
+ if ((bit & fpscr_vx_bits))
+ bit |= fpscr_fx;
+ /* note - omit vx bit */
+ if ((bit & (fpscr_ox | fpscr_ux | fpscr_zx | fpscr_xx)))
+ bit |= fpscr_fx;
+ FPSCR |= bit;
+ FPSCR_END(Rc);
#
projects / deliverable / binutils-gdb.git / blobdiff