busy_ptr->nr_writebacks = 1;
TRACE(trace_model,("Making register %s busy.\n", spr_name(nSPR)));
-# Schedule a MFCR instruction that moves the CR into an integer regsiter
+# Schedule a MFCR instruction that moves the CR into an integer register
void::model-function::ppc_insn_mfcr:itable_index index, model_data *model_ptr, unsigned32 int_mask
const unsigned32 cr_mask = 0xff;
model_busy *busy_ptr;
tail->suffix_singular = "";
}
- for (j = 0; j < (sizeof(ppc_branch_conditional_name) / sizeof(ppc_branch_conditional_name[0])) ; j++) {
+ for (j = 0; j < ARRAY_SIZE (ppc_branch_conditional_name); j++) {
if (model_ptr->nr_branch_conditional[j]) {
tail->next = ZALLOC(model_print);
tail = tail->next;
spreg new_val = (spr_length(n) == 64
? *rS
: MASKED(*rS, 32, 63));
- /* HACK - time base registers need to be updated immediatly */
+ /* HACK - time base registers need to be updated immediately */
if (WITH_TIME_BASE) {
switch (n) {
case spr_tbu:
*rT = (unsigned32)CR;
PPC_INSN_MFCR(RT_BITMASK);
-#
-# I.3.3.15 Fixed-Point Select
-#
-
-0.31,6.RT,11.RA,16.RB,21.BF,26.15,31./:A::isel:Integer Select
- unsigned_word a;
- if (RA_is_0) a = 0;
- else a = *rA;
- if (CR & (1 << (31 - BF)))
- *rT = a;
- else
- *rT = *rB;
-
#
# I.4.6.2 Floating-Point Load Instructions
#