"SET_SR_T (0);",
},
- { "", "", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
+ { "", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100", /* ? MVS */
"div1 (R, m, n/*, T*/);",
},
"}",
},
/* sh2e */
- { "", "", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
+ { "", "n", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
/* sh4 */
"if (FPSCR_SZ) {",
" MA (2);",
"}",
},
/* sh2e */
- { "", "", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
+ { "", "m", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
/* sh4 */
"if (FPSCR_SZ) {",
" MA (2);",
"}",
},
/* sh2e */
- { "", "", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
+ { "m", "m", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
/* sh4 */
"if (FPSCR_SZ) {",
" MA (2);",
"}",
},
/* sh2e */
- { "", "", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
+ { "n", "n", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
/* sh4 */
"if (FPSCR_SZ) {",
" MA (2);",
"}",
},
/* sh2e */
- { "", "", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
+ { "", "0m", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
/* sh4 */
"if (FPSCR_SZ) {",
" MA (2);",
"}",
},
/* sh2e */
- { "", "", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
+ { "", "0n", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
/* sh4 */
"if (FPSCR_SZ) {",
" MA (2);",
/* sh4 */
{ "", "", "frchg", "1111101111111101",
- "SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
+ "if (FPSCR_PR)",
+ " RAISE_EXCEPTION (SIGILL);",
+ "else",
+ " SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
},
/* sh4 */
"/* FIXME: user mode */",
},
#endif
- { "", "n", "ldc.l @<REG_N>+,<CREG_M>", "0100nnnnmmmm0111",
+ { "n", "n", "ldc.l @<REG_N>+,<CREG_M>", "0100nnnnmmmm0111",
"MA (1);",
"CREG (m) = RLAT (R[n]);",
"R[n] += 4;",
"/* FIXME: user mode */",
},
- { "", "n", "ldc.l @<REG_N>+,SR", "0100nnnn00000111",
+ { "n", "n", "ldc.l @<REG_N>+,SR", "0100nnnn00000111",
"MA (1);",
"SET_SR (RLAT (R[n]));",
"R[n] += 4;",
"/* FIXME: user mode */",
},
- { "", "n", "ldc.l @<REG_N>+,MOD", "0100nnnn01010111",
+ { "n", "n", "ldc.l @<REG_N>+,MOD", "0100nnnn01010111",
"MA (1);",
"SET_MOD (RLAT (R[n]));",
"R[n] += 4;",
},
#if 0
- { "", "n", "ldc.l @<REG_N>+,DBR", "0100nnnn11110110",
+ { "n", "n", "ldc.l @<REG_N>+,DBR", "0100nnnn11110110",
"MA (1);",
"DBR = RLAT (R[n]);",
"R[n] += 4;",
{ "", "n", "lds <REG_N>,<SREG_M>", "0100nnnnssss1010",
"SREG (m) = R[n];",
},
- { "", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
+ { "n", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
"MA (1);",
"SREG (m) = RLAT(R[n]);",
"R[n] += 4;",
"SET_FPSCR(R[n]);",
},
/* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
- { "", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
+ { "n", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
"MA (1);",
"SET_FPSCR (RLAT(R[n]));",
"R[n] += 4;",
},
{ "", "", "ldtlb", "0000000000111000",
- "/* FIXME: XXX*/ abort();",
+ "/* We don't implement cache or tlb, so this is a noop. */",
},
- { "", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
+ { "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
"trap (255, R0, PC, memory, maskl, maskw, endianw);",
"/* FIXME: mac.l support */",
},
- { "", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
+ { "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
"macw(R0,memory,n,m,endianw);",
},
"R[n] = RSBAT (R0 + R[m]);",
"L (n);",
},
- { "n", "m", "mov.b @<REG_M>+,<REG_N>", "0110nnnnmmmm0100",
+ { "nm", "m", "mov.b @<REG_M>+,<REG_N>", "0110nnnnmmmm0100",
"MA (1);",
"R[n] = RSBAT (R[m]);",
"R[m] += 1;",
"MA (1);",
"WBAT (R[n] + R0, R[m]);",
},
- { "", "nm", "mov.b <REG_M>,@-<REG_N>", "0010nnnnmmmm0100",
+ { "n", "nm", "mov.b <REG_M>,@-<REG_N>", "0010nnnnmmmm0100",
"MA (1);",
"R[n] -= 1;",
"WBAT (R[n], R[m]);",
"MA (1);",
"WLAT (R0 + R[n], R[m]);",
},
- { "", "nm", "mov.l <REG_M>,@-<REG_N>", "0010nnnnmmmm0110",
+ { "n", "nm", "mov.l <REG_M>,@-<REG_N>", "0010nnnnmmmm0110",
"MA (1) ;",
"R[n] -= 4;",
"WLAT (R[n], R[m]);",
"R[n] = ~R[m];",
},
- { "0", "", "ocbi @<REG_N>", "0000nnnn10010011",
- "/* FIXME: Not implemented */",
- "RAISE_EXCEPTION (SIGILL);",
+ { "", "n", "ocbi @<REG_N>", "0000nnnn10010011",
+ "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
+ "/* FIXME: Cache not implemented */",
},
- { "0", "", "ocbp @<REG_N>", "0000nnnn10100011",
- "/* FIXME: Not implemented */",
- "RAISE_EXCEPTION (SIGILL);",
+ { "", "n", "ocbp @<REG_N>", "0000nnnn10100011",
+ "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
+ "/* FIXME: Cache not implemented */",
},
{ "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
- "RSBAT (R[n]); /* Take exceptions like byte load. */",
+ "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
"/* FIXME: Cache not implemented */",
},
{ "", "n", "setrc <REG_N>", "0100nnnn00010100",
"SET_RC (R[n]);",
},
- { "", "n", "setrc #<imm>", "10000010i8*1....",
+ { "", "", "setrc #<imm>", "10000010i8*1....",
/* It would be more realistic to let loop_start point to some static
memory that contains an illegal opcode and then give a bus error when
the loop is eventually encountered, but it seems not only simpler,
"R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
"iword &= 0xfd53; goto top;",
},
- { "n", "n8","movx.w @<REG_x>+REG_8,<DSP_XX>", "111100xxXX001000",
+ { "n", "n8","movx.w @<REG_x>+REG_8,<DSP_XX>", "111100xxXX001100",
"DSP_R (m) = RSWAT (R[n]) << 16;",
"R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
"iword &= 0xfd53; goto top;",
"DSP_R (m) = RSWAT (R[n]) << 16;",
"R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
},
- { "n", "n9","movy.w @<REG_y>+REG_9,<DSP_YY>", "111100yyYY000010",
+ { "n", "n9","movy.w @<REG_y>+REG_9,<DSP_YY>", "111100yyYY000011",
"DSP_R (m) = RSWAT (R[n]) << 16;",
"R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
},
"WWAT (R[n], DSP_R (m) >> 16);",
"R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
},
- { "n", "n9", "movy.w <DSP_Aa>,@<REG_y>+REG_9", "111100yyAA010010",
+ { "n", "n9", "movy.w <DSP_Aa>,@<REG_y>+REG_9", "111100yyAA010011",
"WWAT (R[n], DSP_R (m) >> 16);",
"R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
},
"greater_equal = 0;",
},
{ "","", "pmuls Se,Sf,Dg", "0100eeffxxyygguu",
- "res = (DSP_R (e)) >> 16 * (DSP_R (f) >> 16) * 2;",
+ "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
"if (res == 0x80000000)",
" res = 0x7fffffff;",
"DSP_R (g) = res;",
"int Sy = DSP_R (y);",
"int Sy_grd = SIGN32 (Sy);",
"",
- "res = (DSP_R (e)) >> 16 * (DSP_R (f) >> 16) * 2;",
+ "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
"if (res == 0x80000000)",
" res = 0x7fffffff;",
"DSP_R (g) = res;",
"int Sy = DSP_R (y);",
"int Sy_grd = SIGN32 (Sy);",
"",
- "res = (DSP_R (e)) >> 16 * (DSP_R (f) >> 16) * 2;",
+ "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
"if (res == 0x80000000)",
" res = 0x7fffffff;",
"DSP_R (g) = res;",
"int Sx = DSP_R (x);",
"int Sx_grd = GET_DSP_GRD (x);",
"",
- "res = Sx + 0x8000;",
+ "res = (Sx + 0x8000) & 0xffff0000;",
"carry = (unsigned) res < (unsigned) Sx;",
"res_grd = Sx_grd + carry;",
"COMPUTE_OVERFLOW;",
"int Sy = DSP_R (y);",
"int Sy_grd = SIGN32 (Sy);",
"",
- "res = Sy + 0x8000;",
+ "res = (Sy + 0x8000) & 0xffff0000;",
"carry = (unsigned) res < (unsigned) Sy;",
"res_grd = Sy_grd + carry;",
"COMPUTE_OVERFLOW;",
{
switch (*s)
{
+ default:
+ fprintf (stderr, "gencode/gensim_caselist: illegal char '%c'\n",
+ *s);
+ exit (1);
+ break;
case '0':
case '1':
s += 2;
{
switch (s[0])
{
+ default:
+ fprintf (stderr, "gencode/expand_ppi_code: Illegal char '%c'\n",
+ s[0]);
+ exit (2);
+ break;
/* The last eight bits are disregarded for the switch table. */
case 'm':
case 'x':
break;
case 'c':
printf (" if ((((iword >> 8) ^ DSR) & 1) == 0)\n");
- printf ("\tbreak;\n");
+ printf ("\treturn;\n");
printf (" }\n");
printf (" case %d: \n", p->index + 1);
printf (" {\n");
projects / deliverable / binutils-gdb.git / blobdiff