-Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
+2019-12-19 Tom Tromey <tromey@adacore.com>
- * Makefile.in (RUNTEST): Fix path to runtest.
+ PR build/24572:
+ * Makefile.in (install-strip): New target.
+
+2019-09-23 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * configure: Regenerate.
+
+2017-12-12 Stafford Horne <shorne@gmail.com>
+ Peter Gavin <pgavin@gmail.com>
+
+ * configure: Regenerated.
+
+2016-01-10 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2016-01-02 Mike Frysinger <vapier@gentoo.org>
+
+ * common/bits-gen.c (main): Change BIG_ENDIAN to BFD_ENDIAN_BIG and
+ LITTLE_ENDIAN and BFD_ENDIAN_LITTLE.
+
+2015-11-24 Nick Clifton <nickc@redhat.com>
+
+ * configure: Regenerate.
+ * sim/aarch64: New directory.
+
+2015-11-14 Mike Frysinger <vapier@gentoo.org>
+
+ * lib/sim-defs.exp (slurp_options): Pull in global subdir/srcdir.
+ Replace $srcdir and $subdir in the read option.
+
+2015-04-13 Hans-Peter Nilsson <hp@axis.com>
-start-sanitize-sky
-Tue Feb 24 19:47:56 1998 Frank Ch. Eigler <fche@cygnus.com>
+ * lib/sim-defs.exp (sim_init): Unset target ldscript here.
+
+2015-03-30 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Add d10v-*-elf.
+ * configure: Regenerate.
+
+2015-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * lib/sim-defs.exp (run_sim_test): Declare seen_output as 0. When
+ the test has an output keyword, set it to 1. Set default output only
+ when seen_output is 0.
+
+2015-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2015-03-28 Mike Frysinger <vapier@gentoo.org>
- * configure.in (testdir): Added sky subdir for mips64r5900-sky-elf
- target.
* configure: Regenerate.
-end-sanitize-sky
-
-Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
-
- * sim/m32r/unlock.cgs: Fixed test.
- * sim/m32r/mvfc.cgs: Fixed test.
- * sim/m32r/remu.cgs: Fixed test.
-
- * sim/m32r/bnc24.cgs: Test long BNC instruction.
- * sim/m32r/bnc8.cgs: Test short BNC instruction.
- * sim/m32r/ld-plus.cgs: Test LD instruction.
- * sim/m32r/macwhi.cgs: Test MACWHI instruction.
- * sim/m32r/macwlo.cgs: Test MACWLO instruction.
- * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
- * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
- * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
- * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
- * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
- * sim/m32r/addv.cgs: Test ADDV instruction.
- * sim/m32r/addv3.cgs: Test ADDV3 instruction.
- * sim/m32r/addx.cgs: Test ADDX instruction.
- * sim/m32r/lock.cgs: Test LOCK instruction.
- * sim/m32r/neg.cgs: Test NEG instruction.
- * sim/m32r/not.cgs: Test NOT instruction.
- * sim/m32r/unlock.cgs: Test UNLOCK instruction.
-start-sanitize-m32rx
- * sim/m32r/mvfachi-a.cgs: Test extended MVFACHI instruction.
- * sim/m32r/mvfaclo-a.cgs: Test extended MVFACLO.cgs instruction.
- * sim/m32r/mvtachi-a.cgs: Test extended MVTACHI instruction.
- * sim/m32r/mvtaclo-a.cgs: Test extended MVTACLO instruction.
-end-sanitize-m32rx
-Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
-
- * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
- address into a general register.
-
- * sim/m32r/or3.cgs: Test OR3 instruction.
- * sim/m32r/rach.cgs: Test RACH instruction.
- * sim/m32r/rem.cgs: Test REM instruction.
- * sim/m32r/sub.cgs: Test SUB instruction.
- * sim/m32r/mv.cgs: Test MV instruction.
- * sim/m32r/mul.cgs: Test MUL instruction.
- * sim/m32r/bl24.cgs: Test long BL instruction.
- * sim/m32r/bl8.cgs: Test short BL instruction.
- * sim/m32r/blez.cgs: Test BLEZ instruction.
- * sim/m32r/bltz.cgs: Test BLTZ instruction.
- * sim/m32r/bne.cgs: Test BNE instruction.
- * sim/m32r/bnez.cgs: Test BNEZ instruction.
- * sim/m32r/bra24.cgs: Test long BRA instruction.
- * sim/m32r/bra8.cgs: Test short BRA instruction.
- * sim/m32r/jl.cgs: Test JL instruction.
- * sim/m32r/or.cgs: Test OR instruction.
- * sim/m32r/jmp.cgs: Test JMP instruction.
- * sim/m32r/and.cgs: Test AND instruction.
- * sim/m32r/and3.cgs: Test AND3 instruction.
- * sim/m32r/beq.cgs: Test BEQ instruction.
- * sim/m32r/beqz.cgs: Test BEQZ instruction.
- * sim/m32r/bgez.cgs: Test BGEZ instruction.
- * sim/m32r/bgtz.cgs: Test BGTZ instruction.
- * sim/m32r/cmp.cgs: Test CMP instruction.
- * sim/m32r/cmpi.cgs: Test CMPI instruction.
- * sim/m32r/cmpu.cgs: Test CMPU instruction.
- * sim/m32r/cmpui.cgs: Test CMPUI instruction.
- * sim/m32r/div.cgs: Test DIV instruction.
- * sim/m32r/divu.cgs: Test DIVU instruction.
- * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
- * sim/m32r/sll.cgs: Test SLL instruction.
- * sim/m32r/sll3.cgs: Test SLL3 instruction.
- * sim/m32r/slli.cgs: Test SLLI instruction.
- * sim/m32r/sra.cgs: Test SRA instruction.
- * sim/m32r/sra3.cgs: Test SRA3 instruction.
- * sim/m32r/srai.cgs: Test SRAI instruction.
- * sim/m32r/srl.cgs: Test SRL instruction.
- * sim/m32r/srl3.cgs: Test SRL3 instruction.
- * sim/m32r/srli.cgs: Test SRLI instruction.
- * sim/m32r/xor3.cgs: Test XOR3 instruction.
- * sim/m32r/xor.cgs: Test XOR instruction.
-start-sanitize-m342rx
- * sim/m32r/jnc.cgs: Test JNC instruction.
- * sim/m32r/jc.cgs: Test JC instruction.
- * sim/m32r/cmpz.cgs: Test CMPZ instruction.
- * sim/m32r/bcl24.cgs: Test long version of BCL instruction
- * sim/m32r/bcl8.cgs: Test short BCL instruction.
- * sim/m32r/bncl24.cgs: Test long BNCL instruction.
- * sim/m32r/bncl8.cgs: Test short BNCL instruction.
- * sim/m32r/divh.cgs: Test DIVH instruction.
- * sim/m32r/rach-dsi.cgs: Test extended RACH instruction.
-end-sanitize-m342rx
+
+2015-03-28 James Bowman <james.bowman@ftdichip.com>
+
+ * configure: Regenerate.
+
+2014-03-10 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2014-03-04 Mike Frysinger <vapier@gentoo.org>
+
+ * common/bits-gen.c (main): Change to new style prototype.
+
+2013-09-23 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2012-06-15 Joel Brobecker <brobecker@adacore.com>
+
+ * configure: Regenerate.
+
+2012-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2012-03-18 Mike Frysinger <vapier@gentoo.org>
+
+ * .gitignore: New file.
+
+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate after bfin testsuite update.
+
+2011-05-16 Mike Frysinger <vapier@gentoo.org>
+
+ * lib/sim-defs.exp: Support cc tag in test files.
+ (run_sim_test): Support global_cc_options in boards files. Convert
+ assembler options into compiler options (c_as_options) with -Wa.
+ Convert linker options into compiler options (c_ld_options) with -Wl.
+ Compile .c and .S files into .x programs.
+
+2011-05-04 Joseph Myers <joseph@codesourcery.com>
+
+ * configure: Regenerate.
+
+2010-04-26 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (arch): Set to @sim_arch@.
+ * configure.ac: Delete arch logic and include ../configure.tgt.
+ * configure: Regenerated.
+ * lib/sim-defs.exp (sim_run): Default sim to ../arch/run.
+
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2009-01-18 Hans-Peter Nilsson <hp@axis.com>
+
+ * lib/sim-defs.exp (run_sim_test): New option progopts.
+
+2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2005-01-07 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+ * configure.in: Pass literal subdirectories to AC_CONFIG_SUBDIRS.
+ * configure: Re-generate.
+
+ * fr30-elf, d30v-elf: Delete directory.
+
+2004-11-16 Hans-Peter Nilsson <hp@axis.com>
+
+ * lib/sim-defs.exp (run_sim_test): Make multiple "output"
+ specifications concatenate, not override.
+ Support "xfail" and "kfail".
+
+2004-10-26 Nick Clifton <nickc@redhat.com>
+
+ * lib/sim-defs.exp (sim_run): Add support for the "rawsid"
+ protocol.
+
+2004-09-13 DJ Delorie <dj@redhat.com>
+
+ * lib/sim-defs.exp (run_sim_test): Add global_as_options,
+ global_ld_options, and global_sim_options to all test cases, if
+ defined.
+
+2004-05-12 Ben Elliston <bje@au.ibm.com>
+
+ * lib/sim-defs.exp: Remove stray semicolons.
+
+2004-01-26 Chris Demetriou <cgd@broadcom.com>
+
+ * sim/mips: New directory. Tests for the MIPS simulator.
+
+2004-01-23 Ben Elliston <bje@wasabisystems.com>
+
+ * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a
+ test passes.
+
+2003-08-20 Michael Snyder <msnyder@redhat.com>
+ On behalf of Dave Brolley
+
+ * sim/frv: New testsuite.
+ * frv-elf: New testsuite.
+
+2003-07-09 Michael Snyder <msnyder@redhat.com>
+
+ * sim/sh: New directory. Tests for Renesas sh family.
+
+2003-04-13 Michael Snyder <msnyder@redhat.com>
+
+ * sim/h8300: New directory. Tests for Renesas h8/300 family.
+
+2002-06-16 Andrew Cagney <ac131313@redhat.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2001-07-31 Ben Elliston <bje@redhat.com>
+
+ * lib/sim-defs.exp (run_sim_test): Include a description such as
+ "assembling" or "linking" that identifies the phase a test fails
+ in, for easier analysis of failures.
+
+2000-11-01 Dave Brolley <brolley@cygnus.com>
+
+ * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
+ "xerror" options do not use a list of machines. Clear options from
+ previous test case. Use "$cpu_option" to identify the machine to the
+ assembler, if specified.
+
+Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+1999-09-15 Doug Evans <devans@casey.cygnus.com>
+
+ * sim/arm/b.cgs: New testcase.
+ * sim/arm/bic.cgs: New testcase.
+ * sim/arm/bl.cgs: New testcase.
+
+Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+1999-08-30 Doug Evans <devans@casey.cygnus.com>
+
+ * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
+ requested_machs, now is list of machs to run tests for.
+ Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
+ and target_link instead.
+
+Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
+
+ * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
+
+1999-01-05 Doug Evans <devans@casey.cygnus.com>
+
+ * lib/sim-defs.exp (run_sim_test): New arg all_machs.
+
+1998-12-14 Doug Evans <devans@casey.cygnus.com>
+
+ * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
+ errors. Translate \n sequences in expected output to newline char.
+ (slurp_options): Make parentheses optional.
+ (sim_run): Look for board_info sim,options.
+
+Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
+ recent sim/common/sim-basics.h changes.
+ * common/Makefile.in: Update.
+
+Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
+
+ * lib/sim-defs.exp (sim_run): download target program to remote
+ host, if necessary. for unix-driven win32 testing.
+
+Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
+
+ * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
+ writeonly.
+
+Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
+
+Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
+
+ * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
+
+Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
+ which is now a list of options controlling the behaviour of sim_run.
+
+Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * lib/sim-defs.exp (sim_run): Add possible environment variable
+ list to simulator run.
+
+Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
+
+ * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
+ so that make check can be invoked recursively.
+
+Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * config/default.exp (CC,SIM): Delete.
+
+ * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
+ New arg prog_opts. All callers updated.
+
+Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
+
+ * Makefile.in: Made "check" the target of two
+ dependencies (test1, test2) so that test2 get a chance to
+ run even when test1 failed if "make -k check" is used.
+
+Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * lib/sim-defs.exp (sim_version): Simplify.
+ (sim_run): Implement.
+ (run_sim_test): Use sim_run.
+ (sim_compile): New proc.
+
+Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
+
+ * config/default.exp: Added C compiler settings.
+
+Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
+
+Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
+ try all machs.
+
+Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * Makefile.in (RUNTEST): Fix path to runtest.
+
Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
* config/default.exp: New file.
* lib/sim-defs.exp: New file.
- * sim/m32r/*: m32r dejagnu simulator testsuite.
* Makefile.in (build_alias): Define.
(arch): Define.
(RUNTEST_FOR_TARGET): Delete.
(RUNTEST): Fix.
- (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
(check): Depend on site.exp. Run dejagnu.
(site.exp): New target.
- (cgen): New target.
- * configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen.
- (arch): Define from target_cpu.
+ * configure.in (arch): Define from target_cpu.
* configure: Regenerate.
Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (configdirs): Test for the target directory instead
of matching on a target.
-start-sanitize-r5900
-Tue Jul 15 13:43:20 1997 Andrew Cagney <cagney@sendai.cygnus.com>
-
- * configure.in (configdirs): Configure mips64vr5900el
- directory.
- * configure: Regenerate.
-
-end-sanitize-r5900
projects / deliverable / binutils-gdb.git / blobdiff