+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Change include to common/acinclude.m4.
+
+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
+ call. Replace common.m4 include with SIM_AC_COMMON.
+ * configure: Regenerate.
+
+2011-07-05 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_do_command): Delete.
+
+2011-03-21 Kevin Buettner <kevinb@redhat.com>
+
+ * simops (OP_10007E0): Update errno handling as most traps
+ do not invoke the host's functionality directly. Invoke
+ sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
+ Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
+
+2011-02-14 Mike Frysinger <vapier@gentoo.org>
+
+ * simops.c (OP_10007E0): Change zfree to free.
+
+2011-01-11 Andrew Burgess <aburgess@broadcom.com>
+
+ * interp.c (sim_store_register): Update return value to
+ match new API.
+
+2010-03-30 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (interrupt_names): Add const to pointer type.
+ (do_interrupt): Add const to interrupt_name.
+
+2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+
+ * configure: Regenerate.
+
+2008-07-11 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate to track ../common/common.m4 changes.
+ * config.in: Ditto.
+
+2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * configure: Regenerate.
+
+2008-02-05 DJ Delorie <dj@redhat.com>
+
+ * simops.c (OP_1C007E0): Compensate for 64 bit hosts.
+ (OP_18007E0): Likewise.
+ (OP_2C007E0): Likewise.
+ (OP_28007E0): Likewise.
+ * v850.igen (divh): Likewise.
+
+ * simops.c (OP_C0): Correct saturation logic.
+ (OP_220): Likewise.
+ (OP_A0): Likewise.
+ (OP_660): Likewise.
+ (OP_80): Likewise.
+
+ * simops.c (OP_2A0): If the shift count is zero, clear the
+ carry.
+ (OP_A007E0): Likewise.
+ (OP_2C0): Likewise.
+ (OP_C007E0): Likewise.
+ (OP_280): Likewise.
+ (OP_8007E0): Likewise.
+
+ * simops.c (OP_2C207E0): Correct PSW flags for special divu
+ conditions.
+ (OP_2C007E0): Likewise, for div.
+ (OP_28207E0): Likewise, for divhu.
+ (OP_28007E0): Likewise, for divh. Also, sign-extend the correct
+ operand.
+ * v850.igen (divh): Likewise, for 2-op divh.
+
+ * v850.igen (bsh): Fix carry logic.
+
+2007-02-20 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * Makefile.in (interp.o): Uncomment and update.
+
+2006-12-21 Hans-Peter Nilsson <hp@axis.com>
+
+ * acconfig.h: Remove.
+ * config.in: Regenerate.
+
+2006-06-13 Richard Earnshaw <rearnsha@arm.com>
+
+ * configure: Regenerated.
+
+2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2005-03-23 Mark Kettenis <kettenis@gnu.org>
+
+ * configure: Regenerate.
+
+2005-01-14 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Sinclude aclocal.m4 before common.m4. Add
+ explicit call to AC_CONFIG_HEADER.
+ * configure: Regenerate.
+
+2005-01-12 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Update to use ../common/common.m4.
+ * configure: Re-generate.
+
+2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2005-01-07 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+2004-12-08 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate for ../common/aclocal.m4 update.
+
+2004-01-18 Mark Kettenis <kettenis@gnu.org>
+
+ * simops.c: Include <sys/types.h>.
+
+2003-09-05 Andrew Cagney <cagney@redhat.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * interp.c (sim_open): Accept bfd_mach_v850e1.
+ * v850-dc: Add entry for v850e1.
+ * v850.igen: Add support for v850e1.
+ Add code for DBTRAP and DBRET instructions.
+ (dbtrap): Create a separate v850e1 specific instruction.
+ Only generate a trap if the target is not the v850e1.
+ Otherwise treat it as a special kind of branch.
+ (break): Mark as v850/v850e specific.
+
+2003-05-16 Ian Lance Taylor <ian@airs.com>
+
+ * Makefile.in (SHELL): Make sure this is defined.
+ (tmp-igen): Use $(SHELL) whenever we invoke move-if-change.
+
+2003-04-06 Nick Clifton <nickc@redhat.com>
+
+ * simops.c (OP_40): Delete. Move code to...
+ * v850-igen.c (): ...Here. Sign extend the first operand.
+ * simops.h (OP_40): Remove prototype.
+
+2003-02-27 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
+
+2002-11-30 Andrew Cagney <cagney@redhat.com>
+
+ * simops.c: Use int, 1, 0 instead of boolean, true and false.
+ * sim-main.h: Ditto.
+
+2002-09-27 Jim Wilson <wilson@redhat.com>
+
+ * simops.c (OP_E6077E0): And op1 with 7 after reading register, not
+ before.
+ (BIT_CHANGE_OP): Likewise.
+
+2002-09-26 Jim Wilson <wilson@redhat.com>
+
+ * simops (OP_10007E0): Don't subtract 4 from PC.
+
+2002-09-19 Nick Clifton <nickc@redhat.com>
+
+ * interp.c (sim_open): Remove reference to v850ea.
+ (sim_create_inferior): Likewise.
+ * v850-dc: Likewise.
+ * v850.igen: Remove all references to v850ea, including v850ea
+ specific instructions.
+
+2002-08-29 Nick Clifton <nickc@redhat.com>
+
+ From 2001-08-23 Catherine Moore <clm@redhat.com>
+
+ * Makefile.in: Add gen-zero-r0 option.
+ * sim-main.h (GPR_SET, GPR_CLEAR): Define.
+ * simops.c (OP_24007E0): Sign extend the imm9
+ operand of a mul instruction.
+
+2002-06-17 Andrew Cagney <cagney@redhat.com>
+
+ * simops.c (trace_result): Fix printf formatting.
+
+2002-06-16 Andrew Cagney <ac131313@redhat.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2001-12-02 Andrew Cagney <ac131313@redhat.com>
+
+ * Makefile.in (simops.h, table.c): Delete targets.
+ (tmp-gencode, gencode.o, gencode): Delete targets.
+ (simops.h): New file.
+ ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
+ * gencode.c: Delete file.
+
+2001-04-15 J.T. Conklin <jtc@redback.com>
+
+ * Makefile.in (simops.o): Add simops.h to dependency list.
+
+2001-03-14 Andrew Cagney <ac131313@redhat.com>
+
+ * Makefile.in (gencode): Link with libintl.
+
+2001-01-31 Jonathan Larmour <jlarmour@redhat.com>
+
+ * Makefile.in (gencode): Link with libopcodes in build tree rather
+ than building source files from there.
+
+2000-05-30 Nick Clifton <nickc@cygnus.com>
+
+ * v850.igen: Remove illegal instruction pattern, since it is the
+ same as the breakpoint pattern.
+
+Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2000-04-14 Gary Thomas <gthomas@redhat.com>
+
+ * v850.igen: Define 'br *' as illegal since this is the only
+ way to provide a breakpoint on some v850 family processors.
+
+2000-03-24 Frank Ch. Eigler <fche@redhat.com>
+
+ * v850.igen (ilgop): New insn pattern for four-byte breakpoints.
+
+Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+1999-05-08 Felix Lee <flee@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850.
+
+Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Makefile.in (simops.o): Depends on targ-vals.h
+ * simops.c: Include targ-vals.h instead of
+ libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*.
+ (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0):
+ Replace signed long int with signed32.
+
+Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * interp.c: #include "itable.h".
+ (get_insn_name): New function.
+ (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
+ * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
+
+Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * sim-main.h (INSN_NAME): New arg `cpu'.
+
+Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com>
+
+ * acconfig.h: New file.
+ * configure.in: Reverted change of Apr 24; use sinclude again.
+
+Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com>
+
+ * configure.in: Don't call sinclude.
+
+Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * sim-main.h (SIM_MAIN_H): Wrap header.
+
+Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_stop): Delete, second attempt.
+
+Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_info): Delete.
+
+Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc].
+
+ * simops.c (trace_result): Call trace_generic instead of
+ trace_one_insn.
+ (trace_module): Change variable type to integer.
+ (trace_input): Initialize trace_module with TRACE_ALU_IDX.
+
+ * sim-main.h (trace_module): Change variable decl to integer type.
+ (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update.
+
+Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_store_register, sim_fetch_register): Pass in
+ length parameter. Return -1.
+
+Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and
+ IMEM_IMMED. To match recent igen change.
+
+Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-main.h (CPU_CIA): Delete, replaced by.
+ (CIA_SET, CIA_SET): Define.
+
+Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.igen: Revert break value back to its old value.
+
+Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com>
+
+ * v850.igen: Make break have a zero first field, since otherwise
+ it clashes with the DIVH instruction.
+
+Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give
+ sim_stopped instead of sim_signalled.
+
+ * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to
+ SIM_SIGTRAP.
+ (illegal): Rename SIGILL to SIM_SIGILL.
+
+ * sim-main.h, simops.c, interp.c: Do not include signal.h.
+
+ * sim-main.h: Include sim-signal.h instead of signal.h.
+ (SIGTRAP, SIGQUIT): Delete definition.
+ (SIG_V850_EXIT): Delete definition.
+
+Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
+
+Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_open): Check state magic number.
+ (sim-assert.h): Include.
+
+Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * v850.igen: Add model filter field to records.
+
+Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com>
+
+ * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
+ SIM_ENGINE_RESTART_HOOK.
+
+Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-main.h (WITH_TARGET_WORD_MSB): Delete.
+
+ * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit
+ architecture with MSB == 31.
+
+Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * v850.igen: Make divh insn with RRRRR==0 breakpoint.
+
+Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
+ SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
+ (SIM_EXTRA_CFLAGS): Update.
+
+Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * configure.in: Really specify NONSTRICT_ALIGNMENT as the default.
+
+Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure.in: Specify NONSTRICT_ALIGNMENT as the default.
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * v850.igen (disp16): Use EXTEND16 to sign extend disp.
+ (disp22): Only shift left by 1, not 2.
+ ("jmp"): Ensure PC is 2 byte aligned.
+
+ * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to
+ v850.igen. Fix tracing.
+
+ * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h",
+ "sld.w" insns to v850.igen. Fix tracing.
+ (OP_70): Ditto for "sld.hu".
+
+ * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al.
+
+ * simops.c (condition_met): Make global.
+
+ * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD,
+ TRACE_ST): Define.
+ (TRACE_LD_NAME): Define.
+
+ * simops.c: Move "cmov", "cmov imm" to v850.igen, fix.
+
+Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c: Move "mov", "reti", to v850.igen, fix tracing.
+
+ * interp.c (hash): Delete.
+
+ * v850.igen (nop): Really do nothing.
+
+ * interp.c (do_interrupt): Mask interrupts after PSW is saved, not
+ before.
+ * v850.igen (reti): Return to current PC not previous.
+
+Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing.
+ (trace_module): Global, save component/module name across insn.
+
+ * simops.c: Move "bsh" to v850.igen, fix.
+
+ * v850.igen (callt): Load correct number of bytes. Fix tracing.
+ (stsr, ldsr): Correct src, dest fields. Fix tracing.
+ (ctret): Force alignment. Fix tracing.
+
+Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (trace_output): Add result argument.
+ (trace_result): New function. Simpler version of trace_output,
+ assumes trace needed.
+ (trace_output): Call trace_result.
+ (trace_output): For IMM_REG_REG, trace correct register.
+ (trace_input): Add case for 16bit immediates.
+ (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use.
+
+ * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define.
+ (trace_values, trace_name, trace_pc, trace_num_values): Make
+ global.
+ (GR, SR): Define.
+
+ v850.insn (movea, stsr): Use.
+ (sxb, sxh, zxb, zxh): Ditto.
+
+Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c: Move "movea" from here.
+ * v850.igen: To here.
+
+ * v850.igen (simm16): Define, sign extend imm16.
+ (uimm16): Define, no sign extension.
+ (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
+
+ * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
+ "mov32" from here.
+ * v850.igen: To here.
+ (switch): Fix off by two error in NIA calc.
+
Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (trace_pc, trace_name, trace_values, trace_num_values):
Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-start-sanitize-v850e
* v850-dc: Add rule to diferentiate between breakpoint and divh.
* v850.igen (break): New instruction, breakpoint simulator.
-
-end-sanitize-v850e
* v850.igen (breakpoint): Enable. Change to a 32bit instruction.
-start-sanitize-v850e
Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com>
* simops.c (Multiply64): Don't store into register zero.
-start-sanitize-v850e
Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (semantics.o): Add dependency.
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-start-sanitize-v850eq
* simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
* simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
* interp.c (sim_create_inferior): For v850eq set US bit by
default.
-end-sanitize-v850eq
-start-sanitize-v850e
* interp.c (sim_open): Don't set arch, now set by
sim_analyze_program.
-end-sanitize-v850e
* configure: Regenerated to track ../common/aclocal.m4 changes.
Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_60): Move "jmp" code from here.
* v850.igen (jmp): To here.
-start-sanitize-v850eq
* simops.c (OP_60): Move "sld.bu" code from here.
* v850.igen (sld.bu): To here.
-end-sanitize-v850eq
Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-start-sanitize-v850eq
* v850.igen (prepare, ...): Add to v850eq architecture.
-end-sanitize-v850eq
-start-sanitize-v850e
* interp.c (sim_open): Default to v850eq.
-end-sanitize-v850e
-start-sanitize-v850eq
-
* interp.c (sim_open): Default to v850e.
-end-sanitize-v850eq
* sim-main.h (signal.h): Include.
* v850.igen (illegal): Report/halt illegal instructions.
* interp.c (sim_open): Add ABFD argument.
-start-sanitize-v850e
Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (bsh): Only set CY flag if either of the bottom
* simops.c (unsigned divide instructions): S bit set if result has
top bit set.
-start-sanitize-v850eq
* simops.c (pushml, pushmh, popml, popmh): Lower numbered
registers go to higher numbered address.
-end-sanitize-v850eq
-end-sanitize-v850e
Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
interpretation of SR bit in list18 structure.
-start-sanitize-v850eq
(divn, divun): New functions to perform N step divide functions.
-end-sanitize-v850eq
-start-sanitize-v850eq
Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
with US bit set in the PSW.
-start-sanitize-v850eq
Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
* simops.c: Opcode functions return amount to be added to PC.
-start-sanitize-v850e
* v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
* simops.c: Add support for v850e instructions.
- * .Sanitize (Do-first, Do-last): Add support for keep-v850e
- command line option.
-
-end-sanitize-v850e
-
-start-sanitize-v850eq
- * .Sanitize (Do-first, Do-last): Add support for keep-v850eq
- command line option.
-
* simops.c: Add support for v850eq instructions.
-end-sanitize-v850eq
Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>