X-Git-Url: http://drtracing.org/?a=blobdiff_plain;ds=sidebyside;f=gdb%2Farmnbsd-nat.c;h=c8b549e47f9b95b1e5c0399ae1ed4ddc4ca26faa;hb=5fe966540d6b748f825774868463003700f0c878;hp=0e0407ce1f4dbcde1c0a27240ab17cae29a47e0b;hpb=3e56fc4b479c7ec6ceae3ec904d0c833565abbd4;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/armnbsd-nat.c b/gdb/armnbsd-nat.c index 0e0407ce1f..c8b549e47f 100644 --- a/gdb/armnbsd-nat.c +++ b/gdb/armnbsd-nat.c @@ -1,12 +1,12 @@ /* Native-dependent code for BSD Unix running on ARM's, for GDB. - Copyright 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002 - Free Software Foundation, Inc. + + Copyright (C) 1988-2016 Free Software Foundation, Inc. This file is part of GDB. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or + the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, @@ -15,318 +15,362 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ + along with this program. If not, see . */ #include "defs.h" - -#ifndef FETCH_INFERIOR_REGISTERS -#error Not FETCH_INFERIOR_REGISTERS -#endif /* !FETCH_INFERIOR_REGISTERS */ - -#include "arm-tdep.h" - +#include "gdbcore.h" +#include "inferior.h" +#include "regcache.h" +#include "target.h" #include #include #include #include -#include "inferior.h" -#include "regcache.h" -#include "gdbcore.h" + +#include "arm-tdep.h" +#include "inf-ptrace.h" extern int arm_apcs_32; static void -fetch_register (int regno) +arm_supply_gregset (struct regcache *regcache, struct reg *gregset) +{ + int regno; + CORE_ADDR r_pc; + + /* Integer registers. */ + for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++) + regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]); + + regcache_raw_supply (regcache, ARM_SP_REGNUM, + (char *) &gregset->r_sp); + regcache_raw_supply (regcache, ARM_LR_REGNUM, + (char *) &gregset->r_lr); + /* This is ok: we're running native... */ + r_pc = gdbarch_addr_bits_remove (get_regcache_arch (regcache), gregset->r_pc); + regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc); + + if (arm_apcs_32) + regcache_raw_supply (regcache, ARM_PS_REGNUM, + (char *) &gregset->r_cpsr); + else + regcache_raw_supply (regcache, ARM_PS_REGNUM, + (char *) &gregset->r_pc); +} + +static void +arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset) +{ + int regno; + + for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) + regcache_raw_supply (regcache, regno, + (char *) &fparegset->fpr[regno - ARM_F0_REGNUM]); + + regcache_raw_supply (regcache, ARM_FPS_REGNUM, + (char *) &fparegset->fpr_fpsr); +} + +static void +fetch_register (struct regcache *regcache, int regno) { struct reg inferior_registers; int ret; - ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_registers, 0); + ret = ptrace (PT_GETREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_registers, 0); if (ret < 0) { - warning ("unable to fetch general register"); + warning (_("unable to fetch general register")); return; } switch (regno) { case ARM_SP_REGNUM: - supply_register (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp); + regcache_raw_supply (regcache, ARM_SP_REGNUM, + (char *) &inferior_registers.r_sp); break; case ARM_LR_REGNUM: - supply_register (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr); + regcache_raw_supply (regcache, ARM_LR_REGNUM, + (char *) &inferior_registers.r_lr); break; case ARM_PC_REGNUM: - /* This is ok: we're running native... */ - inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc); - supply_register (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc); + /* This is ok: we're running native... */ + inferior_registers.r_pc = gdbarch_addr_bits_remove + (get_regcache_arch (regcache), + inferior_registers.r_pc); + regcache_raw_supply (regcache, ARM_PC_REGNUM, + (char *) &inferior_registers.r_pc); break; case ARM_PS_REGNUM: if (arm_apcs_32) - supply_register (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr); + regcache_raw_supply (regcache, ARM_PS_REGNUM, + (char *) &inferior_registers.r_cpsr); else - supply_register (ARM_PS_REGNUM, (char *) &inferior_registers.r_pc); + regcache_raw_supply (regcache, ARM_PS_REGNUM, + (char *) &inferior_registers.r_pc); break; default: - supply_register (regno, (char *) &inferior_registers.r[regno]); + regcache_raw_supply (regcache, regno, + (char *) &inferior_registers.r[regno]); break; } } static void -fetch_regs (void) +fetch_regs (struct regcache *regcache) { struct reg inferior_registers; int ret; int regno; - ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_registers, 0); + ret = ptrace (PT_GETREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_registers, 0); if (ret < 0) { - warning ("unable to fetch general registers"); + warning (_("unable to fetch general registers")); return; } - for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++) - supply_register (regno, (char *) &inferior_registers.r[regno]); - - supply_register (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp); - supply_register (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr); - /* This is ok: we're running native... */ - inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc); - supply_register (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc); - - if (arm_apcs_32) - supply_register (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr); - else - supply_register (ARM_PS_REGNUM, (char *) &inferior_registers.r_pc); + arm_supply_gregset (regcache, &inferior_registers); } static void -fetch_fp_register (int regno) +fetch_fp_register (struct regcache *regcache, int regno) { struct fpreg inferior_fp_registers; int ret; - ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0); + ret = ptrace (PT_GETFPREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); if (ret < 0) { - warning ("unable to fetch floating-point register"); + warning (_("unable to fetch floating-point register")); return; } switch (regno) { case ARM_FPS_REGNUM: - supply_register (ARM_FPS_REGNUM, - (char *) &inferior_fp_registers.fpr_fpsr); + regcache_raw_supply (regcache, ARM_FPS_REGNUM, + (char *) &inferior_fp_registers.fpr_fpsr); break; default: - supply_register - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); + regcache_raw_supply (regcache, regno, + (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); break; } } static void -fetch_fp_regs (void) +fetch_fp_regs (struct regcache *regcache) { struct fpreg inferior_fp_registers; int ret; int regno; - ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0); + ret = ptrace (PT_GETFPREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); if (ret < 0) { - warning ("unable to fetch general registers"); + warning (_("unable to fetch general registers")); return; } - for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) - supply_register - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); - - supply_register (ARM_FPS_REGNUM, (char *) &inferior_fp_registers.fpr_fpsr); + arm_supply_fparegset (regcache, &inferior_fp_registers); } -void -fetch_inferior_registers (int regno) +static void +armnbsd_fetch_registers (struct target_ops *ops, + struct regcache *regcache, int regno) { if (regno >= 0) { if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM) - fetch_register (regno); + fetch_register (regcache, regno); else - fetch_fp_register (regno); + fetch_fp_register (regcache, regno); } else { - fetch_regs (); - fetch_fp_regs (); + fetch_regs (regcache); + fetch_fp_regs (regcache); } } static void -store_register (int regno) +store_register (const struct regcache *regcache, int regno) { + struct gdbarch *gdbarch = get_regcache_arch (regcache); struct reg inferior_registers; int ret; - ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_registers, 0); + ret = ptrace (PT_GETREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_registers, 0); if (ret < 0) { - warning ("unable to fetch general registers"); + warning (_("unable to fetch general registers")); return; } switch (regno) { case ARM_SP_REGNUM: - regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp); + regcache_raw_collect (regcache, ARM_SP_REGNUM, + (char *) &inferior_registers.r_sp); break; case ARM_LR_REGNUM: - regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr); + regcache_raw_collect (regcache, ARM_LR_REGNUM, + (char *) &inferior_registers.r_lr); break; case ARM_PC_REGNUM: if (arm_apcs_32) - regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc); + regcache_raw_collect (regcache, ARM_PC_REGNUM, + (char *) &inferior_registers.r_pc); else { unsigned pc_val; - regcache_collect (ARM_PC_REGNUM, (char *) &pc_val); + regcache_raw_collect (regcache, ARM_PC_REGNUM, + (char *) &pc_val); - pc_val = ADDR_BITS_REMOVE (pc_val); - inferior_registers.r_pc - ^= ADDR_BITS_REMOVE (inferior_registers.r_pc); + pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val); + inferior_registers.r_pc ^= gdbarch_addr_bits_remove + (gdbarch, inferior_registers.r_pc); inferior_registers.r_pc |= pc_val; } break; case ARM_PS_REGNUM: if (arm_apcs_32) - regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr); + regcache_raw_collect (regcache, ARM_PS_REGNUM, + (char *) &inferior_registers.r_cpsr); else { unsigned psr_val; - regcache_collect (ARM_PS_REGNUM, (char *) &psr_val); + regcache_raw_collect (regcache, ARM_PS_REGNUM, + (char *) &psr_val); - psr_val ^= ADDR_BITS_REMOVE (psr_val); - inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc); + psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val); + inferior_registers.r_pc = gdbarch_addr_bits_remove + (gdbarch, inferior_registers.r_pc); inferior_registers.r_pc |= psr_val; } break; default: - regcache_collect (regno, (char *) &inferior_registers.r[regno]); + regcache_raw_collect (regcache, regno, + (char *) &inferior_registers.r[regno]); break; } - ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_registers, 0); + ret = ptrace (PT_SETREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_registers, 0); if (ret < 0) - warning ("unable to write register %d to inferior", regno); + warning (_("unable to write register %d to inferior"), regno); } static void -store_regs (void) +store_regs (const struct regcache *regcache) { + struct gdbarch *gdbarch = get_regcache_arch (regcache); struct reg inferior_registers; int ret; int regno; for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++) - regcache_collect (regno, (char *) &inferior_registers.r[regno]); + regcache_raw_collect (regcache, regno, + (char *) &inferior_registers.r[regno]); - regcache_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp); - regcache_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr); + regcache_raw_collect (regcache, ARM_SP_REGNUM, + (char *) &inferior_registers.r_sp); + regcache_raw_collect (regcache, ARM_LR_REGNUM, + (char *) &inferior_registers.r_lr); if (arm_apcs_32) { - regcache_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc); - regcache_collect (ARM_PS_REGNUM, (char *) &inferior_registers.r_cpsr); + regcache_raw_collect (regcache, ARM_PC_REGNUM, + (char *) &inferior_registers.r_pc); + regcache_raw_collect (regcache, ARM_PS_REGNUM, + (char *) &inferior_registers.r_cpsr); } else { unsigned pc_val; unsigned psr_val; - regcache_collect (ARM_PC_REGNUM, (char *) &pc_val); - regcache_collect (ARM_PS_REGNUM, (char *) &psr_val); + regcache_raw_collect (regcache, ARM_PC_REGNUM, + (char *) &pc_val); + regcache_raw_collect (regcache, ARM_PS_REGNUM, + (char *) &psr_val); - pc_val = ADDR_BITS_REMOVE (pc_val); - psr_val ^= ADDR_BITS_REMOVE (psr_val); + pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val); + psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val); inferior_registers.r_pc = pc_val | psr_val; } - ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_registers, 0); + ret = ptrace (PT_SETREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_registers, 0); if (ret < 0) - warning ("unable to store general registers"); + warning (_("unable to store general registers")); } static void -store_fp_register (int regno) +store_fp_register (const struct regcache *regcache, int regno) { struct fpreg inferior_fp_registers; int ret; - ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0); + ret = ptrace (PT_GETFPREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); if (ret < 0) { - warning ("unable to fetch floating-point registers"); + warning (_("unable to fetch floating-point registers")); return; } switch (regno) { case ARM_FPS_REGNUM: - regcache_collect (ARM_FPS_REGNUM, - (char *) &inferior_fp_registers.fpr_fpsr); + regcache_raw_collect (regcache, ARM_FPS_REGNUM, + (char *) &inferior_fp_registers.fpr_fpsr); break; default: - regcache_collect - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); + regcache_raw_collect (regcache, regno, + (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); break; } - ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0); + ret = ptrace (PT_SETFPREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); if (ret < 0) - warning ("unable to write register %d to inferior", regno); + warning (_("unable to write register %d to inferior"), regno); } static void -store_fp_regs (void) +store_fp_regs (const struct regcache *regcache) { struct fpreg inferior_fp_registers; int ret; @@ -334,32 +378,34 @@ store_fp_regs (void) for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) - regcache_collect - (regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); + regcache_raw_collect (regcache, regno, + (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]); - regcache_collect (ARM_FPS_REGNUM, (char *) &inferior_fp_registers.fpr_fpsr); + regcache_raw_collect (regcache, ARM_FPS_REGNUM, + (char *) &inferior_fp_registers.fpr_fpsr); - ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid), - (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0); + ret = ptrace (PT_SETFPREGS, ptid_get_pid (inferior_ptid), + (PTRACE_TYPE_ARG3) &inferior_fp_registers, 0); if (ret < 0) - warning ("unable to store floating-point registers"); + warning (_("unable to store floating-point registers")); } -void -store_inferior_registers (int regno) +static void +armnbsd_store_registers (struct target_ops *ops, + struct regcache *regcache, int regno) { if (regno >= 0) { if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM) - store_register (regno); + store_register (regcache, regno); else - store_fp_register (regno); + store_fp_register (regcache, regno); } else { - store_regs (); - store_fp_regs (); + store_regs (regcache); + store_fp_regs (regcache); } } @@ -370,34 +416,56 @@ struct md_core }; static void -fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, +fetch_core_registers (struct regcache *regcache, + char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR ignore) { struct md_core *core_reg = (struct md_core *) core_reg_sect; int regno; CORE_ADDR r_pc; - - /* Integer registers. */ - for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++) - supply_register (regno, (char *) &core_reg->intreg.r[regno]); - supply_register (ARM_SP_REGNUM, (char *) &core_reg->intreg.r_sp); - supply_register (ARM_LR_REGNUM, (char *) &core_reg->intreg.r_lr); - /* This is ok: we're running native... */ - r_pc = ADDR_BITS_REMOVE (core_reg->intreg.r_pc); - supply_register (ARM_PC_REGNUM, (char *) &r_pc); + arm_supply_gregset (regcache, &core_reg->intreg); + arm_supply_fparegset (regcache, &core_reg->freg); +} - if (arm_apcs_32) - supply_register (ARM_PS_REGNUM, (char *) &core_reg->intreg.r_cpsr); - else - supply_register (ARM_PS_REGNUM, (char *) &core_reg->intreg.r_pc); +static void +fetch_elfcore_registers (struct regcache *regcache, + char *core_reg_sect, unsigned core_reg_size, + int which, CORE_ADDR ignore) +{ + struct reg gregset; + struct fpreg fparegset; - /* Floating-point registers. */ - for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) - supply_register - (regno, (char *) &core_reg->freg.fpr[regno - ARM_F0_REGNUM]); + switch (which) + { + case 0: /* Integer registers. */ + if (core_reg_size != sizeof (struct reg)) + warning (_("wrong size of register set in core file")); + else + { + /* The memcpy may be unnecessary, but we can't really be sure + of the alignment of the data in the core file. */ + memcpy (&gregset, core_reg_sect, sizeof (gregset)); + arm_supply_gregset (regcache, &gregset); + } + break; + + case 2: + if (core_reg_size != sizeof (struct fpreg)) + warning (_("wrong size of FPA register set in core file")); + else + { + /* The memcpy may be unnecessary, but we can't really be sure + of the alignment of the data in the core file. */ + memcpy (&fparegset, core_reg_sect, sizeof (fparegset)); + arm_supply_fparegset (regcache, &fparegset); + } + break; - supply_register (ARM_FPS_REGNUM, (char *) &core_reg->freg.fpr_fpsr); + default: + /* Don't know what kind of register request this is; just ignore it. */ + break; + } } static struct core_fns arm_netbsd_core_fns = @@ -409,8 +477,25 @@ static struct core_fns arm_netbsd_core_fns = NULL }; +static struct core_fns arm_netbsd_elfcore_fns = +{ + bfd_target_elf_flavour, /* core_flovour. */ + default_check_format, /* check_format. */ + default_core_sniffer, /* core_sniffer. */ + fetch_elfcore_registers, /* core_read_registers. */ + NULL +}; + void _initialize_arm_netbsd_nat (void) { - add_core_fns (&arm_netbsd_core_fns); + struct target_ops *t; + + t = inf_ptrace_target (); + t->to_fetch_registers = armnbsd_fetch_registers; + t->to_store_registers = armnbsd_store_registers; + add_target (t); + + deprecated_add_core_fns (&arm_netbsd_core_fns); + deprecated_add_core_fns (&arm_netbsd_elfcore_fns); }