X-Git-Url: http://drtracing.org/?a=blobdiff_plain;ds=sidebyside;f=gdb%2Fcris-tdep.c;h=e7249943da805d433a0b50c1d48a3fc650e524bf;hb=4ee62156d969867d3d3ffedf656a74643f77279e;hp=81b1edcd20463dcabeda5f42990a18b21fca5899;hpb=a6d9a66e2318b2002461996aeb5d4f18a0a9d3d6;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c index 81b1edcd20..e7249943da 100644 --- a/gdb/cris-tdep.c +++ b/gdb/cris-tdep.c @@ -39,7 +39,6 @@ #include "regcache.h" #include "gdb_assert.h" -/* To get entry_point_address. */ #include "objfiles.h" #include "solib.h" /* Support for shared libraries. */ @@ -259,13 +258,14 @@ cris_rt_sigtramp_start (struct frame_info *this_frame) static CORE_ADDR cris_sigcontext_addr (struct frame_info *this_frame) { + struct gdbarch *gdbarch = get_frame_arch (this_frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); CORE_ADDR pc; CORE_ADDR sp; char buf[4]; - get_frame_register (this_frame, - gdbarch_sp_regnum (get_frame_arch (this_frame)), buf); - sp = extract_unsigned_integer (buf, 4); + get_frame_register (this_frame, gdbarch_sp_regnum (gdbarch), buf); + sp = extract_unsigned_integer (buf, 4, byte_order); /* Look for normal sigtramp frame first. */ pc = cris_sigtramp_start (this_frame); @@ -321,6 +321,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *this_frame, { struct gdbarch *gdbarch = get_frame_arch (this_frame); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); struct cris_unwind_cache *info; CORE_ADDR pc; CORE_ADDR sp; @@ -346,7 +347,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *this_frame, info->leaf_function = 0; get_frame_register (this_frame, gdbarch_sp_regnum (gdbarch), buf); - info->base = extract_unsigned_integer (buf, 4); + info->base = extract_unsigned_integer (buf, 4, byte_order); addr = cris_sigcontext_addr (this_frame); @@ -470,7 +471,7 @@ crisv32_single_step_through_delay (struct gdbarch *gdbarch, { /* In delay slot - check if there's a breakpoint at the preceding instruction. */ - if (breakpoint_here_p (erp & ~0x1)) + if (breakpoint_here_p (get_frame_address_space (this_frame), erp & ~0x1)) ret = 1; } return ret; @@ -535,6 +536,7 @@ struct instruction_environment int delay_slot_pc_active; int xflag_found; int disable_interrupt; + int byte_order; } inst_env_type; /* Machine-dependencies in CRIS for opcodes. */ @@ -862,6 +864,7 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr) { + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); int stack_alloc; int stack_offset; int argreg; @@ -952,7 +955,7 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function, else { gdb_byte buf[4]; - store_unsigned_integer (buf, 4, sp); + store_unsigned_integer (buf, 4, byte_order, sp); si = push_stack_item (si, buf, 4); } } @@ -1085,6 +1088,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, struct cris_unwind_cache *info) { struct gdbarch *gdbarch = get_frame_arch (this_frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + /* Present instruction. */ unsigned short insn; @@ -1126,12 +1131,12 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, /* Find the prologue instructions. */ while (pc > 0 && pc < limit) { - insn = read_memory_unsigned_integer (pc, 2); + insn = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; if (insn == 0xE1FC) { /* push 32 bit instruction */ - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; regno = cris_get_operand2 (insn_next); if (info) @@ -1195,7 +1200,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, { info->sp_offset += -cris_get_signed_offset (insn); } - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE && cris_get_opcode (insn_next) == 0x000F @@ -1240,7 +1245,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, && (cris_get_signed_offset (insn) < 0)) { /* move.S rZ,[r8-U] (?) */ - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; regno = cris_get_operand2 (insn_next); if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch)) @@ -1264,7 +1269,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *this_frame, && (cris_get_signed_offset (insn) > 0)) { /* move.S [r8+U],rZ (?) */ - insn_next = read_memory_unsigned_integer (pc, 2); + insn_next = read_memory_unsigned_integer (pc, 2, byte_order); pc += 2; regno = cris_get_operand2 (insn_next); if ((regno >= 0 && regno < gdbarch_sp_regnum (gdbarch)) @@ -1703,21 +1708,23 @@ static void cris_store_return_value (struct type *type, struct regcache *regcache, const void *valbuf) { + struct gdbarch *gdbarch = get_regcache_arch (regcache); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); ULONGEST val; int len = TYPE_LENGTH (type); if (len <= 4) { /* Put the return value in R10. */ - val = extract_unsigned_integer (valbuf, len); + val = extract_unsigned_integer (valbuf, len, byte_order); regcache_cooked_write_unsigned (regcache, ARG1_REGNUM, val); } else if (len <= 8) { /* Put the return value in R10 and R11. */ - val = extract_unsigned_integer (valbuf, 4); + val = extract_unsigned_integer (valbuf, 4, byte_order); regcache_cooked_write_unsigned (regcache, ARG1_REGNUM, val); - val = extract_unsigned_integer ((char *)valbuf + 4, len - 4); + val = extract_unsigned_integer ((char *)valbuf + 4, len - 4, byte_order); regcache_cooked_write_unsigned (regcache, ARG2_REGNUM, val); } else @@ -1872,6 +1879,8 @@ static void cris_extract_return_value (struct type *type, struct regcache *regcache, void *valbuf) { + struct gdbarch *gdbarch = get_regcache_arch (regcache); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); ULONGEST val; int len = TYPE_LENGTH (type); @@ -1879,15 +1888,15 @@ cris_extract_return_value (struct type *type, struct regcache *regcache, { /* Get the return value from R10. */ regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &val); - store_unsigned_integer (valbuf, len, val); + store_unsigned_integer (valbuf, len, byte_order, val); } else if (len <= 8) { /* Get the return value from R10 and R11. */ regcache_cooked_read_unsigned (regcache, ARG1_REGNUM, &val); - store_unsigned_integer (valbuf, 4, val); + store_unsigned_integer (valbuf, 4, byte_order, val); regcache_cooked_read_unsigned (regcache, ARG2_REGNUM, &val); - store_unsigned_integer ((char *)valbuf + 4, len - 4, val); + store_unsigned_integer ((char *)valbuf + 4, len - 4, byte_order, val); } else error (_("cris_extract_return_value: type length too large")); @@ -2054,6 +2063,7 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env) int offset; unsigned short insn; struct gdbarch *gdbarch = get_frame_arch (frame); + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); /* Create a local register image and set the initial state. */ for (i = 0; i < NUM_GENREGS; i++) @@ -2074,13 +2084,14 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env) inst_env->invalid = 0; inst_env->xflag_found = 0; inst_env->disable_interrupt = 0; + inst_env->byte_order = byte_order; /* Look for a step target. */ do { /* Read an instruction from the client. */ insn = read_memory_unsigned_integer - (inst_env->reg[gdbarch_pc_regnum (gdbarch)], 2); + (inst_env->reg[gdbarch_pc_regnum (gdbarch)], 2, byte_order); /* If the instruction is not in a delay slot the new content of the PC is [PC] + 2. If the instruction is in a delay slot it is not @@ -2121,6 +2132,7 @@ static int cris_software_single_step (struct frame_info *frame) { struct gdbarch *gdbarch = get_frame_arch (frame); + struct address_space *aspace = get_frame_address_space (frame); inst_env_type inst_env; /* Analyse the present instruction environment and insert @@ -2138,13 +2150,14 @@ cris_software_single_step (struct frame_info *frame) and possibly another one for a branch, jump, etc. */ CORE_ADDR next_pc = (CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (gdbarch)]; - insert_single_step_breakpoint (gdbarch, next_pc); + insert_single_step_breakpoint (gdbarch, aspace, next_pc); if (inst_env.branch_found && (CORE_ADDR) inst_env.branch_break_address != next_pc) { CORE_ADDR branch_target_address = (CORE_ADDR) inst_env.branch_break_address; - insert_single_step_breakpoint (gdbarch, branch_target_address); + insert_single_step_breakpoint (gdbarch, + aspace, branch_target_address); } } @@ -2209,7 +2222,8 @@ process_autoincrement (int size, unsigned short inst, inst_env_type *inst_env) /* Just a forward declaration. */ static unsigned long get_data_from_address (unsigned short *inst, - CORE_ADDR address); + CORE_ADDR address, + enum bfd_endian byte_order); /* Calculates the prefix value for the general case of offset addressing mode. */ @@ -2235,7 +2249,8 @@ bdap_prefix (unsigned short inst, inst_env_type *inst_env) /* The offset is an indirection of the contents of the operand1 register. */ inst_env->prefix_value += - get_data_from_address (&inst, inst_env->reg[cris_get_operand1 (inst)]); + get_data_from_address (&inst, inst_env->reg[cris_get_operand1 (inst)], + inst_env->byte_order); if (cris_get_mode (inst) == AUTOINC_MODE) { @@ -2301,7 +2316,8 @@ dip_prefix (unsigned short inst, inst_env_type *inst_env) /* The prefix value is one dereference of the contents of the operand1 register. */ address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)]; - inst_env->prefix_value = read_memory_unsigned_integer (address, 4); + inst_env->prefix_value + = read_memory_unsigned_integer (address, 4, inst_env->byte_order); /* Check if the mode is autoincrement. */ if (cris_get_mode (inst) == AUTOINC_MODE) @@ -2368,7 +2384,7 @@ sixteen_bit_offset_branch_op (unsigned short inst, inst_env_type *inst_env) } /* We have a branch, find out the offset for the branch. */ - offset = read_memory_integer (inst_env->reg[REG_PC], 2); + offset = read_memory_integer (inst_env->reg[REG_PC], 2, inst_env->byte_order); /* The instruction is one word longer than normal, so add one word to the PC. */ @@ -2877,13 +2893,14 @@ none_reg_mode_jump_op (unsigned short inst, inst_env_type *inst_env) /* Get the new value for the the PC. */ newpc = read_memory_unsigned_integer ((CORE_ADDR) inst_env->prefix_value, - 4); + 4, inst_env->byte_order); } else { /* Get the new value for the PC. */ address = (CORE_ADDR) inst_env->reg[cris_get_operand1 (inst)]; - newpc = read_memory_unsigned_integer (address, 4); + newpc = read_memory_unsigned_integer (address, + 4, inst_env->byte_order); /* Check if we should increment a register. */ if (cris_get_mode (inst) == AUTOINC_MODE) @@ -3058,7 +3075,8 @@ move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env) if (cris_get_operand2 (inst) >= REG_PC) { inst_env->reg[REG_PC] = - read_memory_unsigned_integer (inst_env->prefix_value, 4); + read_memory_unsigned_integer (inst_env->prefix_value, + 4, inst_env->byte_order); } /* The assign value is the value after the increment. Normally, the assign value is the value before the increment. */ @@ -3082,7 +3100,7 @@ move_mem_to_reg_movem_op (unsigned short inst, inst_env_type *inst_env) } inst_env->reg[REG_PC] = read_memory_unsigned_integer (inst_env->reg[cris_get_operand1 (inst)], - 4); + 4, inst_env->byte_order); } /* The increment is not depending on the size, instead it's depending on the number of registers loaded from memory. */ @@ -3112,8 +3130,8 @@ move_reg_to_mem_movem_op (unsigned short inst, inst_env_type *inst_env) { /* The assign value is the value after the increment. Normally, the assign value is the value before the increment. */ - if ((cris_get_operand1 (inst) == REG_PC) && - (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)) + if ((cris_get_operand1 (inst) == REG_PC) + && (cris_get_mode (inst) == PREFIX_ASSIGN_MODE)) { /* The prefix handles the problem if we are in a delay slot. */ inst_env->reg[REG_PC] = inst_env->prefix_value; @@ -3396,7 +3414,7 @@ reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst, extend instruction, the size field is changed in instruction. */ static unsigned long -get_data_from_address (unsigned short *inst, CORE_ADDR address) +get_data_from_address (unsigned short *inst, CORE_ADDR address, enum bfd_endian byte_order) { int size = cris_get_size (*inst); unsigned long value; @@ -3410,7 +3428,7 @@ get_data_from_address (unsigned short *inst, CORE_ADDR address) /* Is there a need for checking the size? Size should contain the number of bytes to read. */ size = 1 << size; - value = read_memory_unsigned_integer (address, size); + value = read_memory_unsigned_integer (address, size, byte_order); /* Check if it's an extend, signed or zero instruction. */ if (cris_get_opcode (*inst) < 4) @@ -3436,7 +3454,8 @@ handle_prefix_assign_mode_for_aritm_op (unsigned short inst, operand2 = inst_env->reg[REG_PC]; /* Get the value of the third operand. */ - operand3 = get_data_from_address (&inst, inst_env->prefix_value); + operand3 = get_data_from_address (&inst, inst_env->prefix_value, + inst_env->byte_order); /* Calculate the PC value after the instruction, i.e. where the breakpoint should be. The order of the udw_operands is vital. */ @@ -3465,7 +3484,8 @@ three_operand_add_sub_cmp_and_or_op (unsigned short inst, operand2 = inst_env->reg[cris_get_operand2 (inst)]; /* Get the value of the third operand. */ - operand3 = get_data_from_address (&inst, inst_env->prefix_value); + operand3 = get_data_from_address (&inst, inst_env->prefix_value, + inst_env->byte_order); /* Calculate the PC value after the instruction, i.e. where the breakpoint should be. */ @@ -3528,7 +3548,7 @@ handle_inc_and_index_mode_for_aritm_op (unsigned short inst, /* Get the value of the third operand, i.e. the indirect operand. */ operand1 = inst_env->reg[cris_get_operand1 (inst)]; - operand3 = get_data_from_address (&inst, operand1); + operand3 = get_data_from_address (&inst, operand1, inst_env->byte_order); /* Calculate the PC value after the instruction, i.e. where the breakpoint should be. The order of the udw_operands is vital. */