X-Git-Url: http://drtracing.org/?a=blobdiff_plain;ds=sidebyside;f=gdb%2Fppc-linux-nat.c;h=6be8f022a7b0ec00f631a614ed15f55406bc7e06;hb=60db1b8565060f4bd2287b060ea9724c93289982;hp=af80919890afa804c77d3bd58971f8f7eec424dc;hpb=0b30217134add051e159a192066a1e568ebd837f;p=deliverable%2Fbinutils-gdb.git
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index af80919890..6be8f022a7 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -1,7 +1,6 @@
/* PPC GNU/Linux native support.
- Copyright (C) 1988-1989, 1991-1992, 1994, 1996, 2000-2012 Free
- Software Foundation, Inc.
+ Copyright (C) 1988-2020 Free Software Foundation, Inc.
This file is part of GDB.
@@ -19,27 +18,28 @@
along with this program. If not, see . */
#include "defs.h"
-#include "gdb_string.h"
-#include "observer.h"
#include "frame.h"
#include "inferior.h"
#include "gdbthread.h"
#include "gdbcore.h"
#include "regcache.h"
-#include "gdb_assert.h"
+#include "regset.h"
#include "target.h"
#include "linux-nat.h"
-
-#include
#include
-#include
#include
#include
#include
-#include "gdb_wait.h"
+#include
+#include "gdbsupport/gdb_wait.h"
#include
#include
-#include
+#include "nat/gdb_ptrace.h"
+#include "nat/linux-ptrace.h"
+#include "inf-ptrace.h"
+#include
+#include
+#include
/* Prototypes for supply_gregset etc. */
#include "gregset.h"
@@ -50,60 +50,13 @@
#include "elf/common.h"
#include "auxv.h"
-/* This sometimes isn't defined. */
-#ifndef PT_ORIG_R3
-#define PT_ORIG_R3 34
-#endif
-#ifndef PT_TRAP
-#define PT_TRAP 40
-#endif
-
-/* The PPC_FEATURE_* defines should be provided by .
- If they aren't, we can provide them ourselves (their values are fixed
- because they are part of the kernel ABI). They are used in the AT_HWCAP
- entry of the AUXV. */
-#ifndef PPC_FEATURE_CELL
-#define PPC_FEATURE_CELL 0x00010000
-#endif
-#ifndef PPC_FEATURE_BOOKE
-#define PPC_FEATURE_BOOKE 0x00008000
-#endif
-#ifndef PPC_FEATURE_HAS_DFP
-#define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal Floating Point. */
-#endif
-
-/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
- configure time check. Some older glibc's (for instance 2.2.1)
- don't have a specific powerpc version of ptrace.h, and fall back on
- a generic one. In such cases, sys/ptrace.h defines
- PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
- ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
- PTRACE_SETVRREGS to be. This also makes a configury check pretty
- much useless. */
-
-/* These definitions should really come from the glibc header files,
- but Glibc doesn't know about the vrregs yet. */
-#ifndef PTRACE_GETVRREGS
-#define PTRACE_GETVRREGS 18
-#define PTRACE_SETVRREGS 19
-#endif
-
-/* PTRACE requests for POWER7 VSX registers. */
-#ifndef PTRACE_GETVSXREGS
-#define PTRACE_GETVSXREGS 27
-#define PTRACE_SETVSXREGS 28
-#endif
-
-/* Similarly for the ptrace requests for getting / setting the SPE
- registers (ev0 -- ev31, acc, and spefscr). See the description of
- gdb_evrregset_t for details. */
-#ifndef PTRACE_GETEVRREGS
-#define PTRACE_GETEVRREGS 20
-#define PTRACE_SETEVRREGS 21
-#endif
+#include "arch/ppc-linux-common.h"
+#include "arch/ppc-linux-tdesc.h"
+#include "nat/ppc-linux.h"
+#include "linux-tdep.h"
/* Similarly for the hardware watchpoint support. These requests are used
- when the BookE kernel interface is not available. */
+ when the PowerPC HWDEBUG ptrace interface is not available. */
#ifndef PTRACE_GET_DEBUGREG
#define PTRACE_GET_DEBUGREG 25
#endif
@@ -114,15 +67,15 @@
#define PTRACE_GETSIGINFO 0x4202
#endif
-/* These requests are used when the BookE kernel interface is available.
- It exposes the additional debug features of BookE processors, such as
- ranged breakpoints and watchpoints and hardware-accelerated condition
- evaluation. */
+/* These requests are used when the PowerPC HWDEBUG ptrace interface is
+ available. It exposes the debug facilities of PowerPC processors, as well
+ as additional features of BookE processors, such as ranged breakpoints and
+ watchpoints and hardware-accelerated condition evaluation. */
#ifndef PPC_PTRACE_GETHWDBGINFO
-/* Not having PPC_PTRACE_GETHWDBGINFO defined means that the new BookE
- interface is not present in ptrace.h, so we'll have to pretty much include
- it all here so that the code at least compiles on older systems. */
+/* Not having PPC_PTRACE_GETHWDBGINFO defined means that the PowerPC HWDEBUG
+ ptrace interface is not present in ptrace.h, so we'll have to pretty much
+ include it all here so that the code at least compiles on older systems. */
#define PPC_PTRACE_GETHWDBGINFO 0x89
#define PPC_PTRACE_SETHWDEBUG 0x88
#define PPC_PTRACE_DELHWDEBUG 0x87
@@ -179,7 +132,15 @@ struct ppc_hw_breakpoint
(1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
#endif /* PPC_PTRACE_GETHWDBGINFO */
+/* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider
+ watchpoint (up to 512 bytes). */
+#ifndef PPC_DEBUG_FEATURE_DATA_BP_DAWR
+#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
+#endif /* PPC_DEBUG_FEATURE_DATA_BP_DAWR */
+/* The version of the PowerPC HWDEBUG kernel interface that we will use, if
+ available. */
+#define PPC_DEBUG_CURRENT_VERSION 1
/* Similarly for the general-purpose (gp0 -- gp31)
and floating-point registers (fp0 -- fp31). */
@@ -209,23 +170,22 @@ struct ppc_hw_breakpoint
Even though this vrsave register is not included in the regset
typedef, it is handled by the ptrace requests.
- Note that GNU/Linux doesn't support little endian PPC hardware,
- therefore the offset at which the real value of the VSCR register
- is located will be always 12 bytes.
-
The layout is like this (where x is the actual value of the vscr reg): */
/* *INDENT-OFF* */
/*
+Big-Endian:
|.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
<-------> <-------><-------><->
VR0 VR31 VSCR VRSAVE
+Little-Endian:
+ |.|.|.|.|.....|.|.|.|.||X|.|.|.||.|
+ <-------> <-------><-------><->
+ VR0 VR31 VSCR VRSAVE
*/
/* *INDENT-ON* */
-#define SIZEOF_VRREGS 33*16+4
-
-typedef char gdb_vrregset_t[SIZEOF_VRREGS];
+typedef char gdb_vrregset_t[PPC_LINUX_SIZEOF_VRREGSET];
/* This is the layout of the POWER7 VSX registers and the way they overlap
with the existing FPR and VMX registers.
@@ -259,9 +219,7 @@ typedef char gdb_vrregset_t[SIZEOF_VRREGS];
the FP registers (doubleword 0) and hence extend them with additional
64 bits (doubleword 1). The other 32 regs overlap with the VMX
registers. */
-#define SIZEOF_VSXREGS 32*8
-
-typedef char gdb_vsxregset_t[SIZEOF_VSXREGS];
+typedef char gdb_vsxregset_t[PPC_LINUX_SIZEOF_VSXREGSET];
/* On PPC processors that support the Signal Processing Extension
(SPE) APU, the general-purpose registers are 64 bits long.
@@ -318,6 +276,352 @@ int have_ptrace_getsetregs = 1;
them and gotten an error. */
int have_ptrace_getsetfpregs = 1;
+/* Private arch info associated with each thread lwp_info object, used
+ for debug register handling. */
+
+struct arch_lwp_info
+{
+ /* When true, indicates that the debug registers installed in the
+ thread no longer correspond to the watchpoints and breakpoints
+ requested by GDB. */
+ bool debug_regs_stale;
+
+ /* We need a back-reference to the PTID of the thread so that we can
+ cleanup the debug register state of the thread in
+ low_delete_thread. */
+ ptid_t lwp_ptid;
+};
+
+/* Class used to detect which set of ptrace requests that
+ ppc_linux_nat_target will use to install and remove hardware
+ breakpoints and watchpoints.
+
+ The interface is only detected once, testing the ptrace calls. The
+ result can indicate that no interface is available.
+
+ The Linux kernel provides two different sets of ptrace requests to
+ handle hardware watchpoints and breakpoints for Power:
+
+ - PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG, and
+ PPC_PTRACE_DELHWDEBUG.
+
+ Or
+
+ - PTRACE_SET_DEBUGREG and PTRACE_GET_DEBUGREG
+
+ The first set is the more flexible one and allows setting watchpoints
+ with a variable watched region length and, for BookE processors,
+ multiple types of debug registers (e.g. hardware breakpoints and
+ hardware-assisted conditions for watchpoints). The second one only
+ allows setting one debug register, a watchpoint, so we only use it if
+ the first one is not available. */
+
+class ppc_linux_dreg_interface
+{
+public:
+
+ ppc_linux_dreg_interface ()
+ : m_interface (), m_hwdebug_info ()
+ {
+ };
+
+ DISABLE_COPY_AND_ASSIGN (ppc_linux_dreg_interface);
+
+ /* One and only one of these three functions returns true, indicating
+ whether the corresponding interface is the one we detected. The
+ interface must already have been detected as a precontidion. */
+
+ bool hwdebug_p ()
+ {
+ gdb_assert (detected_p ());
+ return *m_interface == HWDEBUG;
+ }
+
+ bool debugreg_p ()
+ {
+ gdb_assert (detected_p ());
+ return *m_interface == DEBUGREG;
+ }
+
+ bool unavailable_p ()
+ {
+ gdb_assert (detected_p ());
+ return *m_interface == UNAVAILABLE;
+ }
+
+ /* Returns the debug register capabilities of the target. Should only
+ be called if the interface is HWDEBUG. */
+ const struct ppc_debug_info &hwdebug_info ()
+ {
+ gdb_assert (hwdebug_p ());
+
+ return m_hwdebug_info;
+ }
+
+ /* Returns true if the interface has already been detected. This is
+ useful for cases when we know there is no work to be done if the
+ interface hasn't been detected yet. */
+ bool detected_p ()
+ {
+ return m_interface.has_value ();
+ }
+
+ /* Detect the available interface, if any, if it hasn't been detected
+ before, using PTID for the necessary ptrace calls. */
+
+ void detect (const ptid_t &ptid)
+ {
+ if (m_interface.has_value ())
+ return;
+
+ gdb_assert (ptid.lwp_p ());
+
+ bool no_features = false;
+
+ if (ptrace (PPC_PTRACE_GETHWDBGINFO, ptid.lwp (), 0, &m_hwdebug_info)
+ != -1)
+ {
+ /* If there are no advertised features, we don't use the
+ HWDEBUG interface and try the DEBUGREG interface instead.
+ It shouldn't be necessary to do this, however, when the
+ kernel is configured without CONFIG_HW_BREAKPOINTS (selected
+ by CONFIG_PERF_EVENTS), there is a bug that causes
+ watchpoints installed with the HWDEBUG interface not to
+ trigger. When this is the case, features will be zero,
+ which we use as an indicator to fall back to the DEBUGREG
+ interface. */
+ if (m_hwdebug_info.features != 0)
+ {
+ m_interface.emplace (HWDEBUG);
+ return;
+ }
+ else
+ no_features = true;
+ }
+
+ /* EIO indicates that the request is invalid, so we try DEBUGREG
+ next. Technically, it can also indicate other failures, but we
+ can't differentiate those.
+
+ Other errors could happen for various reasons. We could get an
+ ESRCH if the traced thread was killed by a signal. Trying to
+ detect the interface with another thread in the future would be
+ complicated, as callers would have to handle an "unknown
+ interface" case. It's also unclear if raising an exception
+ here would be safe.
+
+ Other errors, such as ENODEV, could be more permanent and cause
+ a failure for any thread.
+
+ For simplicity, with all errors other than EIO, we set the
+ interface to UNAVAILABLE and don't try DEBUGREG. If DEBUGREG
+ fails too, we'll also set the interface to UNAVAILABLE. It's
+ unlikely that trying the DEBUGREG interface with this same thread
+ would work, for errors other than EIO. This means that these
+ errors will cause hardware watchpoints and breakpoints to become
+ unavailable throughout a GDB session. */
+
+ if (no_features || errno == EIO)
+ {
+ unsigned long wp;
+
+ if (ptrace (PTRACE_GET_DEBUGREG, ptid.lwp (), 0, &wp) != -1)
+ {
+ m_interface.emplace (DEBUGREG);
+ return;
+ }
+ }
+
+ if (errno != EIO)
+ warning (_("Error when detecting the debug register interface. "
+ "Debug registers will be unavailable."));
+
+ m_interface.emplace (UNAVAILABLE);
+ return;
+ }
+
+private:
+
+ /* HWDEBUG represents the set of calls PPC_PTRACE_GETHWDBGINFO,
+ PPC_PTRACE_SETHWDEBUG and PPC_PTRACE_DELHWDEBUG.
+
+ DEBUGREG represents the set of calls PTRACE_SET_DEBUGREG and
+ PTRACE_GET_DEBUGREG.
+
+ UNAVAILABLE can indicate that the kernel doesn't support any of the
+ two sets of requests or that there was an error when we tried to
+ detect wich interface is available. */
+
+ enum debug_reg_interface
+ {
+ UNAVAILABLE,
+ HWDEBUG,
+ DEBUGREG
+ };
+
+ /* The interface option. Initialized if has_value () returns true. */
+ gdb::optional m_interface;
+
+ /* The info returned by the kernel with PPC_PTRACE_GETHWDBGINFO. Only
+ valid if we determined that the interface is HWDEBUG. */
+ struct ppc_debug_info m_hwdebug_info;
+};
+
+/* Per-process information. This includes the hardware watchpoints and
+ breakpoints that GDB requested to this target. */
+
+struct ppc_linux_process_info
+{
+ /* The list of hardware watchpoints and breakpoints that GDB requested
+ for this process.
+
+ Only used when the interface is HWDEBUG. */
+ std::list requested_hw_bps;
+
+ /* The watchpoint value that GDB requested for this process.
+
+ Only used when the interface is DEBUGREG. */
+ gdb::optional requested_wp_val;
+};
+
+struct ppc_linux_nat_target final : public linux_nat_target
+{
+ /* Add our register access methods. */
+ void fetch_registers (struct regcache *, int) override;
+ void store_registers (struct regcache *, int) override;
+
+ /* Add our breakpoint/watchpoint methods. */
+ int can_use_hw_breakpoint (enum bptype, int, int) override;
+
+ int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *)
+ override;
+
+ int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *)
+ override;
+
+ int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
+
+ int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
+ struct expression *) override;
+
+ int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
+ struct expression *) override;
+
+ int insert_mask_watchpoint (CORE_ADDR, CORE_ADDR, enum target_hw_bp_type)
+ override;
+
+ int remove_mask_watchpoint (CORE_ADDR, CORE_ADDR, enum target_hw_bp_type)
+ override;
+
+ bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
+
+ bool can_accel_watchpoint_condition (CORE_ADDR, int, int, struct expression *)
+ override;
+
+ int masked_watch_num_registers (CORE_ADDR, CORE_ADDR) override;
+
+ int ranged_break_num_registers () override;
+
+ const struct target_desc *read_description () override;
+
+ int auxv_parse (gdb_byte **readptr,
+ gdb_byte *endptr, CORE_ADDR *typep, CORE_ADDR *valp)
+ override;
+
+ /* Override linux_nat_target low methods. */
+ bool low_stopped_by_watchpoint () override;
+
+ bool low_stopped_data_address (CORE_ADDR *) override;
+
+ void low_new_thread (struct lwp_info *lp) override;
+
+ void low_delete_thread (arch_lwp_info *) override;
+
+ void low_new_fork (struct lwp_info *, pid_t) override;
+
+ void low_new_clone (struct lwp_info *, pid_t) override;
+
+ void low_forget_process (pid_t pid) override;
+
+ void low_prepare_to_resume (struct lwp_info *) override;
+
+private:
+
+ void copy_thread_dreg_state (const ptid_t &parent_ptid,
+ const ptid_t &child_ptid);
+
+ void mark_thread_stale (struct lwp_info *lp);
+
+ void mark_debug_registers_changed (pid_t pid);
+
+ void register_hw_breakpoint (pid_t pid,
+ const struct ppc_hw_breakpoint &bp);
+
+ void clear_hw_breakpoint (pid_t pid,
+ const struct ppc_hw_breakpoint &a);
+
+ void register_wp (pid_t pid, long wp_value);
+
+ void clear_wp (pid_t pid);
+
+ bool can_use_watchpoint_cond_accel (void);
+
+ void calculate_dvc (CORE_ADDR addr, int len,
+ CORE_ADDR data_value,
+ uint32_t *condition_mode,
+ uint64_t *condition_value);
+
+ int check_condition (CORE_ADDR watch_addr,
+ struct expression *cond,
+ CORE_ADDR *data_value, int *len);
+
+ int num_memory_accesses (const std::vector &chain);
+
+ int get_trigger_type (enum target_hw_bp_type type);
+
+ void create_watchpoint_request (struct ppc_hw_breakpoint *p,
+ CORE_ADDR addr,
+ int len,
+ enum target_hw_bp_type type,
+ struct expression *cond,
+ int insert);
+
+ bool hwdebug_point_cmp (const struct ppc_hw_breakpoint &a,
+ const struct ppc_hw_breakpoint &b);
+
+ void init_arch_lwp_info (struct lwp_info *lp);
+
+ arch_lwp_info *get_arch_lwp_info (struct lwp_info *lp);
+
+ /* The ptrace interface we'll use to install hardware watchpoints and
+ breakpoints (debug registers). */
+ ppc_linux_dreg_interface m_dreg_interface;
+
+ /* A map from pids to structs containing info specific to each
+ process. */
+ std::unordered_map m_process_info;
+
+ /* Callable object to hash ptids by their lwp number. */
+ struct ptid_hash
+ {
+ std::size_t operator() (const ptid_t &ptid) const
+ {
+ return std::hash{} (ptid.lwp ());
+ }
+ };
+
+ /* A map from ptid_t objects to a list of pairs of slots and hardware
+ breakpoint objects. This keeps track of which hardware breakpoints
+ and watchpoints were last installed in each slot of each thread.
+
+ Only used when the interface is HWDEBUG. */
+ std::unordered_map >,
+ ptid_hash> m_installed_hw_bps;
+};
+
+static ppc_linux_nat_target the_ppc_linux_nat_target;
+
/* *INDENT-OFF* */
/* registers layout, as presented by the ptrace interface:
PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
@@ -406,13 +710,11 @@ ppc_register_u_addr (struct gdbarch *gdbarch, int regno)
registers set mechanism, as opposed to the interface for all the
other registers, that stores/fetches each register individually. */
static void
-fetch_vsx_register (struct regcache *regcache, int tid, int regno)
+fetch_vsx_registers (struct regcache *regcache, int tid, int regno)
{
int ret;
gdb_vsxregset_t regs;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int vsxregsize = register_size (gdbarch, tdep->ppc_vsr0_upper_regnum);
+ const struct regset *vsxregset = ppc_linux_vsxregset ();
ret = ptrace (PTRACE_GETVSXREGS, tid, 0, ®s);
if (ret < 0)
@@ -422,26 +724,24 @@ fetch_vsx_register (struct regcache *regcache, int tid, int regno)
have_ptrace_getsetvsxregs = 0;
return;
}
- perror_with_name (_("Unable to fetch VSX register"));
+ perror_with_name (_("Unable to fetch VSX registers"));
}
- regcache_raw_supply (regcache, regno,
- regs + (regno - tdep->ppc_vsr0_upper_regnum)
- * vsxregsize);
+ vsxregset->supply_regset (vsxregset, regcache, regno, ®s,
+ PPC_LINUX_SIZEOF_VSXREGSET);
}
/* The Linux kernel ptrace interface for AltiVec registers uses the
registers set mechanism, as opposed to the interface for all the
other registers, that stores/fetches each register individually. */
static void
-fetch_altivec_register (struct regcache *regcache, int tid, int regno)
+fetch_altivec_registers (struct regcache *regcache, int tid,
+ int regno)
{
int ret;
- int offset = 0;
gdb_vrregset_t regs;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
+ struct gdbarch *gdbarch = regcache->arch ();
+ const struct regset *vrregset = ppc_linux_vrregset (gdbarch);
ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
if (ret < 0)
@@ -451,19 +751,11 @@ fetch_altivec_register (struct regcache *regcache, int tid, int regno)
have_ptrace_getvrregs = 0;
return;
}
- perror_with_name (_("Unable to fetch AltiVec register"));
+ perror_with_name (_("Unable to fetch AltiVec registers"));
}
-
- /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
- long on the hardware. We deal only with the lower 4 bytes of the
- vector. VRSAVE is at the end of the array in a 4 bytes slot, so
- there is no need to define an offset for it. */
- if (regno == (tdep->ppc_vrsave_regnum - 1))
- offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
- regcache_raw_supply (regcache, regno,
- regs + (regno
- - tdep->ppc_vr0_regnum) * vrregsize + offset);
+
+ vrregset->supply_regset (vrregset, regcache, regno, ®s,
+ PPC_LINUX_SIZEOF_VRREGSET);
}
/* Fetch the top 32 bits of TID's general-purpose registers and the
@@ -503,7 +795,7 @@ get_spe_registers (int tid, struct gdb_evrregset_t *evrregset)
static void
fetch_spe_register (struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
struct gdb_evrregset_t evrregs;
@@ -521,55 +813,124 @@ fetch_spe_register (struct regcache *regcache, int tid, int regno)
int i;
for (i = 0; i < ppc_num_gprs; i++)
- regcache_raw_supply (regcache, tdep->ppc_ev0_upper_regnum + i,
- &evrregs.evr[i]);
+ regcache->raw_supply (tdep->ppc_ev0_upper_regnum + i, &evrregs.evr[i]);
}
else if (tdep->ppc_ev0_upper_regnum <= regno
&& regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs)
- regcache_raw_supply (regcache, regno,
- &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]);
+ regcache->raw_supply (regno,
+ &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]);
if (regno == -1
|| regno == tdep->ppc_acc_regnum)
- regcache_raw_supply (regcache, tdep->ppc_acc_regnum, &evrregs.acc);
+ regcache->raw_supply (tdep->ppc_acc_regnum, &evrregs.acc);
if (regno == -1
|| regno == tdep->ppc_spefscr_regnum)
- regcache_raw_supply (regcache, tdep->ppc_spefscr_regnum,
- &evrregs.spefscr);
+ regcache->raw_supply (tdep->ppc_spefscr_regnum, &evrregs.spefscr);
+}
+
+/* Use ptrace to fetch all registers from the register set with note
+ type REGSET_ID, size REGSIZE, and layout described by REGSET, from
+ process/thread TID and supply their values to REGCACHE. If ptrace
+ returns ENODATA to indicate the regset is unavailable, mark the
+ registers as unavailable in REGCACHE. */
+
+static void
+fetch_regset (struct regcache *regcache, int tid,
+ int regset_id, int regsetsize, const struct regset *regset)
+{
+ void *buf = alloca (regsetsize);
+ struct iovec iov;
+
+ iov.iov_base = buf;
+ iov.iov_len = regsetsize;
+
+ if (ptrace (PTRACE_GETREGSET, tid, regset_id, &iov) < 0)
+ {
+ if (errno == ENODATA)
+ regset->supply_regset (regset, regcache, -1, NULL, regsetsize);
+ else
+ perror_with_name (_("Couldn't get register set"));
+ }
+ else
+ regset->supply_regset (regset, regcache, -1, buf, regsetsize);
+}
+
+/* Use ptrace to store register REGNUM of the regset with note type
+ REGSET_ID, size REGSETSIZE, and layout described by REGSET, from
+ REGCACHE back to process/thread TID. If REGNUM is -1 all registers
+ in the set are collected and stored. */
+
+static void
+store_regset (const struct regcache *regcache, int tid, int regnum,
+ int regset_id, int regsetsize, const struct regset *regset)
+{
+ void *buf = alloca (regsetsize);
+ struct iovec iov;
+
+ iov.iov_base = buf;
+ iov.iov_len = regsetsize;
+
+ /* Make sure that the buffer that will be stored has up to date values
+ for the registers that won't be collected. */
+ if (ptrace (PTRACE_GETREGSET, tid, regset_id, &iov) < 0)
+ perror_with_name (_("Couldn't get register set"));
+
+ regset->collect_regset (regset, regcache, regnum, buf, regsetsize);
+
+ if (ptrace (PTRACE_SETREGSET, tid, regset_id, &iov) < 0)
+ perror_with_name (_("Couldn't set register set"));
+}
+
+/* Check whether the kernel provides a register set with number
+ REGSET_ID of size REGSETSIZE for process/thread TID. */
+
+static bool
+check_regset (int tid, int regset_id, int regsetsize)
+{
+ void *buf = alloca (regsetsize);
+ struct iovec iov;
+
+ iov.iov_base = buf;
+ iov.iov_len = regsetsize;
+
+ if (ptrace (PTRACE_GETREGSET, tid, regset_id, &iov) >= 0
+ || errno == ENODATA)
+ return true;
+ else
+ return false;
}
static void
fetch_register (struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* This isn't really an address. But ptrace thinks of it as one. */
CORE_ADDR regaddr = ppc_register_u_addr (gdbarch, regno);
int bytes_transferred;
- unsigned int offset; /* Offset of registers within the u area. */
- char buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[PPC_MAX_REGISTER_SIZE];
if (altivec_register_p (gdbarch, regno))
{
/* If this is the first time through, or if it is not the first
- time through, and we have comfirmed that there is kernel
+ time through, and we have confirmed that there is kernel
support for such a ptrace request, then go and fetch the
register. */
if (have_ptrace_getvrregs)
{
- fetch_altivec_register (regcache, tid, regno);
+ fetch_altivec_registers (regcache, tid, regno);
return;
}
/* If we have discovered that there is no ptrace support for
AltiVec registers, fall through and return zeroes, because
regaddr will be -1 in this case. */
}
- if (vsx_register_p (gdbarch, regno))
+ else if (vsx_register_p (gdbarch, regno))
{
if (have_ptrace_getsetvsxregs)
{
- fetch_vsx_register (regcache, tid, regno);
+ fetch_vsx_registers (regcache, tid, regno);
return;
}
}
@@ -578,11 +939,132 @@ fetch_register (struct regcache *regcache, int tid, int regno)
fetch_spe_register (regcache, tid, regno);
return;
}
+ else if (regno == PPC_DSCR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_dscr_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_DSCR,
+ PPC_LINUX_SIZEOF_DSCRREGSET,
+ &ppc32_linux_dscrregset);
+ return;
+ }
+ else if (regno == PPC_PPR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_ppr_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_PPR,
+ PPC_LINUX_SIZEOF_PPRREGSET,
+ &ppc32_linux_pprregset);
+ return;
+ }
+ else if (regno == PPC_TAR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_tar_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_TAR,
+ PPC_LINUX_SIZEOF_TARREGSET,
+ &ppc32_linux_tarregset);
+ return;
+ }
+ else if (PPC_IS_EBB_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_ebb);
+
+ fetch_regset (regcache, tid, NT_PPC_EBB,
+ PPC_LINUX_SIZEOF_EBBREGSET,
+ &ppc32_linux_ebbregset);
+ return;
+ }
+ else if (PPC_IS_PMU_REGNUM (regno))
+ {
+ gdb_assert (tdep->ppc_mmcr0_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_PMU,
+ PPC_LINUX_SIZEOF_PMUREGSET,
+ &ppc32_linux_pmuregset);
+ return;
+ }
+ else if (PPC_IS_TMSPR_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_spr);
+
+ fetch_regset (regcache, tid, NT_PPC_TM_SPR,
+ PPC_LINUX_SIZEOF_TM_SPRREGSET,
+ &ppc32_linux_tm_sprregset);
+ return;
+ }
+ else if (PPC_IS_CKPTGP_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_core);
+
+ const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch);
+ fetch_regset (regcache, tid, NT_PPC_TM_CGPR,
+ (tdep->wordsize == 4?
+ PPC32_LINUX_SIZEOF_CGPRREGSET
+ : PPC64_LINUX_SIZEOF_CGPRREGSET),
+ cgprregset);
+ return;
+ }
+ else if (PPC_IS_CKPTFP_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_fpu);
+
+ fetch_regset (regcache, tid, NT_PPC_TM_CFPR,
+ PPC_LINUX_SIZEOF_CFPRREGSET,
+ &ppc32_linux_cfprregset);
+ return;
+ }
+ else if (PPC_IS_CKPTVMX_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_altivec);
+
+ const struct regset *cvmxregset = ppc_linux_cvmxregset (gdbarch);
+ fetch_regset (regcache, tid, NT_PPC_TM_CVMX,
+ PPC_LINUX_SIZEOF_CVMXREGSET,
+ cvmxregset);
+ return;
+ }
+ else if (PPC_IS_CKPTVSX_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_vsx);
+
+ fetch_regset (regcache, tid, NT_PPC_TM_CVSX,
+ PPC_LINUX_SIZEOF_CVSXREGSET,
+ &ppc32_linux_cvsxregset);
+ return;
+ }
+ else if (regno == PPC_CPPR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_cppr_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_TM_CPPR,
+ PPC_LINUX_SIZEOF_CPPRREGSET,
+ &ppc32_linux_cpprregset);
+ return;
+ }
+ else if (regno == PPC_CDSCR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_cdscr_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_TM_CDSCR,
+ PPC_LINUX_SIZEOF_CDSCRREGSET,
+ &ppc32_linux_cdscrregset);
+ return;
+ }
+ else if (regno == PPC_CTAR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_ctar_regnum != -1);
+
+ fetch_regset (regcache, tid, NT_PPC_TM_CTAR,
+ PPC_LINUX_SIZEOF_CTARREGSET,
+ &ppc32_linux_ctarregset);
+ return;
+ }
if (regaddr == -1)
{
memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */
- regcache_raw_supply (regcache, regno, buf);
+ regcache->raw_supply (regno, buf);
return;
}
@@ -593,17 +1075,19 @@ fetch_register (struct regcache *regcache, int tid, int regno)
bytes_transferred < register_size (gdbarch, regno);
bytes_transferred += sizeof (long))
{
+ long l;
+
errno = 0;
- *(long *) &buf[bytes_transferred]
- = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0);
+ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0);
regaddr += sizeof (long);
if (errno != 0)
{
char message[128];
- sprintf (message, "reading register %s (#%d)",
- gdbarch_register_name (gdbarch, regno), regno);
+ xsnprintf (message, sizeof (message), "reading register %s (#%d)",
+ gdbarch_register_name (gdbarch, regno), regno);
perror_with_name (message);
}
+ memcpy (&buf[bytes_transferred], &l, sizeof (l));
}
/* Now supply the register. Keep in mind that the regcache's idea
@@ -613,14 +1097,14 @@ fetch_register (struct regcache *regcache, int tid, int regno)
{
/* Little-endian values are always found at the left end of the
bytes transferred. */
- regcache_raw_supply (regcache, regno, buf);
+ regcache->raw_supply (regno, buf);
}
else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
/* Big-endian values are found at the right end of the bytes
transferred. */
size_t padding = (bytes_transferred - register_size (gdbarch, regno));
- regcache_raw_supply (regcache, regno, buf + padding);
+ regcache->raw_supply (regno, buf + padding);
}
else
internal_error (__FILE__, __LINE__,
@@ -628,126 +1112,46 @@ fetch_register (struct regcache *regcache, int tid, int regno)
gdbarch_byte_order (gdbarch));
}
-static void
-supply_vsxregset (struct regcache *regcache, gdb_vsxregset_t *vsxregsetp)
+/* This function actually issues the request to ptrace, telling
+ it to get all general-purpose registers and put them into the
+ specified regset.
+
+ If the ptrace request does not exist, this function returns 0
+ and properly sets the have_ptrace_* flag. If the request fails,
+ this function calls perror_with_name. Otherwise, if the request
+ succeeds, then the regcache gets filled and 1 is returned. */
+static int
+fetch_all_gp_regs (struct regcache *regcache, int tid)
{
- int i;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int vsxregsize = register_size (gdbarch, tdep->ppc_vsr0_upper_regnum);
+ gdb_gregset_t gregset;
- for (i = 0; i < ppc_num_vshrs; i++)
+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
{
- regcache_raw_supply (regcache, tdep->ppc_vsr0_upper_regnum + i,
- *vsxregsetp + i * vsxregsize);
+ if (errno == EIO)
+ {
+ have_ptrace_getsetregs = 0;
+ return 0;
+ }
+ perror_with_name (_("Couldn't get general-purpose registers."));
}
+
+ supply_gregset (regcache, (const gdb_gregset_t *) &gregset);
+
+ return 1;
}
+/* This is a wrapper for the fetch_all_gp_regs function. It is
+ responsible for verifying if this target has the ptrace request
+ that can be used to fetch all general-purpose registers at one
+ shot. If it doesn't, then we should fetch them using the
+ old-fashioned way, which is to iterate over the registers and
+ request them one by one. */
static void
-supply_vrregset (struct regcache *regcache, gdb_vrregset_t *vrregsetp)
+fetch_gp_regs (struct regcache *regcache, int tid)
{
- int i;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
- int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
- int offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
- for (i = 0; i < num_of_vrregs; i++)
- {
- /* The last 2 registers of this set are only 32 bit long, not
- 128. However an offset is necessary only for VSCR because it
- occupies a whole vector, while VRSAVE occupies a full 4 bytes
- slot. */
- if (i == (num_of_vrregs - 2))
- regcache_raw_supply (regcache, tdep->ppc_vr0_regnum + i,
- *vrregsetp + i * vrregsize + offset);
- else
- regcache_raw_supply (regcache, tdep->ppc_vr0_regnum + i,
- *vrregsetp + i * vrregsize);
- }
-}
-
-static void
-fetch_vsx_registers (struct regcache *regcache, int tid)
-{
- int ret;
- gdb_vsxregset_t regs;
-
- ret = ptrace (PTRACE_GETVSXREGS, tid, 0, ®s);
- if (ret < 0)
- {
- if (errno == EIO)
- {
- have_ptrace_getsetvsxregs = 0;
- return;
- }
- perror_with_name (_("Unable to fetch VSX registers"));
- }
- supply_vsxregset (regcache, ®s);
-}
-
-static void
-fetch_altivec_registers (struct regcache *regcache, int tid)
-{
- int ret;
- gdb_vrregset_t regs;
-
- ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
- if (ret < 0)
- {
- if (errno == EIO)
- {
- have_ptrace_getvrregs = 0;
- return;
- }
- perror_with_name (_("Unable to fetch AltiVec registers"));
- }
- supply_vrregset (regcache, ®s);
-}
-
-/* This function actually issues the request to ptrace, telling
- it to get all general-purpose registers and put them into the
- specified regset.
-
- If the ptrace request does not exist, this function returns 0
- and properly sets the have_ptrace_* flag. If the request fails,
- this function calls perror_with_name. Otherwise, if the request
- succeeds, then the regcache gets filled and 1 is returned. */
-static int
-fetch_all_gp_regs (struct regcache *regcache, int tid)
-{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- gdb_gregset_t gregset;
-
- if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
- {
- if (errno == EIO)
- {
- have_ptrace_getsetregs = 0;
- return 0;
- }
- perror_with_name (_("Couldn't get general-purpose registers."));
- }
-
- supply_gregset (regcache, (const gdb_gregset_t *) &gregset);
-
- return 1;
-}
-
-/* This is a wrapper for the fetch_all_gp_regs function. It is
- responsible for verifying if this target has the ptrace request
- that can be used to fetch all general-purpose registers at one
- shot. If it doesn't, then we should fetch them using the
- old-fashioned way, which is to iterate over the registers and
- request them one by one. */
-static void
-fetch_gp_regs (struct regcache *regcache, int tid)
-{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int i;
+ int i;
if (have_ptrace_getsetregs)
if (fetch_all_gp_regs (regcache, tid))
@@ -797,7 +1201,7 @@ fetch_all_fp_regs (struct regcache *regcache, int tid)
static void
fetch_fp_regs (struct regcache *regcache, int tid)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int i;
@@ -815,8 +1219,7 @@ fetch_fp_regs (struct regcache *regcache, int tid)
static void
fetch_ppc_registers (struct regcache *regcache, int tid)
{
- int i;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fetch_gp_regs (regcache, tid);
@@ -844,27 +1247,81 @@ fetch_ppc_registers (struct regcache *regcache, int tid)
fetch_register (regcache, tid, tdep->ppc_fpscr_regnum);
if (have_ptrace_getvrregs)
if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
- fetch_altivec_registers (regcache, tid);
+ fetch_altivec_registers (regcache, tid, -1);
if (have_ptrace_getsetvsxregs)
if (tdep->ppc_vsr0_upper_regnum != -1)
- fetch_vsx_registers (regcache, tid);
+ fetch_vsx_registers (regcache, tid, -1);
if (tdep->ppc_ev0_upper_regnum >= 0)
fetch_spe_register (regcache, tid, -1);
+ if (tdep->ppc_ppr_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_PPR,
+ PPC_LINUX_SIZEOF_PPRREGSET,
+ &ppc32_linux_pprregset);
+ if (tdep->ppc_dscr_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_DSCR,
+ PPC_LINUX_SIZEOF_DSCRREGSET,
+ &ppc32_linux_dscrregset);
+ if (tdep->ppc_tar_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_TAR,
+ PPC_LINUX_SIZEOF_TARREGSET,
+ &ppc32_linux_tarregset);
+ if (tdep->have_ebb)
+ fetch_regset (regcache, tid, NT_PPC_EBB,
+ PPC_LINUX_SIZEOF_EBBREGSET,
+ &ppc32_linux_ebbregset);
+ if (tdep->ppc_mmcr0_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_PMU,
+ PPC_LINUX_SIZEOF_PMUREGSET,
+ &ppc32_linux_pmuregset);
+ if (tdep->have_htm_spr)
+ fetch_regset (regcache, tid, NT_PPC_TM_SPR,
+ PPC_LINUX_SIZEOF_TM_SPRREGSET,
+ &ppc32_linux_tm_sprregset);
+ if (tdep->have_htm_core)
+ {
+ const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch);
+ fetch_regset (regcache, tid, NT_PPC_TM_CGPR,
+ (tdep->wordsize == 4?
+ PPC32_LINUX_SIZEOF_CGPRREGSET
+ : PPC64_LINUX_SIZEOF_CGPRREGSET),
+ cgprregset);
+ }
+ if (tdep->have_htm_fpu)
+ fetch_regset (regcache, tid, NT_PPC_TM_CFPR,
+ PPC_LINUX_SIZEOF_CFPRREGSET,
+ &ppc32_linux_cfprregset);
+ if (tdep->have_htm_altivec)
+ {
+ const struct regset *cvmxregset = ppc_linux_cvmxregset (gdbarch);
+ fetch_regset (regcache, tid, NT_PPC_TM_CVMX,
+ PPC_LINUX_SIZEOF_CVMXREGSET,
+ cvmxregset);
+ }
+ if (tdep->have_htm_vsx)
+ fetch_regset (regcache, tid, NT_PPC_TM_CVSX,
+ PPC_LINUX_SIZEOF_CVSXREGSET,
+ &ppc32_linux_cvsxregset);
+ if (tdep->ppc_cppr_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_TM_CPPR,
+ PPC_LINUX_SIZEOF_CPPRREGSET,
+ &ppc32_linux_cpprregset);
+ if (tdep->ppc_cdscr_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_TM_CDSCR,
+ PPC_LINUX_SIZEOF_CDSCRREGSET,
+ &ppc32_linux_cdscrregset);
+ if (tdep->ppc_ctar_regnum != -1)
+ fetch_regset (regcache, tid, NT_PPC_TM_CTAR,
+ PPC_LINUX_SIZEOF_CTARREGSET,
+ &ppc32_linux_ctarregset);
}
/* Fetch registers from the child process. Fetch all registers if
regno == -1, otherwise fetch all general registers or all floating
point registers depending upon the value of regno. */
-static void
-ppc_linux_fetch_inferior_registers (struct target_ops *ops,
- struct regcache *regcache, int regno)
+void
+ppc_linux_nat_target::fetch_registers (struct regcache *regcache, int regno)
{
- /* Overload thread id onto process id. */
- int tid = TIDGET (inferior_ptid);
-
- /* No thread id, just use process id. */
- if (tid == 0)
- tid = PIDGET (inferior_ptid);
+ pid_t tid = get_ptrace_pid (regcache->ptid ());
if (regno == -1)
fetch_ppc_registers (regcache, tid);
@@ -872,15 +1329,12 @@ ppc_linux_fetch_inferior_registers (struct target_ops *ops,
fetch_register (regcache, tid, regno);
}
-/* Store one VSX register. */
static void
-store_vsx_register (const struct regcache *regcache, int tid, int regno)
+store_vsx_registers (const struct regcache *regcache, int tid, int regno)
{
int ret;
gdb_vsxregset_t regs;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int vsxregsize = register_size (gdbarch, tdep->ppc_vsr0_upper_regnum);
+ const struct regset *vsxregset = ppc_linux_vsxregset ();
ret = ptrace (PTRACE_GETVSXREGS, tid, 0, ®s);
if (ret < 0)
@@ -890,27 +1344,25 @@ store_vsx_register (const struct regcache *regcache, int tid, int regno)
have_ptrace_getsetvsxregs = 0;
return;
}
- perror_with_name (_("Unable to fetch VSX register"));
+ perror_with_name (_("Unable to fetch VSX registers"));
}
- regcache_raw_collect (regcache, regno, regs +
- (regno - tdep->ppc_vsr0_upper_regnum) * vsxregsize);
+ vsxregset->collect_regset (vsxregset, regcache, regno, ®s,
+ PPC_LINUX_SIZEOF_VSXREGSET);
ret = ptrace (PTRACE_SETVSXREGS, tid, 0, ®s);
if (ret < 0)
- perror_with_name (_("Unable to store VSX register"));
+ perror_with_name (_("Unable to store VSX registers"));
}
-/* Store one register. */
static void
-store_altivec_register (const struct regcache *regcache, int tid, int regno)
+store_altivec_registers (const struct regcache *regcache, int tid,
+ int regno)
{
int ret;
- int offset = 0;
gdb_vrregset_t regs;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
+ struct gdbarch *gdbarch = regcache->arch ();
+ const struct regset *vrregset = ppc_linux_vrregset (gdbarch);
ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
if (ret < 0)
@@ -920,24 +1372,18 @@ store_altivec_register (const struct regcache *regcache, int tid, int regno)
have_ptrace_getvrregs = 0;
return;
}
- perror_with_name (_("Unable to fetch AltiVec register"));
+ perror_with_name (_("Unable to fetch AltiVec registers"));
}
- /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
- long on the hardware. */
- if (regno == (tdep->ppc_vrsave_regnum - 1))
- offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
- regcache_raw_collect (regcache, regno,
- regs + (regno
- - tdep->ppc_vr0_regnum) * vrregsize + offset);
+ vrregset->collect_regset (vrregset, regcache, regno, ®s,
+ PPC_LINUX_SIZEOF_VRREGSET);
ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
if (ret < 0)
- perror_with_name (_("Unable to store AltiVec register"));
+ perror_with_name (_("Unable to store AltiVec registers"));
}
-/* Assuming TID referrs to an SPE process, set the top halves of TID's
+/* Assuming TID refers to an SPE process, set the top halves of TID's
general-purpose registers and its SPE-specific registers to the
values in EVRREGSET. If we don't support PTRACE_SETEVRREGS, do
nothing.
@@ -972,7 +1418,7 @@ set_spe_registers (int tid, struct gdb_evrregset_t *evrregset)
static void
store_spe_register (const struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
struct gdb_evrregset_t evrregs;
@@ -999,26 +1445,23 @@ store_spe_register (const struct regcache *regcache, int tid, int regno)
int i;
for (i = 0; i < ppc_num_gprs; i++)
- regcache_raw_collect (regcache,
- tdep->ppc_ev0_upper_regnum + i,
- &evrregs.evr[i]);
+ regcache->raw_collect (tdep->ppc_ev0_upper_regnum + i,
+ &evrregs.evr[i]);
}
else if (tdep->ppc_ev0_upper_regnum <= regno
&& regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs)
- regcache_raw_collect (regcache, regno,
- &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]);
+ regcache->raw_collect (regno,
+ &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]);
if (regno == -1
|| regno == tdep->ppc_acc_regnum)
- regcache_raw_collect (regcache,
- tdep->ppc_acc_regnum,
- &evrregs.acc);
+ regcache->raw_collect (tdep->ppc_acc_regnum,
+ &evrregs.acc);
if (regno == -1
|| regno == tdep->ppc_spefscr_regnum)
- regcache_raw_collect (regcache,
- tdep->ppc_spefscr_regnum,
- &evrregs.spefscr);
+ regcache->raw_collect (tdep->ppc_spefscr_regnum,
+ &evrregs.spefscr);
/* Write back the modified register set. */
set_spe_registers (tid, &evrregs);
@@ -1027,22 +1470,22 @@ store_spe_register (const struct regcache *regcache, int tid, int regno)
static void
store_register (const struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* This isn't really an address. But ptrace thinks of it as one. */
CORE_ADDR regaddr = ppc_register_u_addr (gdbarch, regno);
int i;
size_t bytes_to_transfer;
- char buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[PPC_MAX_REGISTER_SIZE];
if (altivec_register_p (gdbarch, regno))
{
- store_altivec_register (regcache, tid, regno);
+ store_altivec_registers (regcache, tid, regno);
return;
}
- if (vsx_register_p (gdbarch, regno))
+ else if (vsx_register_p (gdbarch, regno))
{
- store_vsx_register (regcache, tid, regno);
+ store_vsx_registers (regcache, tid, regno);
return;
}
else if (spe_register_p (gdbarch, regno))
@@ -1050,6 +1493,127 @@ store_register (const struct regcache *regcache, int tid, int regno)
store_spe_register (regcache, tid, regno);
return;
}
+ else if (regno == PPC_DSCR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_dscr_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_DSCR,
+ PPC_LINUX_SIZEOF_DSCRREGSET,
+ &ppc32_linux_dscrregset);
+ return;
+ }
+ else if (regno == PPC_PPR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_ppr_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_PPR,
+ PPC_LINUX_SIZEOF_PPRREGSET,
+ &ppc32_linux_pprregset);
+ return;
+ }
+ else if (regno == PPC_TAR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_tar_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_TAR,
+ PPC_LINUX_SIZEOF_TARREGSET,
+ &ppc32_linux_tarregset);
+ return;
+ }
+ else if (PPC_IS_EBB_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_ebb);
+
+ store_regset (regcache, tid, regno, NT_PPC_EBB,
+ PPC_LINUX_SIZEOF_EBBREGSET,
+ &ppc32_linux_ebbregset);
+ return;
+ }
+ else if (PPC_IS_PMU_REGNUM (regno))
+ {
+ gdb_assert (tdep->ppc_mmcr0_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_PMU,
+ PPC_LINUX_SIZEOF_PMUREGSET,
+ &ppc32_linux_pmuregset);
+ return;
+ }
+ else if (PPC_IS_TMSPR_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_spr);
+
+ store_regset (regcache, tid, regno, NT_PPC_TM_SPR,
+ PPC_LINUX_SIZEOF_TM_SPRREGSET,
+ &ppc32_linux_tm_sprregset);
+ return;
+ }
+ else if (PPC_IS_CKPTGP_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_core);
+
+ const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch);
+ store_regset (regcache, tid, regno, NT_PPC_TM_CGPR,
+ (tdep->wordsize == 4?
+ PPC32_LINUX_SIZEOF_CGPRREGSET
+ : PPC64_LINUX_SIZEOF_CGPRREGSET),
+ cgprregset);
+ return;
+ }
+ else if (PPC_IS_CKPTFP_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_fpu);
+
+ store_regset (regcache, tid, regno, NT_PPC_TM_CFPR,
+ PPC_LINUX_SIZEOF_CFPRREGSET,
+ &ppc32_linux_cfprregset);
+ return;
+ }
+ else if (PPC_IS_CKPTVMX_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_altivec);
+
+ const struct regset *cvmxregset = ppc_linux_cvmxregset (gdbarch);
+ store_regset (regcache, tid, regno, NT_PPC_TM_CVMX,
+ PPC_LINUX_SIZEOF_CVMXREGSET,
+ cvmxregset);
+ return;
+ }
+ else if (PPC_IS_CKPTVSX_REGNUM (regno))
+ {
+ gdb_assert (tdep->have_htm_vsx);
+
+ store_regset (regcache, tid, regno, NT_PPC_TM_CVSX,
+ PPC_LINUX_SIZEOF_CVSXREGSET,
+ &ppc32_linux_cvsxregset);
+ return;
+ }
+ else if (regno == PPC_CPPR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_cppr_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_TM_CPPR,
+ PPC_LINUX_SIZEOF_CPPRREGSET,
+ &ppc32_linux_cpprregset);
+ return;
+ }
+ else if (regno == PPC_CDSCR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_cdscr_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_TM_CDSCR,
+ PPC_LINUX_SIZEOF_CDSCRREGSET,
+ &ppc32_linux_cdscrregset);
+ return;
+ }
+ else if (regno == PPC_CTAR_REGNUM)
+ {
+ gdb_assert (tdep->ppc_ctar_regnum != -1);
+
+ store_regset (regcache, tid, regno, NT_PPC_TM_CTAR,
+ PPC_LINUX_SIZEOF_CTARREGSET,
+ &ppc32_linux_ctarregset);
+ return;
+ }
if (regaddr == -1)
return;
@@ -1062,20 +1626,22 @@ store_register (const struct regcache *regcache, int tid, int regno)
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
{
/* Little-endian values always sit at the left end of the buffer. */
- regcache_raw_collect (regcache, regno, buf);
+ regcache->raw_collect (regno, buf);
}
else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
/* Big-endian values sit at the right end of the buffer. */
size_t padding = (bytes_to_transfer - register_size (gdbarch, regno));
- regcache_raw_collect (regcache, regno, buf + padding);
+ regcache->raw_collect (regno, buf + padding);
}
for (i = 0; i < bytes_to_transfer; i += sizeof (long))
{
+ long l;
+
+ memcpy (&l, &buf[i], sizeof (l));
errno = 0;
- ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr,
- *(long *) &buf[i]);
+ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l);
regaddr += sizeof (long);
if (errno == EIO
@@ -1091,95 +1657,13 @@ store_register (const struct regcache *regcache, int tid, int regno)
if (errno != 0)
{
char message[128];
- sprintf (message, "writing register %s (#%d)",
- gdbarch_register_name (gdbarch, regno), regno);
+ xsnprintf (message, sizeof (message), "writing register %s (#%d)",
+ gdbarch_register_name (gdbarch, regno), regno);
perror_with_name (message);
}
}
}
-static void
-fill_vsxregset (const struct regcache *regcache, gdb_vsxregset_t *vsxregsetp)
-{
- int i;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int vsxregsize = register_size (gdbarch, tdep->ppc_vsr0_upper_regnum);
-
- for (i = 0; i < ppc_num_vshrs; i++)
- regcache_raw_collect (regcache, tdep->ppc_vsr0_upper_regnum + i,
- *vsxregsetp + i * vsxregsize);
-}
-
-static void
-fill_vrregset (const struct regcache *regcache, gdb_vrregset_t *vrregsetp)
-{
- int i;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
- int vrregsize = register_size (gdbarch, tdep->ppc_vr0_regnum);
- int offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
-
- for (i = 0; i < num_of_vrregs; i++)
- {
- /* The last 2 registers of this set are only 32 bit long, not
- 128, but only VSCR is fetched as a 16 bytes quantity. */
- if (i == (num_of_vrregs - 2))
- regcache_raw_collect (regcache, tdep->ppc_vr0_regnum + i,
- *vrregsetp + i * vrregsize + offset);
- else
- regcache_raw_collect (regcache, tdep->ppc_vr0_regnum + i,
- *vrregsetp + i * vrregsize);
- }
-}
-
-static void
-store_vsx_registers (const struct regcache *regcache, int tid)
-{
- int ret;
- gdb_vsxregset_t regs;
-
- ret = ptrace (PTRACE_GETVSXREGS, tid, 0, ®s);
- if (ret < 0)
- {
- if (errno == EIO)
- {
- have_ptrace_getsetvsxregs = 0;
- return;
- }
- perror_with_name (_("Couldn't get VSX registers"));
- }
-
- fill_vsxregset (regcache, ®s);
-
- if (ptrace (PTRACE_SETVSXREGS, tid, 0, ®s) < 0)
- perror_with_name (_("Couldn't write VSX registers"));
-}
-
-static void
-store_altivec_registers (const struct regcache *regcache, int tid)
-{
- int ret;
- gdb_vrregset_t regs;
-
- ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s);
- if (ret < 0)
- {
- if (errno == EIO)
- {
- have_ptrace_getvrregs = 0;
- return;
- }
- perror_with_name (_("Couldn't get AltiVec registers"));
- }
-
- fill_vrregset (regcache, ®s);
-
- if (ptrace (PTRACE_SETVRREGS, tid, 0, ®s) < 0)
- perror_with_name (_("Couldn't write AltiVec registers"));
-}
-
/* This function actually issues the request to ptrace, telling
it to store all general-purpose registers present in the specified
regset.
@@ -1191,8 +1675,6 @@ store_altivec_registers (const struct regcache *regcache, int tid)
static int
store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
gdb_gregset_t gregset;
if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
@@ -1229,7 +1711,7 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
static void
store_gp_regs (const struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int i;
@@ -1291,7 +1773,7 @@ store_all_fp_regs (const struct regcache *regcache, int tid, int regno)
static void
store_fp_regs (const struct regcache *regcache, int tid, int regno)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int i;
@@ -1309,8 +1791,7 @@ store_fp_regs (const struct regcache *regcache, int tid, int regno)
static void
store_ppc_registers (const struct regcache *regcache, int tid)
{
- int i;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
store_gp_regs (regcache, tid, -1);
@@ -1338,117 +1819,248 @@ store_ppc_registers (const struct regcache *regcache, int tid)
}
if (have_ptrace_getvrregs)
if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
- store_altivec_registers (regcache, tid);
+ store_altivec_registers (regcache, tid, -1);
if (have_ptrace_getsetvsxregs)
if (tdep->ppc_vsr0_upper_regnum != -1)
- store_vsx_registers (regcache, tid);
+ store_vsx_registers (regcache, tid, -1);
if (tdep->ppc_ev0_upper_regnum >= 0)
store_spe_register (regcache, tid, -1);
+ if (tdep->ppc_ppr_regnum != -1)
+ store_regset (regcache, tid, -1, NT_PPC_PPR,
+ PPC_LINUX_SIZEOF_PPRREGSET,
+ &ppc32_linux_pprregset);
+ if (tdep->ppc_dscr_regnum != -1)
+ store_regset (regcache, tid, -1, NT_PPC_DSCR,
+ PPC_LINUX_SIZEOF_DSCRREGSET,
+ &ppc32_linux_dscrregset);
+ if (tdep->ppc_tar_regnum != -1)
+ store_regset (regcache, tid, -1, NT_PPC_TAR,
+ PPC_LINUX_SIZEOF_TARREGSET,
+ &ppc32_linux_tarregset);
+
+ if (tdep->ppc_mmcr0_regnum != -1)
+ store_regset (regcache, tid, -1, NT_PPC_PMU,
+ PPC_LINUX_SIZEOF_PMUREGSET,
+ &ppc32_linux_pmuregset);
+
+ if (tdep->have_htm_spr)
+ store_regset (regcache, tid, -1, NT_PPC_TM_SPR,
+ PPC_LINUX_SIZEOF_TM_SPRREGSET,
+ &ppc32_linux_tm_sprregset);
+
+ /* Because the EBB and checkpointed HTM registers can be
+ unavailable, attempts to store them here would cause this
+ function to fail most of the time, so we ignore them. */
}
-/* Fetch the AT_HWCAP entry from the aux vector. */
-unsigned long ppc_linux_get_hwcap (void)
+void
+ppc_linux_nat_target::store_registers (struct regcache *regcache, int regno)
{
- CORE_ADDR field;
+ pid_t tid = get_ptrace_pid (regcache->ptid ());
- if (target_auxv_search (¤t_target, AT_HWCAP, &field))
- return (unsigned long) field;
+ if (regno >= 0)
+ store_register (regcache, tid, regno);
+ else
+ store_ppc_registers (regcache, tid);
+}
- return 0;
+/* Functions for transferring registers between a gregset_t or fpregset_t
+ (see sys/ucontext.h) and gdb's regcache. The word size is that used
+ by the ptrace interface, not the current program's ABI. Eg. if a
+ powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
+ read or write 64-bit gregsets. This is to suit the host libthread_db. */
+
+void
+supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
+{
+ const struct regset *regset = ppc_linux_gregset (sizeof (long));
+
+ ppc_supply_gregset (regset, regcache, -1, gregsetp, sizeof (*gregsetp));
}
-/* The cached DABR value, to install in new threads.
- This variable is used when we are dealing with non-BookE
- processors. */
-static long saved_dabr_value;
+void
+fill_gregset (const struct regcache *regcache,
+ gdb_gregset_t *gregsetp, int regno)
+{
+ const struct regset *regset = ppc_linux_gregset (sizeof (long));
-/* Global structure that will store information about the available
- features on this BookE processor. */
-static struct ppc_debug_info booke_debug_info;
+ if (regno == -1)
+ memset (gregsetp, 0, sizeof (*gregsetp));
+ ppc_collect_gregset (regset, regcache, regno, gregsetp, sizeof (*gregsetp));
+}
-/* Global variable that holds the maximum number of slots that the
- kernel will use. This is only used when the processor is BookE. */
-static size_t max_slots_number = 0;
+void
+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t * fpregsetp)
+{
+ const struct regset *regset = ppc_linux_fpregset ();
-struct hw_break_tuple
+ ppc_supply_fpregset (regset, regcache, -1,
+ fpregsetp, sizeof (*fpregsetp));
+}
+
+void
+fill_fpregset (const struct regcache *regcache,
+ gdb_fpregset_t *fpregsetp, int regno)
{
- long slot;
- struct ppc_hw_breakpoint *hw_break;
-};
+ const struct regset *regset = ppc_linux_fpregset ();
-/* This is an internal VEC created to store information about *points inserted
- for each thread. This is used for BookE processors. */
-typedef struct thread_points
- {
- /* The TID to which this *point relates. */
- int tid;
- /* Information about the *point, such as its address, type, etc.
-
- Each element inside this vector corresponds to a hardware
- breakpoint or watchpoint in the thread represented by TID. The maximum
- size of these vector is MAX_SLOTS_NUMBER. If the hw_break element of
- the tuple is NULL, then the position in the vector is free. */
- struct hw_break_tuple *hw_breaks;
- } *thread_points_p;
-DEF_VEC_P (thread_points_p);
-
-VEC(thread_points_p) *ppc_threads = NULL;
-
-/* The version of the kernel interface that we will use if the processor is
- BookE. */
-#define PPC_DEBUG_CURRENT_VERSION 1
+ ppc_collect_fpregset (regset, regcache, regno,
+ fpregsetp, sizeof (*fpregsetp));
+}
-/* Returns non-zero if we support the ptrace interface which enables
- booke debugging resources. */
-static int
-have_ptrace_booke_interface (void)
+int
+ppc_linux_nat_target::auxv_parse (gdb_byte **readptr,
+ gdb_byte *endptr, CORE_ADDR *typep,
+ CORE_ADDR *valp)
{
- static int have_ptrace_booke_interface = -1;
+ int tid = inferior_ptid.lwp ();
+ if (tid == 0)
+ tid = inferior_ptid.pid ();
+
+ int sizeof_auxv_field = ppc_linux_target_wordsize (tid);
- if (have_ptrace_booke_interface == -1)
+ enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+ gdb_byte *ptr = *readptr;
+
+ if (endptr == ptr)
+ return 0;
+
+ if (endptr - ptr < sizeof_auxv_field * 2)
+ return -1;
+
+ *typep = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order);
+ ptr += sizeof_auxv_field;
+ *valp = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order);
+ ptr += sizeof_auxv_field;
+
+ *readptr = ptr;
+ return 1;
+}
+
+const struct target_desc *
+ppc_linux_nat_target::read_description ()
+{
+ int tid = inferior_ptid.lwp ();
+ if (tid == 0)
+ tid = inferior_ptid.pid ();
+
+ if (have_ptrace_getsetevrregs)
{
- int tid;
+ struct gdb_evrregset_t evrregset;
- tid = TIDGET (inferior_ptid);
- if (tid == 0)
- tid = PIDGET (inferior_ptid);
+ if (ptrace (PTRACE_GETEVRREGS, tid, 0, &evrregset) >= 0)
+ return tdesc_powerpc_e500l;
- /* Check for kernel support for BOOKE debug registers. */
- if (ptrace (PPC_PTRACE_GETHWDBGINFO, tid, 0, &booke_debug_info) >= 0)
- {
- have_ptrace_booke_interface = 1;
- max_slots_number = booke_debug_info.num_instruction_bps
- + booke_debug_info.num_data_bps
- + booke_debug_info.num_condition_regs;
- }
- else
+ /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
+ Anything else needs to be reported. */
+ else if (errno != EIO)
+ perror_with_name (_("Unable to fetch SPE registers"));
+ }
+
+ struct ppc_linux_features features = ppc_linux_no_features;
+
+ features.wordsize = ppc_linux_target_wordsize (tid);
+
+ CORE_ADDR hwcap = linux_get_hwcap (current_top_target ());
+ CORE_ADDR hwcap2 = linux_get_hwcap2 (current_top_target ());
+
+ if (have_ptrace_getsetvsxregs
+ && (hwcap & PPC_FEATURE_HAS_VSX))
+ {
+ gdb_vsxregset_t vsxregset;
+
+ if (ptrace (PTRACE_GETVSXREGS, tid, 0, &vsxregset) >= 0)
+ features.vsx = true;
+
+ /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
+ Anything else needs to be reported. */
+ else if (errno != EIO)
+ perror_with_name (_("Unable to fetch VSX registers"));
+ }
+
+ if (have_ptrace_getvrregs
+ && (hwcap & PPC_FEATURE_HAS_ALTIVEC))
+ {
+ gdb_vrregset_t vrregset;
+
+ if (ptrace (PTRACE_GETVRREGS, tid, 0, &vrregset) >= 0)
+ features.altivec = true;
+
+ /* EIO means that the PTRACE_GETVRREGS request isn't supported.
+ Anything else needs to be reported. */
+ else if (errno != EIO)
+ perror_with_name (_("Unable to fetch AltiVec registers"));
+ }
+
+ features.isa205 = ppc_linux_has_isa205 (hwcap);
+
+ if ((hwcap2 & PPC_FEATURE2_DSCR)
+ && check_regset (tid, NT_PPC_PPR, PPC_LINUX_SIZEOF_PPRREGSET)
+ && check_regset (tid, NT_PPC_DSCR, PPC_LINUX_SIZEOF_DSCRREGSET))
+ {
+ features.ppr_dscr = true;
+ if ((hwcap2 & PPC_FEATURE2_ARCH_2_07)
+ && (hwcap2 & PPC_FEATURE2_TAR)
+ && (hwcap2 & PPC_FEATURE2_EBB)
+ && check_regset (tid, NT_PPC_TAR, PPC_LINUX_SIZEOF_TARREGSET)
+ && check_regset (tid, NT_PPC_EBB, PPC_LINUX_SIZEOF_EBBREGSET)
+ && check_regset (tid, NT_PPC_PMU, PPC_LINUX_SIZEOF_PMUREGSET))
{
- /* Old school interface and no BOOKE debug registers support. */
- have_ptrace_booke_interface = 0;
- memset (&booke_debug_info, 0, sizeof (struct ppc_debug_info));
+ features.isa207 = true;
+ if ((hwcap2 & PPC_FEATURE2_HTM)
+ && check_regset (tid, NT_PPC_TM_SPR,
+ PPC_LINUX_SIZEOF_TM_SPRREGSET))
+ features.htm = true;
}
}
- return have_ptrace_booke_interface;
+ return ppc_linux_match_description (features);
}
-static int
-ppc_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
+/* Routines for installing hardware watchpoints and breakpoints. When
+ GDB requests a hardware watchpoint or breakpoint to be installed, we
+ register the request for the pid of inferior_ptid in a map with one
+ entry per process. We then issue a stop request to all the threads of
+ this process, and mark a per-thread flag indicating that their debug
+ registers should be updated. Right before they are next resumed, we
+ remove all previously installed debug registers and install all the
+ ones GDB requested. We then update a map with one entry per thread
+ that keeps track of what debug registers were last installed in each
+ thread.
+
+ We use this second map to remove installed registers before installing
+ the ones requested by GDB, and to copy the debug register state after
+ a thread clones or forks, since depending on the kernel configuration,
+ debug registers can be inherited. */
+
+/* Check if we support and have enough resources to install a hardware
+ watchpoint or breakpoint. See the description in target.h. */
+
+int
+ppc_linux_nat_target::can_use_hw_breakpoint (enum bptype type, int cnt,
+ int ot)
{
int total_hw_wp, total_hw_bp;
- if (have_ptrace_booke_interface ())
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (m_dreg_interface.unavailable_p ())
+ return 0;
+
+ if (m_dreg_interface.hwdebug_p ())
{
- /* For PPC BookE processors, the number of available hardware
- watchpoints and breakpoints is stored at the booke_debug_info
- struct. */
- total_hw_bp = booke_debug_info.num_instruction_bps;
- total_hw_wp = booke_debug_info.num_data_bps;
+ /* When PowerPC HWDEBUG ptrace interface is available, the number of
+ available hardware watchpoints and breakpoints is stored at the
+ hwdebug_info struct. */
+ total_hw_bp = m_dreg_interface.hwdebug_info ().num_instruction_bps;
+ total_hw_wp = m_dreg_interface.hwdebug_info ().num_data_bps;
}
else
{
- /* For PPC server processors, we accept 1 hardware watchpoint and 0
- hardware breakpoints. */
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ /* With the DEBUGREG ptrace interface, we should consider having 1
+ hardware watchpoint and no hardware breakpoints. */
total_hw_bp = 0;
total_hw_wp = 1;
}
@@ -1456,213 +2068,137 @@ ppc_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
|| type == bp_access_watchpoint || type == bp_watchpoint)
{
- if (cnt > total_hw_wp)
+ if (total_hw_wp == 0)
+ return 0;
+ else if (cnt + ot > total_hw_wp)
return -1;
+ else
+ return 1;
}
else if (type == bp_hardware_breakpoint)
{
- if (cnt > total_hw_bp)
- return -1;
- }
-
- if (!have_ptrace_booke_interface ())
- {
- int tid;
- ptid_t ptid = inferior_ptid;
-
- /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
- and whether the target has DABR. If either answer is no, the
- ptrace call will return -1. Fail in that case. */
- tid = TIDGET (ptid);
- if (tid == 0)
- tid = PIDGET (ptid);
-
- if (ptrace (PTRACE_SET_DEBUGREG, tid, 0, 0) == -1)
+ if (total_hw_bp == 0)
return 0;
+ else if (cnt > total_hw_bp)
+ return -1;
+ else
+ return 1;
}
- return 1;
+ return 0;
}
-static int
-ppc_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
+/* Returns 1 if we can watch LEN bytes at address ADDR, 0 otherwise. */
+
+int
+ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
{
/* Handle sub-8-byte quantities. */
if (len <= 0)
return 0;
- /* The new BookE ptrace interface tells if there are alignment restrictions
- for watchpoints in the processors. In that case, we use that information
- to determine the hardcoded watchable region for watchpoints. */
- if (have_ptrace_booke_interface ())
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (m_dreg_interface.unavailable_p ())
+ return 0;
+
+ /* The PowerPC HWDEBUG ptrace interface tells if there are alignment
+ restrictions for watchpoints in the processors. In that case, we use that
+ information to determine the hardcoded watchable region for
+ watchpoints. */
+ if (m_dreg_interface.hwdebug_p ())
{
- /* DAC-based processors (i.e., embedded processors), like the PowerPC 440
- have ranged watchpoints and can watch any access within an arbitrary
- memory region. This is useful to watch arrays and structs, for
- instance. It takes two hardware watchpoints though. */
+ int region_size;
+ const struct ppc_debug_info &hwdebug_info = (m_dreg_interface
+ .hwdebug_info ());
+
+ /* Embedded DAC-based processors, like the PowerPC 440 have ranged
+ watchpoints and can watch any access within an arbitrary memory
+ region. This is useful to watch arrays and structs, for instance. It
+ takes two hardware watchpoints though. */
if (len > 1
- && booke_debug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE)
+ && hwdebug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE
+ && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
return 2;
- else if (booke_debug_info.data_bp_alignment
- && (addr + len > (addr & ~(booke_debug_info.data_bp_alignment - 1))
- + booke_debug_info.data_bp_alignment))
+ /* Check if the processor provides DAWR interface. */
+ if (hwdebug_info.features & PPC_DEBUG_FEATURE_DATA_BP_DAWR)
+ /* DAWR interface allows to watch up to 512 byte wide ranges which
+ can't cross a 512 byte boundary. */
+ region_size = 512;
+ else
+ region_size = hwdebug_info.data_bp_alignment;
+ /* Server processors provide one hardware watchpoint and addr+len should
+ fall in the watchable region provided by the ptrace interface. */
+ if (region_size
+ && (addr + len > (addr & ~(region_size - 1)) + region_size))
return 0;
}
/* addr+len must fall in the 8 byte watchable region for DABR-based
- processors (i.e., server processors). Without the new BookE ptrace
- interface, DAC-based processors (i.e., embedded processors) will use
- addresses aligned to 4-bytes due to the way the read/write flags are
+ processors (i.e., server processors). Without the new PowerPC HWDEBUG
+ ptrace interface, DAC-based processors (i.e., embedded processors) will
+ use addresses aligned to 4-bytes due to the way the read/write flags are
passed in the old ptrace interface. */
- else if (((ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE)
- && (addr + len) > (addr & ~3) + 4)
- || (addr + len) > (addr & ~7) + 8)
- return 0;
-
- return 1;
-}
-
-/* This function compares two ppc_hw_breakpoint structs field-by-field. */
-static int
-booke_cmp_hw_point (struct ppc_hw_breakpoint *a, struct ppc_hw_breakpoint *b)
-{
- return (a->trigger_type == b->trigger_type
- && a->addr_mode == b->addr_mode
- && a->condition_mode == b->condition_mode
- && a->addr == b->addr
- && a->addr2 == b->addr2
- && a->condition_value == b->condition_value);
-}
-
-/* This function can be used to retrieve a thread_points by the TID of the
- related process/thread. If nothing has been found, and ALLOC_NEW is 0,
- it returns NULL. If ALLOC_NEW is non-zero, a new thread_points for the
- provided TID will be created and returned. */
-static struct thread_points *
-booke_find_thread_points_by_tid (int tid, int alloc_new)
-{
- int i;
- struct thread_points *t;
-
- for (i = 0; VEC_iterate (thread_points_p, ppc_threads, i, t); i++)
- if (t->tid == tid)
- return t;
-
- t = NULL;
-
- /* Do we need to allocate a new point_item
- if the wanted one does not exist? */
- if (alloc_new)
+ else
{
- t = xmalloc (sizeof (struct thread_points));
- t->hw_breaks
- = xzalloc (max_slots_number * sizeof (struct hw_break_tuple));
- t->tid = tid;
- VEC_safe_push (thread_points_p, ppc_threads, t);
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ if (((linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
+ && (addr + len) > (addr & ~3) + 4)
+ || (addr + len) > (addr & ~7) + 8)
+ return 0;
}
- return t;
+ return 1;
}
-/* This function is a generic wrapper that is responsible for inserting a
- *point (i.e., calling `ptrace' in order to issue the request to the
- kernel) and registering it internally in GDB. */
-static void
-booke_insert_point (struct ppc_hw_breakpoint *b, int tid)
-{
- int i;
- long slot;
- struct ppc_hw_breakpoint *p = xmalloc (sizeof (struct ppc_hw_breakpoint));
- struct hw_break_tuple *hw_breaks;
- struct cleanup *c = make_cleanup (xfree, p);
- struct thread_points *t;
- struct hw_break_tuple *tuple;
-
- memcpy (p, b, sizeof (struct ppc_hw_breakpoint));
-
- errno = 0;
- slot = ptrace (PPC_PTRACE_SETHWDEBUG, tid, 0, p);
- if (slot < 0)
- perror_with_name (_("Unexpected error setting breakpoint or watchpoint"));
-
- /* Everything went fine, so we have to register this *point. */
- t = booke_find_thread_points_by_tid (tid, 1);
- gdb_assert (t != NULL);
- hw_breaks = t->hw_breaks;
-
- /* Find a free element in the hw_breaks vector. */
- for (i = 0; i < max_slots_number; i++)
- if (hw_breaks[i].hw_break == NULL)
- {
- hw_breaks[i].slot = slot;
- hw_breaks[i].hw_break = p;
- break;
- }
-
- gdb_assert (i != max_slots_number);
-
- discard_cleanups (c);
-}
+/* This function compares two ppc_hw_breakpoint structs
+ field-by-field. */
-/* This function is a generic wrapper that is responsible for removing a
- *point (i.e., calling `ptrace' in order to issue the request to the
- kernel), and unregistering it internally at GDB. */
-static void
-booke_remove_point (struct ppc_hw_breakpoint *b, int tid)
+bool
+ppc_linux_nat_target::hwdebug_point_cmp (const struct ppc_hw_breakpoint &a,
+ const struct ppc_hw_breakpoint &b)
{
- int i;
- struct hw_break_tuple *hw_breaks;
- struct thread_points *t;
-
- t = booke_find_thread_points_by_tid (tid, 0);
- gdb_assert (t != NULL);
- hw_breaks = t->hw_breaks;
-
- for (i = 0; i < max_slots_number; i++)
- if (hw_breaks[i].hw_break && booke_cmp_hw_point (hw_breaks[i].hw_break, b))
- break;
-
- gdb_assert (i != max_slots_number);
-
- /* We have to ignore ENOENT errors because the kernel implements hardware
- breakpoints/watchpoints as "one-shot", that is, they are automatically
- deleted when hit. */
- errno = 0;
- if (ptrace (PPC_PTRACE_DELHWDEBUG, tid, 0, hw_breaks[i].slot) < 0)
- if (errno != ENOENT)
- perror_with_name (_("Unexpected error deleting "
- "breakpoint or watchpoint"));
-
- xfree (hw_breaks[i].hw_break);
- hw_breaks[i].hw_break = NULL;
+ return (a.trigger_type == b.trigger_type
+ && a.addr_mode == b.addr_mode
+ && a.condition_mode == b.condition_mode
+ && a.addr == b.addr
+ && a.addr2 == b.addr2
+ && a.condition_value == b.condition_value);
}
/* Return the number of registers needed for a ranged breakpoint. */
-static int
-ppc_linux_ranged_break_num_registers (struct target_ops *target)
+int
+ppc_linux_nat_target::ranged_break_num_registers ()
{
- return ((have_ptrace_booke_interface ()
- && booke_debug_info.features & PPC_DEBUG_FEATURE_INSN_BP_RANGE)?
+ m_dreg_interface.detect (inferior_ptid);
+
+ return ((m_dreg_interface.hwdebug_p ()
+ && (m_dreg_interface.hwdebug_info ().features
+ & PPC_DEBUG_FEATURE_INSN_BP_RANGE))?
2 : -1);
}
-/* Insert the hardware breakpoint described by BP_TGT. Returns 0 for
- success, 1 if hardware breakpoints are not supported or -1 for failure. */
+/* Register the hardware breakpoint described by BP_TGT, to be inserted
+ when the threads of inferior_ptid are resumed. Returns 0 for success,
+ or -1 if the HWDEBUG interface that we need for hardware breakpoints
+ is not available. */
-static int
-ppc_linux_insert_hw_breakpoint (struct gdbarch *gdbarch,
- struct bp_target_info *bp_tgt)
+int
+ppc_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
- struct lwp_info *lp;
struct ppc_hw_breakpoint p;
- if (!have_ptrace_booke_interface ())
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (!m_dreg_interface.hwdebug_p ())
return -1;
p.version = PPC_DEBUG_CURRENT_VERSION;
p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE;
p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE;
- p.addr = (uint64_t) bp_tgt->placed_address;
+ p.addr = (uint64_t) (bp_tgt->placed_address = bp_tgt->reqstd_address);
p.condition_value = 0;
if (bp_tgt->length)
@@ -1679,20 +2215,25 @@ ppc_linux_insert_hw_breakpoint (struct gdbarch *gdbarch,
p.addr2 = 0;
}
- ALL_LWPS (lp)
- booke_insert_point (&p, TIDGET (lp->ptid));
+ register_hw_breakpoint (inferior_ptid.pid (), p);
return 0;
}
-static int
-ppc_linux_remove_hw_breakpoint (struct gdbarch *gdbarch,
- struct bp_target_info *bp_tgt)
+/* Clear a registration for the hardware breakpoint given by type BP_TGT.
+ It will be removed from the threads of inferior_ptid when they are
+ next resumed. Returns 0 for success, or -1 if the HWDEBUG interface
+ that we need for hardware breakpoints is not available. */
+
+int
+ppc_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
{
- struct lwp_info *lp;
struct ppc_hw_breakpoint p;
- if (!have_ptrace_booke_interface ())
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (!m_dreg_interface.hwdebug_p ())
return -1;
p.version = PPC_DEBUG_CURRENT_VERSION;
@@ -1715,20 +2256,22 @@ ppc_linux_remove_hw_breakpoint (struct gdbarch *gdbarch,
p.addr2 = 0;
}
- ALL_LWPS (lp)
- booke_remove_point (&p, TIDGET (lp->ptid));
+ clear_hw_breakpoint (inferior_ptid.pid (), p);
return 0;
}
-static int
-get_trigger_type (int rw)
+/* Return the trigger value to set in a ppc_hw_breakpoint object for a
+ given hardware watchpoint TYPE. We assume type is not hw_execute. */
+
+int
+ppc_linux_nat_target::get_trigger_type (enum target_hw_bp_type type)
{
int t;
- if (rw == hw_read)
+ if (type == hw_read)
t = PPC_BREAKPOINT_TRIGGER_READ;
- else if (rw == hw_write)
+ else if (type == hw_write)
t = PPC_BREAKPOINT_TRIGGER_WRITE;
else
t = PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE;
@@ -1736,19 +2279,18 @@ get_trigger_type (int rw)
return t;
}
-/* Insert a new masked watchpoint at ADDR using the mask MASK.
- RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
- or hw_access for an access watchpoint. Returns 0 on success and throws
- an error on failure. */
+/* Register a new masked watchpoint at ADDR using the mask MASK, to be
+ inserted when the threads of inferior_ptid are resumed. RW may be
+ hw_read for a read watchpoint, hw_write for a write watchpoint or
+ hw_access for an access watchpoint. */
-static int
-ppc_linux_insert_mask_watchpoint (struct target_ops *ops, CORE_ADDR addr,
- CORE_ADDR mask, int rw)
+int
+ppc_linux_nat_target::insert_mask_watchpoint (CORE_ADDR addr, CORE_ADDR mask,
+ target_hw_bp_type rw)
{
- struct lwp_info *lp;
struct ppc_hw_breakpoint p;
- gdb_assert (have_ptrace_booke_interface ());
+ gdb_assert (m_dreg_interface.hwdebug_p ());
p.version = PPC_DEBUG_CURRENT_VERSION;
p.trigger_type = get_trigger_type (rw);
@@ -1758,25 +2300,23 @@ ppc_linux_insert_mask_watchpoint (struct target_ops *ops, CORE_ADDR addr,
p.addr2 = mask;
p.condition_value = 0;
- ALL_LWPS (lp)
- booke_insert_point (&p, TIDGET (lp->ptid));
+ register_hw_breakpoint (inferior_ptid.pid (), p);
return 0;
}
-/* Remove a masked watchpoint at ADDR with the mask MASK.
- RW may be hw_read for a read watchpoint, hw_write for a write watchpoint
- or hw_access for an access watchpoint. Returns 0 on success and throws
- an error on failure. */
+/* Clear a registration for a masked watchpoint at ADDR with the mask
+ MASK. It will be removed from the threads of inferior_ptid when they
+ are next resumed. RW may be hw_read for a read watchpoint, hw_write
+ for a write watchpoint or hw_access for an access watchpoint. */
-static int
-ppc_linux_remove_mask_watchpoint (struct target_ops *ops, CORE_ADDR addr,
- CORE_ADDR mask, int rw)
+int
+ppc_linux_nat_target::remove_mask_watchpoint (CORE_ADDR addr, CORE_ADDR mask,
+ target_hw_bp_type rw)
{
- struct lwp_info *lp;
struct ppc_hw_breakpoint p;
- gdb_assert (have_ptrace_booke_interface ());
+ gdb_assert (m_dreg_interface.hwdebug_p ());
p.version = PPC_DEBUG_CURRENT_VERSION;
p.trigger_type = get_trigger_type (rw);
@@ -1786,40 +2326,42 @@ ppc_linux_remove_mask_watchpoint (struct target_ops *ops, CORE_ADDR addr,
p.addr2 = mask;
p.condition_value = 0;
- ALL_LWPS (lp)
- booke_remove_point (&p, TIDGET (lp->ptid));
+ clear_hw_breakpoint (inferior_ptid.pid (), p);
return 0;
}
-/* Check whether we have at least one free DVC register. */
-static int
-can_use_watchpoint_cond_accel (void)
+/* Check whether we have at least one free DVC register for the threads
+ of the pid of inferior_ptid. */
+
+bool
+ppc_linux_nat_target::can_use_watchpoint_cond_accel (void)
{
- struct thread_points *p;
- int tid = TIDGET (inferior_ptid);
- int cnt = booke_debug_info.num_condition_regs, i;
- CORE_ADDR tmp_value;
+ m_dreg_interface.detect (inferior_ptid);
- if (!have_ptrace_booke_interface () || cnt == 0)
- return 0;
+ if (!m_dreg_interface.hwdebug_p ())
+ return false;
- p = booke_find_thread_points_by_tid (tid, 0);
+ int cnt = m_dreg_interface.hwdebug_info ().num_condition_regs;
- if (p)
- {
- for (i = 0; i < max_slots_number; i++)
- if (p->hw_breaks[i].hw_break != NULL
- && (p->hw_breaks[i].hw_break->condition_mode
- != PPC_BREAKPOINT_CONDITION_NONE))
- cnt--;
+ if (cnt == 0)
+ return false;
- /* There are no available slots now. */
- if (cnt <= 0)
- return 0;
- }
+ auto process_it = m_process_info.find (inferior_ptid.pid ());
- return 1;
+ /* No breakpoints or watchpoints have been requested for this process,
+ we have at least one free DVC register. */
+ if (process_it == m_process_info.end ())
+ return true;
+
+ for (const ppc_hw_breakpoint &bp : process_it->second.requested_hw_bps)
+ if (bp.condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
+ cnt--;
+
+ if (cnt <= 0)
+ return false;
+
+ return true;
}
/* Calculate the enable bits and the contents of the Data Value Compare
@@ -1830,10 +2372,16 @@ can_use_watchpoint_cond_accel (void)
On exit, CONDITION_MODE will hold the enable bits for the DVC, and
CONDITION_VALUE will hold the value which should be put in the
DVC register. */
-static void
-calculate_dvc (CORE_ADDR addr, int len, CORE_ADDR data_value,
- uint32_t *condition_mode, uint64_t *condition_value)
+
+void
+ppc_linux_nat_target::calculate_dvc (CORE_ADDR addr, int len,
+ CORE_ADDR data_value,
+ uint32_t *condition_mode,
+ uint64_t *condition_value)
{
+ const struct ppc_debug_info &hwdebug_info = (m_dreg_interface.
+ hwdebug_info ());
+
int i, num_byte_enable, align_offset, num_bytes_off_dvc,
rightmost_enabled_byte;
CORE_ADDR addr_end_data, addr_end_dvc;
@@ -1843,10 +2391,10 @@ calculate_dvc (CORE_ADDR addr, int len, CORE_ADDR data_value,
We need to calculate where our watch region is relative to that
window and enable comparison of the bytes which fall within it. */
- align_offset = addr % booke_debug_info.sizeof_condition;
+ align_offset = addr % hwdebug_info.sizeof_condition;
addr_end_data = addr + len;
addr_end_dvc = (addr - align_offset
- + booke_debug_info.sizeof_condition);
+ + hwdebug_info.sizeof_condition);
num_bytes_off_dvc = (addr_end_data > addr_end_dvc)?
addr_end_data - addr_end_dvc : 0;
num_byte_enable = len - num_bytes_off_dvc;
@@ -1872,11 +2420,12 @@ calculate_dvc (CORE_ADDR addr, int len, CORE_ADDR data_value,
Returns -1 if there's any register access involved, or if there are
other kinds of values which are not acceptable in a condition
expression (e.g., lval_computed or lval_internalvar). */
-static int
-num_memory_accesses (struct value *v)
+
+int
+ppc_linux_nat_target::num_memory_accesses (const std::vector
+ &chain)
{
int found_memory_cnt = 0;
- struct value *head = v;
/* The idea here is that evaluating an expression generates a series
of values, one holding the value of every subexpression. (The
@@ -1893,8 +2442,10 @@ num_memory_accesses (struct value *v)
notice that an expression contains an inferior function call.
FIXME. */
- for (; v; v = value_next (v))
+ for (const value_ref_ptr &iter : chain)
{
+ struct value *v = iter.get ();
+
/* Constants and values from the history are fine. */
if (VALUE_LVAL (v) == not_lval || deprecated_value_modifiable (v) == 0)
continue;
@@ -1920,36 +2471,30 @@ num_memory_accesses (struct value *v)
If the function returns 1, DATA_VALUE will contain the constant against
which the watch value should be compared and LEN will contain the size
of the constant. */
-static int
-check_condition (CORE_ADDR watch_addr, struct expression *cond,
- CORE_ADDR *data_value, int *len)
+
+int
+ppc_linux_nat_target::check_condition (CORE_ADDR watch_addr,
+ struct expression *cond,
+ CORE_ADDR *data_value, int *len)
{
int pc = 1, num_accesses_left, num_accesses_right;
- struct value *left_val, *right_val, *left_chain, *right_chain;
+ struct value *left_val, *right_val;
+ std::vector left_chain, right_chain;
if (cond->elts[0].opcode != BINOP_EQUAL)
return 0;
- fetch_subexp_value (cond, &pc, &left_val, NULL, &left_chain);
+ fetch_subexp_value (cond, &pc, &left_val, NULL, &left_chain, 0);
num_accesses_left = num_memory_accesses (left_chain);
if (left_val == NULL || num_accesses_left < 0)
- {
- free_value_chain (left_chain);
-
- return 0;
- }
+ return 0;
- fetch_subexp_value (cond, &pc, &right_val, NULL, &right_chain);
+ fetch_subexp_value (cond, &pc, &right_val, NULL, &right_chain, 0);
num_accesses_right = num_memory_accesses (right_chain);
if (right_val == NULL || num_accesses_right < 0)
- {
- free_value_chain (left_chain);
- free_value_chain (right_chain);
-
- return 0;
- }
+ return 0;
if (num_accesses_left == 1 && num_accesses_right == 0
&& VALUE_LVAL (left_val) == lval_memory
@@ -1972,30 +2517,26 @@ check_condition (CORE_ADDR watch_addr, struct expression *cond,
*len = TYPE_LENGTH (check_typedef (value_type (right_val)));
}
else
- {
- free_value_chain (left_chain);
- free_value_chain (right_chain);
-
- return 0;
- }
-
- free_value_chain (left_chain);
- free_value_chain (right_chain);
+ return 0;
return 1;
}
-/* Return non-zero if the target is capable of using hardware to evaluate
- the condition expression, thus only triggering the watchpoint when it is
+/* Return true if the target is capable of using hardware to evaluate the
+ condition expression, thus only triggering the watchpoint when it is
true. */
-static int
-ppc_linux_can_accel_watchpoint_condition (CORE_ADDR addr, int len, int rw,
- struct expression *cond)
+
+bool
+ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr,
+ int len, int rw,
+ struct expression *cond)
{
CORE_ADDR data_value;
- return (have_ptrace_booke_interface ()
- && booke_debug_info.num_condition_regs > 0
+ m_dreg_interface.detect (inferior_ptid);
+
+ return (m_dreg_interface.hwdebug_p ()
+ && (m_dreg_interface.hwdebug_info ().num_condition_regs > 0)
&& check_condition (addr, cond, &data_value, &len));
}
@@ -2004,19 +2545,24 @@ ppc_linux_can_accel_watchpoint_condition (CORE_ADDR addr, int len, int rw,
evaluated by hardware. INSERT tells if we are creating a request for
inserting or removing the watchpoint. */
-static void
-create_watchpoint_request (struct ppc_hw_breakpoint *p, CORE_ADDR addr,
- int len, int rw, struct expression *cond,
- int insert)
+void
+ppc_linux_nat_target::create_watchpoint_request (struct ppc_hw_breakpoint *p,
+ CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond,
+ int insert)
{
+ const struct ppc_debug_info &hwdebug_info = (m_dreg_interface
+ .hwdebug_info ());
+
if (len == 1
- || !(booke_debug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE))
+ || !(hwdebug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE))
{
int use_condition;
CORE_ADDR data_value;
use_condition = (insert? can_use_watchpoint_cond_accel ()
- : booke_debug_info.num_condition_regs > 0);
+ : hwdebug_info.num_condition_regs > 0);
if (cond && use_condition && check_condition (addr, cond,
&data_value, &len))
calculate_dvc (addr, len, data_value, &p->condition_mode,
@@ -2046,34 +2592,40 @@ create_watchpoint_request (struct ppc_hw_breakpoint *p, CORE_ADDR addr,
}
p->version = PPC_DEBUG_CURRENT_VERSION;
- p->trigger_type = get_trigger_type (rw);
+ p->trigger_type = get_trigger_type (type);
p->addr = (uint64_t) addr;
}
-static int
-ppc_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw,
- struct expression *cond)
+/* Register a watchpoint, to be inserted when the threads of the group of
+ inferior_ptid are next resumed. Returns 0 on success, and -1 if there
+ is no ptrace interface available to install the watchpoint. */
+
+int
+ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond)
{
- struct lwp_info *lp;
- int ret = -1;
+ m_dreg_interface.detect (inferior_ptid);
- if (have_ptrace_booke_interface ())
+ if (m_dreg_interface.unavailable_p ())
+ return -1;
+
+ if (m_dreg_interface.hwdebug_p ())
{
struct ppc_hw_breakpoint p;
- create_watchpoint_request (&p, addr, len, rw, cond, 1);
+ create_watchpoint_request (&p, addr, len, type, cond, 1);
- ALL_LWPS (lp)
- booke_insert_point (&p, TIDGET (lp->ptid));
-
- ret = 0;
+ register_hw_breakpoint (inferior_ptid.pid (), p);
}
else
{
- long dabr_value;
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ long wp_value;
long read_mode, write_mode;
- if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE)
+ if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
{
/* PowerPC 440 requires only the read/write flags to be passed
to the kernel. */
@@ -2088,184 +2640,364 @@ ppc_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw,
write_mode = 6;
}
- dabr_value = addr & ~(read_mode | write_mode);
- switch (rw)
+ wp_value = addr & ~(read_mode | write_mode);
+ switch (type)
{
case hw_read:
/* Set read and translate bits. */
- dabr_value |= read_mode;
+ wp_value |= read_mode;
break;
case hw_write:
/* Set write and translate bits. */
- dabr_value |= write_mode;
+ wp_value |= write_mode;
break;
case hw_access:
/* Set read, write and translate bits. */
- dabr_value |= read_mode | write_mode;
+ wp_value |= read_mode | write_mode;
break;
}
- saved_dabr_value = dabr_value;
-
- ALL_LWPS (lp)
- if (ptrace (PTRACE_SET_DEBUGREG, TIDGET (lp->ptid), 0,
- saved_dabr_value) < 0)
- return -1;
-
- ret = 0;
+ register_wp (inferior_ptid.pid (), wp_value);
}
- return ret;
+ return 0;
}
-static int
-ppc_linux_remove_watchpoint (CORE_ADDR addr, int len, int rw,
- struct expression *cond)
+/* Clear a registration for a hardware watchpoint. It will be removed
+ from the threads of the group of inferior_ptid when they are next
+ resumed. */
+
+int
+ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond)
{
- struct lwp_info *lp;
- int ret = -1;
+ gdb_assert (!m_dreg_interface.unavailable_p ());
- if (have_ptrace_booke_interface ())
+ if (m_dreg_interface.hwdebug_p ())
{
struct ppc_hw_breakpoint p;
- create_watchpoint_request (&p, addr, len, rw, cond, 0);
-
- ALL_LWPS (lp)
- booke_remove_point (&p, TIDGET (lp->ptid));
+ create_watchpoint_request (&p, addr, len, type, cond, 0);
- ret = 0;
+ clear_hw_breakpoint (inferior_ptid.pid (), p);
}
else
{
- saved_dabr_value = 0;
- ALL_LWPS (lp)
- if (ptrace (PTRACE_SET_DEBUGREG, TIDGET (lp->ptid), 0,
- saved_dabr_value) < 0)
- return -1;
+ gdb_assert (m_dreg_interface.debugreg_p ());
- ret = 0;
+ clear_wp (inferior_ptid.pid ());
}
- return ret;
+ return 0;
}
-static void
-ppc_linux_new_thread (struct lwp_info *lp)
+/* Clean up the per-process info associated with PID. When using the
+ HWDEBUG interface, we also erase the per-thread state of installed
+ debug registers for all the threads that belong to the group of PID.
+
+ Usually the thread state is cleaned up by low_delete_thread. We also
+ do it here because low_new_thread is not called for the initial LWP,
+ so low_delete_thread won't be able to clean up this state. */
+
+void
+ppc_linux_nat_target::low_forget_process (pid_t pid)
{
- int tid = TIDGET (lp->ptid);
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
- if (have_ptrace_booke_interface ())
+ ptid_t pid_ptid (pid, 0, 0);
+
+ m_process_info.erase (pid);
+
+ if (m_dreg_interface.hwdebug_p ())
{
- int i;
- struct thread_points *p;
- struct hw_break_tuple *hw_breaks;
+ for (auto it = m_installed_hw_bps.begin ();
+ it != m_installed_hw_bps.end ();)
+ {
+ if (it->first.matches (pid_ptid))
+ it = m_installed_hw_bps.erase (it);
+ else
+ it++;
+ }
+ }
+}
+
+/* Copy the per-process state associated with the pid of PARENT to the
+ sate of CHILD_PID. GDB expects that a forked process will have the
+ same hardware breakpoints and watchpoints as the parent.
+
+ If we're using the HWDEBUG interface, also copy the thread debug
+ register state for the ptid of PARENT to the state for CHILD_PID.
+
+ Like for clone events, we assume the kernel will copy the debug
+ registers from the parent thread to the child. The
+ low_prepare_to_resume function is made to work even if it doesn't.
+
+ We copy the thread state here and not in low_new_thread since we don't
+ have the pid of the parent in low_new_thread. Even if we did,
+ low_new_thread might not be called immediately after the fork event is
+ detected. For instance, with the checkpointing system (see
+ linux-fork.c), the thread won't be added until GDB decides to switch
+ to a new checkpointed process. At that point, the debug register
+ state of the parent thread is unlikely to correspond to the state it
+ had at the point when it forked. */
+
+void
+ppc_linux_nat_target::low_new_fork (struct lwp_info *parent,
+ pid_t child_pid)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
+
+ auto process_it = m_process_info.find (parent->ptid.pid ());
- if (VEC_empty (thread_points_p, ppc_threads))
- return;
+ if (process_it != m_process_info.end ())
+ m_process_info[child_pid] = m_process_info[parent->ptid.pid ()];
- /* Get a list of breakpoints from any thread. */
- p = VEC_last (thread_points_p, ppc_threads);
- hw_breaks = p->hw_breaks;
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ ptid_t child_ptid (child_pid, child_pid, 0);
- /* Copy that thread's breakpoints and watchpoints to the new thread. */
- for (i = 0; i < max_slots_number; i++)
- if (hw_breaks[i].hw_break)
- booke_insert_point (hw_breaks[i].hw_break, tid);
+ copy_thread_dreg_state (parent->ptid, child_ptid);
}
- else
- ptrace (PTRACE_SET_DEBUGREG, tid, 0, saved_dabr_value);
}
-static void
-ppc_linux_thread_exit (struct thread_info *tp, int silent)
-{
- int i;
- int tid = TIDGET (tp->ptid);
- struct hw_break_tuple *hw_breaks;
- struct thread_points *t = NULL, *p;
+/* Copy the thread debug register state from the PARENT thread to the the
+ state for CHILD_LWP, if we're using the HWDEBUG interface. We assume
+ the kernel copies the debug registers from one thread to another after
+ a clone event. The low_prepare_to_resume function is made to work
+ even if it doesn't. */
- if (!have_ptrace_booke_interface ())
+void
+ppc_linux_nat_target::low_new_clone (struct lwp_info *parent,
+ pid_t child_lwp)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
return;
- for (i = 0; VEC_iterate (thread_points_p, ppc_threads, i, p); i++)
- if (p->tid == tid)
- {
- t = p;
- break;
- }
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ ptid_t child_ptid (parent->ptid.pid (), child_lwp, 0);
- if (t == NULL)
- return;
+ copy_thread_dreg_state (parent->ptid, child_ptid);
+ }
+}
+
+/* Initialize the arch-specific thread state for LP so that it contains
+ the ptid for lp, so that we can use it in low_delete_thread. Mark the
+ new thread LP as stale so that we update its debug registers before
+ resuming it. This is not called for the initial thread. */
+
+void
+ppc_linux_nat_target::low_new_thread (struct lwp_info *lp)
+{
+ init_arch_lwp_info (lp);
- VEC_unordered_remove (thread_points_p, ppc_threads, i);
+ mark_thread_stale (lp);
+}
- hw_breaks = t->hw_breaks;
+/* Delete the per-thread debug register stale flag. */
- for (i = 0; i < max_slots_number; i++)
- if (hw_breaks[i].hw_break)
- xfree (hw_breaks[i].hw_break);
+void
+ppc_linux_nat_target::low_delete_thread (struct arch_lwp_info
+ *lp_arch_info)
+{
+ if (lp_arch_info != NULL)
+ {
+ if (m_dreg_interface.detected_p ()
+ && m_dreg_interface.hwdebug_p ())
+ m_installed_hw_bps.erase (lp_arch_info->lwp_ptid);
- xfree (t->hw_breaks);
- xfree (t);
+ xfree (lp_arch_info);
+ }
}
-static int
-ppc_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
+/* Install or delete debug registers in thread LP so that it matches what
+ GDB requested before it is resumed. */
+
+void
+ppc_linux_nat_target::low_prepare_to_resume (struct lwp_info *lp)
{
- struct siginfo *siginfo_p;
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
- siginfo_p = linux_nat_get_siginfo (inferior_ptid);
+ /* We have to re-install or clear the debug registers if we set the
+ stale flag.
- if (siginfo_p->si_signo != SIGTRAP
- || (siginfo_p->si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
- return 0;
+ In addition, some kernels configurations can disable a hardware
+ watchpoint after it is hit. Usually, GDB will remove and re-install
+ a hardware watchpoint when the thread stops if "breakpoint
+ always-inserted" is off, or to single-step a watchpoint. But so
+ that we don't rely on this behavior, if we stop due to a hardware
+ breakpoint or watchpoint, we also refresh our debug registers. */
+
+ arch_lwp_info *lp_arch_info = get_arch_lwp_info (lp);
- if (have_ptrace_booke_interface ())
+ bool stale_dregs = (lp->stop_reason == TARGET_STOPPED_BY_WATCHPOINT
+ || lp->stop_reason == TARGET_STOPPED_BY_HW_BREAKPOINT
+ || lp_arch_info->debug_regs_stale);
+
+ if (!stale_dregs)
+ return;
+
+ gdb_assert (lp->ptid.lwp_p ());
+
+ auto process_it = m_process_info.find (lp->ptid.pid ());
+
+ if (m_dreg_interface.hwdebug_p ())
{
- int i;
- struct thread_points *t;
- struct hw_break_tuple *hw_breaks;
- /* The index (or slot) of the *point is passed in the si_errno field. */
- int slot = siginfo_p->si_errno;
+ /* First, delete any hardware watchpoint or breakpoint installed in
+ the inferior and update the thread state. */
+ auto installed_it = m_installed_hw_bps.find (lp->ptid);
+
+ if (installed_it != m_installed_hw_bps.end ())
+ {
+ auto &bp_list = installed_it->second;
+
+ for (auto bp_it = bp_list.begin (); bp_it != bp_list.end ();)
+ {
+ /* We ignore ENOENT to account for various possible kernel
+ behaviors, e.g. the kernel might or might not copy debug
+ registers across forks and clones, and we always copy
+ the debug register state when fork and clone events are
+ detected. */
+ if (ptrace (PPC_PTRACE_DELHWDEBUG, lp->ptid.lwp (), 0,
+ bp_it->first) == -1)
+ if (errno != ENOENT)
+ perror_with_name (_("Error deleting hardware "
+ "breakpoint or watchpoint"));
+
+ /* We erase the entries one at a time after successfuly
+ removing the corresponding slot form the thread so that
+ if we throw an exception above in a future iteration the
+ map remains consistent. */
+ bp_it = bp_list.erase (bp_it);
+ }
+
+ gdb_assert (bp_list.empty ());
+ }
- t = booke_find_thread_points_by_tid (TIDGET (inferior_ptid), 0);
+ /* Now we install all the requested hardware breakpoints and
+ watchpoints and update the thread state. */
- /* Find out if this *point is a hardware breakpoint.
- If so, we should return 0. */
- if (t)
+ if (process_it != m_process_info.end ())
{
- hw_breaks = t->hw_breaks;
- for (i = 0; i < max_slots_number; i++)
- if (hw_breaks[i].hw_break && hw_breaks[i].slot == slot
- && hw_breaks[i].hw_break->trigger_type
- == PPC_BREAKPOINT_TRIGGER_EXECUTE)
- return 0;
+ auto &bp_list = m_installed_hw_bps[lp->ptid];
+
+ for (ppc_hw_breakpoint bp
+ : process_it->second.requested_hw_bps)
+ {
+ long slot = ptrace (PPC_PTRACE_SETHWDEBUG, lp->ptid.lwp (),
+ 0, &bp);
+
+ if (slot < 0)
+ perror_with_name (_("Error setting hardware "
+ "breakpoint or watchpoint"));
+
+ /* Keep track of which slots we installed in this
+ thread. */
+ bp_list.emplace (bp_list.begin (), slot, bp);
+ }
}
}
+ else
+ {
+ gdb_assert (m_dreg_interface.debugreg_p ());
- *addr_p = (CORE_ADDR) (uintptr_t) siginfo_p->si_addr;
- return 1;
+ /* Passing 0 to PTRACE_SET_DEBUGREG will clear the
+ watchpoint. */
+ long wp = 0;
+
+ /* GDB requested a watchpoint to be installed. */
+ if (process_it != m_process_info.end ()
+ && process_it->second.requested_wp_val.has_value ())
+ wp = *(process_it->second.requested_wp_val);
+
+ long ret = ptrace (PTRACE_SET_DEBUGREG, lp->ptid.lwp (),
+ 0, wp);
+
+ if (ret == -1)
+ perror_with_name (_("Error setting hardware watchpoint"));
+ }
+
+ lp_arch_info->debug_regs_stale = false;
}
-static int
-ppc_linux_stopped_by_watchpoint (void)
+/* Return true if INFERIOR_PTID is known to have been stopped by a
+ hardware watchpoint, false otherwise. If true is returned, write the
+ address that the kernel reported as causing the SIGTRAP in ADDR_P. */
+
+bool
+ppc_linux_nat_target::low_stopped_data_address (CORE_ADDR *addr_p)
+{
+ siginfo_t siginfo;
+
+ if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
+ return false;
+
+ if (siginfo.si_signo != SIGTRAP
+ || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
+ return false;
+
+ gdb_assert (!m_dreg_interface.unavailable_p ());
+
+ /* Check if this signal corresponds to a hardware breakpoint. We only
+ need to check this if we're using the HWDEBUG interface, since the
+ DEBUGREG interface only allows setting one hardware watchpoint. */
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ /* The index (or slot) of the *point is passed in the si_errno
+ field. Currently, this is only the case if the kernel was
+ configured with CONFIG_PPC_ADV_DEBUG_REGS. If not, we assume
+ the kernel will set si_errno to a value that doesn't correspond
+ to any real slot. */
+ int slot = siginfo.si_errno;
+
+ auto installed_it = m_installed_hw_bps.find (inferior_ptid);
+
+ /* We must have installed slots for the thread if it got a
+ TRAP_HWBKPT signal. */
+ gdb_assert (installed_it != m_installed_hw_bps.end ());
+
+ for (const auto & slot_bp_pair : installed_it->second)
+ if (slot_bp_pair.first == slot
+ && (slot_bp_pair.second.trigger_type
+ == PPC_BREAKPOINT_TRIGGER_EXECUTE))
+ return false;
+ }
+
+ *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
+ return true;
+}
+
+/* Return true if INFERIOR_PTID is known to have been stopped by a
+ hardware watchpoint, false otherwise. */
+
+bool
+ppc_linux_nat_target::low_stopped_by_watchpoint ()
{
CORE_ADDR addr;
- return ppc_linux_stopped_data_address (¤t_target, &addr);
+ return low_stopped_data_address (&addr);
}
-static int
-ppc_linux_watchpoint_addr_within_range (struct target_ops *target,
- CORE_ADDR addr,
- CORE_ADDR start, int length)
+bool
+ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
+ CORE_ADDR start,
+ int length)
{
+ gdb_assert (!m_dreg_interface.unavailable_p ());
+
int mask;
- if (have_ptrace_booke_interface ()
- && ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE)
+ if (m_dreg_interface.hwdebug_p ()
+ && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
return start <= addr && start + length >= addr;
- else if (ppc_linux_get_hwcap () & PPC_FEATURE_BOOKE)
+ else if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
mask = 3;
else
mask = 7;
@@ -2278,12 +3010,15 @@ ppc_linux_watchpoint_addr_within_range (struct target_ops *target,
/* Return the number of registers needed for a masked hardware watchpoint. */
-static int
-ppc_linux_masked_watch_num_registers (struct target_ops *target,
- CORE_ADDR addr, CORE_ADDR mask)
+int
+ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr,
+ CORE_ADDR mask)
{
- if (!have_ptrace_booke_interface ()
- || (booke_debug_info.features & PPC_DEBUG_FEATURE_DATA_BP_MASK) == 0)
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (!m_dreg_interface.hwdebug_p ()
+ || (m_dreg_interface.hwdebug_info ().features
+ & PPC_DEBUG_FEATURE_DATA_BP_MASK) == 0)
return -1;
else if ((mask & 0xC0000000) != 0xC0000000)
{
@@ -2296,236 +3031,182 @@ ppc_linux_masked_watch_num_registers (struct target_ops *target,
return 2;
}
-static void
-ppc_linux_store_inferior_registers (struct target_ops *ops,
- struct regcache *regcache, int regno)
+/* Copy the per-thread debug register state, if any, from thread
+ PARENT_PTID to thread CHILD_PTID, if the debug register being used is
+ HWDEBUG. */
+
+void
+ppc_linux_nat_target::copy_thread_dreg_state (const ptid_t &parent_ptid,
+ const ptid_t &child_ptid)
{
- /* Overload thread id onto process id. */
- int tid = TIDGET (inferior_ptid);
+ gdb_assert (m_dreg_interface.hwdebug_p ());
- /* No thread id, just use process id. */
- if (tid == 0)
- tid = PIDGET (inferior_ptid);
+ auto installed_it = m_installed_hw_bps.find (parent_ptid);
- if (regno >= 0)
- store_register (regcache, tid, regno);
- else
- store_ppc_registers (regcache, tid);
+ if (installed_it != m_installed_hw_bps.end ())
+ m_installed_hw_bps[child_ptid] = m_installed_hw_bps[parent_ptid];
}
-/* Functions for transferring registers between a gregset_t or fpregset_t
- (see sys/ucontext.h) and gdb's regcache. The word size is that used
- by the ptrace interface, not the current program's ABI. Eg. if a
- powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
- read or write 64-bit gregsets. This is to suit the host libthread_db. */
+/* Mark the debug register stale flag for the new thread, if we have
+ already detected which debug register interface we use. */
void
-supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
+ppc_linux_nat_target::mark_thread_stale (struct lwp_info *lp)
{
- const struct regset *regset = ppc_linux_gregset (sizeof (long));
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
- ppc_supply_gregset (regset, regcache, -1, gregsetp, sizeof (*gregsetp));
+ arch_lwp_info *lp_arch_info = get_arch_lwp_info (lp);
+
+ lp_arch_info->debug_regs_stale = true;
}
+/* Mark all the threads of the group of PID as stale with respect to
+ debug registers and issue a stop request to each such thread that
+ isn't already stopped. */
+
void
-fill_gregset (const struct regcache *regcache,
- gdb_gregset_t *gregsetp, int regno)
+ppc_linux_nat_target::mark_debug_registers_changed (pid_t pid)
{
- const struct regset *regset = ppc_linux_gregset (sizeof (long));
+ /* We do this in two passes to make sure all threads are marked even if
+ we get an exception when stopping one of them. */
- if (regno == -1)
- memset (gregsetp, 0, sizeof (*gregsetp));
- ppc_collect_gregset (regset, regcache, regno, gregsetp, sizeof (*gregsetp));
+ iterate_over_lwps (ptid_t (pid),
+ [this] (struct lwp_info *lp) -> int {
+ this->mark_thread_stale (lp);
+ return 0;
+ });
+
+ iterate_over_lwps (ptid_t (pid),
+ [] (struct lwp_info *lp) -> int {
+ if (!lwp_is_stopped (lp))
+ linux_stop_lwp (lp);
+ return 0;
+ });
}
+/* Register a hardware breakpoint or watchpoint BP for the pid PID, then
+ mark the stale flag for all threads of the group of PID, and issue a
+ stop request for them. The breakpoint or watchpoint will be installed
+ the next time each thread is resumed. Should only be used if the
+ debug register interface is HWDEBUG. */
+
void
-supply_fpregset (struct regcache *regcache, const gdb_fpregset_t * fpregsetp)
+ppc_linux_nat_target::register_hw_breakpoint (pid_t pid,
+ const struct
+ ppc_hw_breakpoint &bp)
{
- const struct regset *regset = ppc_linux_fpregset ();
+ gdb_assert (m_dreg_interface.hwdebug_p ());
- ppc_supply_fpregset (regset, regcache, -1,
- fpregsetp, sizeof (*fpregsetp));
+ m_process_info[pid].requested_hw_bps.push_back (bp);
+
+ mark_debug_registers_changed (pid);
}
+/* Clear a registration for a hardware breakpoint or watchpoint BP for
+ the pid PID, then mark the stale flag for all threads of the group of
+ PID, and issue a stop request for them. The breakpoint or watchpoint
+ will be removed the next time each thread is resumed. Should only be
+ used if the debug register interface is HWDEBUG. */
+
void
-fill_fpregset (const struct regcache *regcache,
- gdb_fpregset_t *fpregsetp, int regno)
+ppc_linux_nat_target::clear_hw_breakpoint (pid_t pid,
+ const struct ppc_hw_breakpoint &bp)
{
- const struct regset *regset = ppc_linux_fpregset ();
+ gdb_assert (m_dreg_interface.hwdebug_p ());
- ppc_collect_fpregset (regset, regcache, regno,
- fpregsetp, sizeof (*fpregsetp));
-}
+ auto process_it = m_process_info.find (pid);
-static int
-ppc_linux_target_wordsize (void)
-{
- int wordsize = 4;
+ gdb_assert (process_it != m_process_info.end ());
- /* Check for 64-bit inferior process. This is the case when the host is
- 64-bit, and in addition the top bit of the MSR register is set. */
-#ifdef __powerpc64__
- long msr;
+ auto bp_it = std::find_if (process_it->second.requested_hw_bps.begin (),
+ process_it->second.requested_hw_bps.end (),
+ [&bp, this]
+ (const struct ppc_hw_breakpoint &curr)
+ { return hwdebug_point_cmp (bp, curr); }
+ );
- int tid = TIDGET (inferior_ptid);
- if (tid == 0)
- tid = PIDGET (inferior_ptid);
+ /* If GDB is removing a watchpoint, it must have been inserted. */
+ gdb_assert (bp_it != process_it->second.requested_hw_bps.end ());
- errno = 0;
- msr = (long) ptrace (PTRACE_PEEKUSER, tid, PT_MSR * 8, 0);
- if (errno == 0 && msr < 0)
- wordsize = 8;
-#endif
+ process_it->second.requested_hw_bps.erase (bp_it);
- return wordsize;
+ mark_debug_registers_changed (pid);
}
-static int
-ppc_linux_auxv_parse (struct target_ops *ops, gdb_byte **readptr,
- gdb_byte *endptr, CORE_ADDR *typep, CORE_ADDR *valp)
-{
- int sizeof_auxv_field = ppc_linux_target_wordsize ();
- enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch);
- gdb_byte *ptr = *readptr;
+/* Register the hardware watchpoint value WP_VALUE for the pid PID,
+ then mark the stale flag for all threads of the group of PID, and
+ issue a stop request for them. The breakpoint or watchpoint will be
+ installed the next time each thread is resumed. Should only be used
+ if the debug register interface is DEBUGREG. */
- if (endptr == ptr)
- return 0;
+void
+ppc_linux_nat_target::register_wp (pid_t pid, long wp_value)
+{
+ gdb_assert (m_dreg_interface.debugreg_p ());
- if (endptr - ptr < sizeof_auxv_field * 2)
- return -1;
+ /* Our other functions should have told GDB that we only have one
+ hardware watchpoint with this interface. */
+ gdb_assert (!m_process_info[pid].requested_wp_val.has_value ());
- *typep = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order);
- ptr += sizeof_auxv_field;
- *valp = extract_unsigned_integer (ptr, sizeof_auxv_field, byte_order);
- ptr += sizeof_auxv_field;
+ m_process_info[pid].requested_wp_val.emplace (wp_value);
- *readptr = ptr;
- return 1;
+ mark_debug_registers_changed (pid);
}
-static const struct target_desc *
-ppc_linux_read_description (struct target_ops *ops)
-{
- int altivec = 0;
- int vsx = 0;
- int isa205 = 0;
- int cell = 0;
-
- int tid = TIDGET (inferior_ptid);
- if (tid == 0)
- tid = PIDGET (inferior_ptid);
+/* Clear the hardware watchpoint registration for the pid PID, then mark
+ the stale flag for all threads of the group of PID, and issue a stop
+ request for them. The breakpoint or watchpoint will be installed the
+ next time each thread is resumed. Should only be used if the debug
+ register interface is DEBUGREG. */
- if (have_ptrace_getsetevrregs)
- {
- struct gdb_evrregset_t evrregset;
+void
+ppc_linux_nat_target::clear_wp (pid_t pid)
+{
+ gdb_assert (m_dreg_interface.debugreg_p ());
- if (ptrace (PTRACE_GETEVRREGS, tid, 0, &evrregset) >= 0)
- return tdesc_powerpc_e500l;
+ auto process_it = m_process_info.find (pid);
- /* EIO means that the PTRACE_GETEVRREGS request isn't supported.
- Anything else needs to be reported. */
- else if (errno != EIO)
- perror_with_name (_("Unable to fetch SPE registers"));
- }
+ gdb_assert (process_it != m_process_info.end ());
+ gdb_assert (process_it->second.requested_wp_val.has_value ());
- if (have_ptrace_getsetvsxregs)
- {
- gdb_vsxregset_t vsxregset;
+ process_it->second.requested_wp_val.reset ();
- if (ptrace (PTRACE_GETVSXREGS, tid, 0, &vsxregset) >= 0)
- vsx = 1;
+ mark_debug_registers_changed (pid);
+}
- /* EIO means that the PTRACE_GETVSXREGS request isn't supported.
- Anything else needs to be reported. */
- else if (errno != EIO)
- perror_with_name (_("Unable to fetch VSX registers"));
- }
+/* Initialize the arch-specific thread state for LWP, if it not already
+ created. */
- if (have_ptrace_getvrregs)
+void
+ppc_linux_nat_target::init_arch_lwp_info (struct lwp_info *lp)
+{
+ if (lwp_arch_private_info (lp) == NULL)
{
- gdb_vrregset_t vrregset;
-
- if (ptrace (PTRACE_GETVRREGS, tid, 0, &vrregset) >= 0)
- altivec = 1;
-
- /* EIO means that the PTRACE_GETVRREGS request isn't supported.
- Anything else needs to be reported. */
- else if (errno != EIO)
- perror_with_name (_("Unable to fetch AltiVec registers"));
+ lwp_set_arch_private_info (lp, XCNEW (struct arch_lwp_info));
+ lwp_arch_private_info (lp)->debug_regs_stale = false;
+ lwp_arch_private_info (lp)->lwp_ptid = lp->ptid;
}
+}
- /* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
- the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
- ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
- PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
- half of the register are for Decimal Floating Point, we check if that
- feature is available to decide the size of the FPSCR. */
- if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
- isa205 = 1;
-
- if (ppc_linux_get_hwcap () & PPC_FEATURE_CELL)
- cell = 1;
-
- if (ppc_linux_target_wordsize () == 8)
- {
- if (cell)
- return tdesc_powerpc_cell64l;
- else if (vsx)
- return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
- else if (altivec)
- return isa205
- ? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
-
- return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
- }
+/* Get the arch-specific thread state for LWP, creating it if
+ necessary. */
- if (cell)
- return tdesc_powerpc_cell32l;
- else if (vsx)
- return isa205? tdesc_powerpc_isa205_vsx32l : tdesc_powerpc_vsx32l;
- else if (altivec)
- return isa205? tdesc_powerpc_isa205_altivec32l : tdesc_powerpc_altivec32l;
+arch_lwp_info *
+ppc_linux_nat_target::get_arch_lwp_info (struct lwp_info *lp)
+{
+ init_arch_lwp_info (lp);
- return isa205? tdesc_powerpc_isa205_32l : tdesc_powerpc_32l;
+ return lwp_arch_private_info (lp);
}
-void _initialize_ppc_linux_nat (void);
-
+void _initialize_ppc_linux_nat ();
void
-_initialize_ppc_linux_nat (void)
+_initialize_ppc_linux_nat ()
{
- struct target_ops *t;
-
- /* Fill in the generic GNU/Linux methods. */
- t = linux_target ();
-
- /* Add our register access methods. */
- t->to_fetch_registers = ppc_linux_fetch_inferior_registers;
- t->to_store_registers = ppc_linux_store_inferior_registers;
-
- /* Add our breakpoint/watchpoint methods. */
- t->to_can_use_hw_breakpoint = ppc_linux_can_use_hw_breakpoint;
- t->to_insert_hw_breakpoint = ppc_linux_insert_hw_breakpoint;
- t->to_remove_hw_breakpoint = ppc_linux_remove_hw_breakpoint;
- t->to_region_ok_for_hw_watchpoint = ppc_linux_region_ok_for_hw_watchpoint;
- t->to_insert_watchpoint = ppc_linux_insert_watchpoint;
- t->to_remove_watchpoint = ppc_linux_remove_watchpoint;
- t->to_insert_mask_watchpoint = ppc_linux_insert_mask_watchpoint;
- t->to_remove_mask_watchpoint = ppc_linux_remove_mask_watchpoint;
- t->to_stopped_by_watchpoint = ppc_linux_stopped_by_watchpoint;
- t->to_stopped_data_address = ppc_linux_stopped_data_address;
- t->to_watchpoint_addr_within_range = ppc_linux_watchpoint_addr_within_range;
- t->to_can_accel_watchpoint_condition
- = ppc_linux_can_accel_watchpoint_condition;
- t->to_masked_watch_num_registers = ppc_linux_masked_watch_num_registers;
- t->to_ranged_break_num_registers = ppc_linux_ranged_break_num_registers;
-
- t->to_read_description = ppc_linux_read_description;
- t->to_auxv_parse = ppc_linux_auxv_parse;
-
- observer_attach_thread_exit (ppc_linux_thread_exit);
+ linux_target = &the_ppc_linux_nat_target;
/* Register the target. */
- linux_nat_add_target (t);
- linux_nat_set_new_thread (t, ppc_linux_new_thread);
+ add_inf_child_target (linux_target);
}