X-Git-Url: http://drtracing.org/?a=blobdiff_plain;ds=sidebyside;f=include%2Fopcode%2FChangeLog;h=863713a64cc874801f33fb1a18444731c0d7f628;hb=992aaec9a9e9657ab62a5fb3282a48ec778c903c;hp=3084081f3e6fd07fd050630cc5d89ea4a139a863;hpb=a7fba0e099118e076dc82081be62b44d836ce9d5;p=deliverable%2Fbinutils-gdb.git diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 3084081f3e..863713a64c 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,313 @@ +2001-05-04 Alan Modra + + * i386.h (i386_optab): Move InvMem to first operand of pmovmskb + and pextrw to swap reg/rm assignments. + +2001-04-05 Hans-Peter Nilsson + + * cris.h (enum cris_insn_version_usage): Correct comment for + cris_ver_v3p. + +2001-03-24 Alan Modra + + * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq". + Add InvMem to first operand of "maskmovdqu". + +2001-03-22 Hans-Peter Nilsson + + * cris.h (ADD_PC_INCR_OPCODE): New macro. + +2001-03-21 Kazu Hirata + + * h8300.h: Fix formatting. + +2001-03-22 Alan Modra + + * i386.h (i386_optab): Add paddq, psubq. + +2001-03-19 Alan Modra + + * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define. + +2001-02-28 Igor Shevlyakov + + * m68k.h: new defines for Coldfire V4. Update mcf to know + about mcf5407. + +2001-02-18 lars brinkhoff + + * pdp11.h: New file. + +2001-02-12 Jan Hubicka + + * i386.h (i386_optab): SSE integer converison instructions have + 64bit versions on x86-64. + +2001-02-10 Nick Clifton + + * mips.h: Remove extraneous whitespace. Formating change to allow + for future contribution. + +2001-02-09 Martin Schwidefsky + + * s390.h: New file. + +2001-02-02 Patrick Macdonald + + * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short. + (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES. + (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS. + +2001-01-24 Karsten Keil + + * i386.h (i386_optab): Fix swapgs + +2001-01-14 Alan Modra + + * hppa.h: Describe new '<' and '>' operand types, and tidy + existing comments. + (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw. + Remove duplicate "ldw j(s,b),x". Sort some entries. + +2001-01-13 Jan Hubicka + + * i386.h (i386_optab): Fix pusha and ret templates. + +2001-01-11 Peter Targett + + * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New + definitions for masking cpu type. + (arc_ext_operand_value) New structure for storing extended + operands. + (ARC_OPERAND_*) Flags for operand values. + +2001-01-10 Jan Hubicka + + * i386.h (pinsrw): Add. + (pshufw): Remove. + (cvttpd2dq): Fix operands. + (cvttps2dq): Likewise. + (movq2q): Rename to movdq2q. + +2001-01-10 Richard Schaal + + * i386.h: Correct movnti instruction. + +2001-01-09 Jeff Johnston + + * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number + of operands (unsigned char or unsigned short). + (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE. + (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char. + +2001-01-05 Jan Hubicka + + * i386.h (i386_optab): Make [sml]fence template to use immext field. + +2001-01-03 Jan Hubicka + + * i386.h (i386_optab): Fix 64bit pushf template; Add instructions + introduced by Pentium4 + +2000-12-30 Jan Hubicka + + * i386.h (i386_optab): Add "rex*" instructions; + add swapgs; disable jmp/call far direct instructions for + 64bit mode; add syscall and sysret; disable registers for 0xc6 + template. Add 'q' suffixes to extendable instructions, disable + obsolete instructions, add new sign/zero extension ones. + (i386_regtab): Add extended registers. + (*Suf): Add No_qSuf. + (q_Suf, wlq_Suf, bwlq_Suf): New. + +2000-12-20 Jan Hubicka + + * i386.h (i386_optab): Replace "Imm" with "EncImm". + (i386_regtab): Add flags field. + +2000-12-12 Nick Clifton + + * mips.h: Fix formatting. + +2000-12-01 Chris Demetriou + + mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete. + (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old + OP_*_SYSCALL definitions. + (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as + 19 bit wait codes. + (MIPS operand specifier comments): Remove 'm', add 'U' and + 'J', and update the meaning of 'B' so that it's more general. + + * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, + INSN_ISA5): Renumber, redefine to mean the ISA at which the + instruction was added. + (INSN_ISA32): New constant. + (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32): + Renumber to avoid new and/or renumbered INSN_* constants. + (INSN_MIPS32): Delete. + (ISA_UNKNOWN): New constant to indicate unknown ISA. + (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5, + ISA_MIPS32): New constants, defined to be the mask of INSN_* + constants available at that ISA level. + (CPU_UNKNOWN): New constant to indicate unknown CPU. + (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter, + define it with a unique value. + (OPCODE_IS_MEMBER): Update for new ISA membership-related + constant meanings. + + * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New + definitions. + + * mips.h (CPU_SB1): New constant. + +2000-10-20 Jakub Jelinek + + * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. + Note that '3' is used for siam operand. + +2000-09-22 Jim Wilson + + * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. + +2000-09-13 Anders Norlander + + * mips.h: Use defines instead of hard-coded processor numbers. + (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010, + CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650, + CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K, + CPU_4KC, CPU_4KM, CPU_4KP): Define.. + (OPCODE_IS_MEMBER): Use new defines. + (OP_MASK_SEL, OP_SH_SEL): Define. + (OP_MASK_CODE20, OP_SH_CODE20): Define. + Add 'P' to used characters. + Use 'H' for coprocessor select field. + Use 'm' for 20 bit breakpoint code. + Document new arg characters and add to used characters. + (INSN_MIPS32): New define for MIPS32 extensions. + (OPCODE_IS_MEMBER): Recognize MIPS32 instructions. + +2000-09-05 Alan Modra + + * hppa.h: Mention cz completer. + +2000-08-16 Jim Wilson + + * ia64.h (IA64_OPCODE_POSTINC): New. + +2000-08-15 H.J. Lu + + * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the + IgnoreSize change. + +2000-08-08 Jason Eckhardt + + * i860.h: Small formatting adjustments. + +2000-07-29 Marek Michalkiewicz + + * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros. + Move related opcodes closer to each other. + Minor changes in comments, list undefined opcodes. + +2000-07-26 Dave Brolley + + * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned. + +2000-07-22 Jason Eckhardt + + * i860.h (btne, bte, bla): Changed these opcodes + to use sbroff ('r') instead of split16 ('s'). + (J, K, L, M): New operand types for 16-bit aligned fields. + (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to + use I, J, K, L, M instead of just I. + (T, U): New operand types for split 16-bit aligned fields. + (st.x): Changed these opcodes to use S, T, U instead of just S. + (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not + exist on the i860. + (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. + (pfeq.ss, pfeq.dd): New opcodes. + (st.s): Fixed incorrect mask bits. + (fmlow): Fixed incorrect mask bits. + (fzchkl, pfzchkl): Fixed incorrect mask bits. + (faddz, pfaddz): Fixed incorrect mask bits. + (form, pform): Fixed incorrect mask bits. + (pfld.l): Fixed incorrect mask bits. + (fst.q): Fixed incorrect mask bits. + (all floating point opcodes): Fixed incorrect mask bits for + handling of dual bit. + +2000-07-20 Hans-Peter Nilsson + + cris.h: New file. + +2000-06-26 Marek Michalkiewicz + + * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA. + (AVR_ISA_ESPM): Remove, because ESPM removed in databook update. + (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx. + (AVR_ISA_M83): Define for ATmega83, ATmega85. + (espm): Remove, because ESPM removed in databook update. + (eicall, eijmp): Move to the end of opcode table. + +2000-06-18 Stephane Carrez + + * m68hc11.h: New file for support of Motorola 68hc11. + +Fri Jun 9 21:51:50 2000 Denis Chertykov + + * avr.h: clr,lsl,rol, ... moved after add,adc, ... + +Wed Jun 7 21:39:54 2000 Denis Chertykov + + * avr.h: New file with AVR opcodes. + +Wed Apr 12 17:11:20 2000 Donald Lindsay + + * d10v.h: added ALONE attribute for d10v_opcode.exec_type. + +2000-05-23 Maciej W. Rozycki + + * i386.h: Allow d suffix on iret, and add DefaultSize modifier. + +2000-05-17 Maciej W. Rozycki + + * i386.h: Use sl_FP, not sl_Suf for fild. + +2000-05-16 Frank Ch. Eigler + + * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that + it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set. + (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds + CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set. + +2000-05-13 Alan Modra , + + * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore. + +2000-05-13 Alan Modra , + Alexander Sokolov + + * i386.h (i386_optab): Add cpu_flags for all instructions. + +2000-05-13 Alan Modra + + From Gavin Romig-Koch + * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa. + +2000-05-04 Timothy Wall + + * tic54x.h: New. + +2000-05-03 J.T. Conklin + + * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit. + (PPC_OPERAND_VR): New operand flag for vector registers. + +2000-05-01 Kazu Hirata + + * h8300.h (EOP): Add missing initializer. + Fri Apr 21 15:03:37 2000 Jason Eckhardt * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode @@ -64,6 +374,11 @@ Fri Apr 21 13:20:53 2000 Richard Henderson * i370.h: New file. +2000-02-22 Chandra Chavva + + * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation + cannot be combined in parallel with ADD/SUBppp. + 2000-02-22 Andrew Haley * mips.h: (OPCODE_IS_MEMBER): Add comment. @@ -433,7 +748,7 @@ Mon Feb 1 21:09:14 1999 Catherine Moore * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT, CGEN_MODE_UINT. -Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com) +1999-01-16 Jeffrey A Law (law@cygnus.com) * hppa.h (bv): Fix mask. @@ -784,7 +1099,7 @@ Mon Feb 2 17:10:38 1998 Steve Haworth * tic30.h: New file. -Thu Jan 22 17:54:56 1998 Nick Clifton +Jan 22 17:54:56 1998 Nick Clifton * cgen.h: Add prototypes for cgen_save_fixups(), cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype @@ -1583,8 +1898,8 @@ Mon Jan 23 16:45:43 1995 Ken Raeburn Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu) - * ../include/opcode/vax.h (struct vot_wot, field `args'): make - it pointer to const char; + * vax.h (struct vot_wot, field `args'): Make it pointer to const + char. (struct vot, field `name'): ditto. Thu Jan 19 14:47:53 1995 Ken Raeburn @@ -1905,6 +2220,15 @@ Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com) * hppa.h: Update "free list" of letters and update comments describing each letter's function. +Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com) + + * h8300.h: Lots of little fixes for the h8/300h. + +Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com) + + Support for H8/300-H + * h8300.h: Lots of new opcodes. + Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com) * h8300.h: checkpoint, includes H8/300-H opcodes. @@ -2176,6 +2500,10 @@ Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com) * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is disassembled as a nop. +Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com) + + * m68k.h, sparc.h: ANSIfy enums. + Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com) * sparc.h: fix a typo. @@ -2184,7 +2512,7 @@ Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com) * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h, m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h, - vax.h, ChangeLog: renamed from ../-opcode.h + vax.h: Renamed from ../-opcode.h. Local Variables: