X-Git-Url: http://drtracing.org/?a=blobdiff_plain;ds=sidebyside;f=opcodes%2Fi386-opc.h;h=731854d7803ff6dae1368a1db31bc54ec2042647;hb=1efbbeb4614cfed6db59358265e1786aa23e629b;hp=2f6e5b381b31d1ce8ec050d01e04b07593b02c50;hpb=9a04903eea44cbc4642f10d2a8f8db416a694737;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 2f6e5b381b..731854d780 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -68,8 +68,10 @@
 #define CpuSVME		(CpuPadLock + 1)
 /* VMX Instructions required */
 #define CpuVMX		(CpuSVME + 1)
+/* SMX Instructions required */
+#define CpuSMX		(CpuVMX + 1)
 /* SSSE3 support required */
-#define CpuSSSE3	(CpuVMX + 1)
+#define CpuSSSE3	(CpuSMX + 1)
 /* SSE4a support required */
 #define CpuSSE4a	(CpuSSSE3 + 1)
 /* ABM New Instructions required */
@@ -123,6 +125,7 @@ typedef union i386_cpu_flags
       unsigned int cpupadlock:1;
       unsigned int cpusvme:1;
       unsigned int cpuvmx:1;
+      unsigned int cpusmx:1;
       unsigned int cpussse3:1;
       unsigned int cpusse4a:1;
       unsigned int cpuabm:1;
@@ -183,17 +186,27 @@ typedef union i386_cpu_flags
 #define No_sSuf			(No_lSuf + 1)
 /* q suffix on instruction illegal */
 #define No_qSuf			(No_sSuf + 1)
-/* x suffix on instruction illegal */
-#define No_xSuf			(No_qSuf + 1)
+/* long double suffix on instruction illegal */
+#define No_ldSuf		(No_qSuf + 1)
 /* instruction needs FWAIT */
-#define FWait			(No_xSuf + 1)
+#define FWait			(No_ldSuf + 1)
 /* quick test for string instructions */
 #define IsString		(FWait + 1)
 /* fake an extra reg operand for clr, imul and special register
    processing for some instructions.  */
 #define RegKludge		(IsString + 1)
+/* The first operand must be xmm0 */
+#define FirstXmm0		(RegKludge + 1)
+/* BYTE is OK in Intel syntax. */
+#define ByteOkIntel		(FirstXmm0 + 1)
+/* Convert to DWORD */
+#define ToDword			(ByteOkIntel + 1)
+/* Convert to QWORD */
+#define ToQword			(ToDword + 1)
+/* Address prefix changes operand 0 */
+#define AddrPrefixOp0		(ToQword + 1)
 /* opcode is a prefix */
-#define IsPrefix		(RegKludge + 1)
+#define IsPrefix		(AddrPrefixOp0 + 1)
 /* instruction has extension in 8 bit imm */
 #define ImmExt			(IsPrefix + 1)
 /* instruction don't need Rex64 prefix.  */
@@ -207,8 +220,14 @@ typedef union i386_cpu_flags
 #define Drexv			(Drex + 1)
 /* special DREX for comparisons */
 #define Drexc			(Drexv + 1)
+/* Compatible with old (<= 2.8.1) versions of gcc  */
+#define OldGcc			(Drexc + 1)
+/* AT&T mnemonic.  */
+#define ATTMnemonic		(OldGcc + 1)
+/* Intel mnemonic.  */
+#define IntelMnemonic		(ATTMnemonic + 1)
 /* The last bitfield in i386_opcode_modifier.  */
-#define Opcode_Modifier_Max	Drexc
+#define Opcode_Modifier_Max	IntelMnemonic
 
 typedef struct i386_opcode_modifier
 {
@@ -233,10 +252,15 @@ typedef struct i386_opcode_modifier
   unsigned int no_lsuf:1;
   unsigned int no_ssuf:1;
   unsigned int no_qsuf:1;
-  unsigned int no_xsuf:1;
+  unsigned int no_ldsuf:1;
   unsigned int fwait:1;
   unsigned int isstring:1;
   unsigned int regkludge:1;
+  unsigned int firstxmm0:1;
+  unsigned int byteokintel:1;
+  unsigned int todword:1;
+  unsigned int toqword:1;
+  unsigned int addrprefixop0:1;
   unsigned int isprefix:1;
   unsigned int immext:1;
   unsigned int norex64:1;
@@ -245,6 +269,9 @@ typedef struct i386_opcode_modifier
   unsigned int drex:1;
   unsigned int drexv:1;
   unsigned int drexc:1;
+  unsigned int oldgcc:1;
+  unsigned int attmnemonic:1;
+  unsigned int intelmnemonic:1;
 } i386_opcode_modifier;
 
 /* Position of operand_type bits.  */