X-Git-Url: http://drtracing.org/?a=blobdiff_plain;ds=sidebyside;f=opcodes%2Frx-dis.c;h=29ba71c12159fe93348228d29229ee8e0bd84d85;hb=3061113bf336048d538241282c39baf684de31bf;hp=1147d6438f492b054ab047e3e2899bc10741feb1;hpb=4ce8c66d19abec8a768add7f6102e856157a3952;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/rx-dis.c b/opcodes/rx-dis.c index 1147d6438f..29ba71c121 100644 --- a/opcodes/rx-dis.c +++ b/opcodes/rx-dis.c @@ -1,5 +1,5 @@ /* Disassembler code for Renesas RX. - Copyright (C) 2008-2019 Free Software Foundation, Inc. + Copyright (C) 2008-2020 Free Software Foundation, Inc. Contributed by Red Hat. Written by DJ Delorie. @@ -26,6 +26,8 @@ #include "bfd.h" #include "dis-asm.h" #include "opcode/rx.h" +#include "libiberty.h" +#include "opintl.h" #include @@ -76,10 +78,10 @@ static char const * opsize_names[RX_MAX_SIZE] = static char const * register_names[] = { - /* general registers */ + /* General registers. */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - /* control register */ + /* Control registers. */ "psw", "pc", "usp", "fpsw", NULL, NULL, NULL, NULL, "bpsw", "bpc", "isp", "fintv", "intb", "extb", NULL, NULL, "a0", "a1", NULL, NULL, NULL, NULL, NULL, NULL, @@ -88,7 +90,7 @@ static char const * register_names[] = static char const * condition_names[] = { - /* condition codes */ + /* Condition codes. */ "eq", "ne", "c", "nc", "gtu", "leu", "pz", "n", "ge", "lt", "gt", "le", "o", "no", "", "" }; @@ -129,6 +131,87 @@ static const char * double_condition_names[] = "", "un", "eq", "", "lt", "", "le", }; +static inline const char * +get_register_name (unsigned int reg) +{ + if (reg < ARRAY_SIZE (register_names)) + return register_names[reg]; + return _(""); +} + +static inline const char * +get_condition_name (unsigned int cond) +{ + if (cond < ARRAY_SIZE (condition_names)) + return condition_names[cond]; + return _(""); +} + +static inline const char * +get_flag_name (unsigned int flag) +{ + if (flag < ARRAY_SIZE (flag_names)) + return flag_names[flag]; + return _(""); +} + +static inline const char * +get_double_register_name (unsigned int reg) +{ + if (reg < ARRAY_SIZE (double_register_names)) + return double_register_names[reg]; + return _(""); +} + +static inline const char * +get_double_register_high_name (unsigned int reg) +{ + if (reg < ARRAY_SIZE (double_register_high_names)) + return double_register_high_names[reg]; + return _(""); +} + +static inline const char * +get_double_register_low_name (unsigned int reg) +{ + if (reg < ARRAY_SIZE (double_register_low_names)) + return double_register_low_names[reg]; + return _(""); +} + +static inline const char * +get_double_control_register_name (unsigned int reg) +{ + if (reg < ARRAY_SIZE (double_control_register_names)) + return double_control_register_names[reg]; + return _(""); +} + +static inline const char * +get_double_condition_name (unsigned int cond) +{ + if (cond < ARRAY_SIZE (double_condition_names)) + return double_condition_names[cond]; + return _(""); +} + +static inline const char * +get_opsize_name (unsigned int opsize) +{ + if (opsize < ARRAY_SIZE (opsize_names)) + return opsize_names[opsize]; + return _(""); +} + +static inline const char * +get_size_name (unsigned int size) +{ + if (size < ARRAY_SIZE (size_names)) + return size_names[size]; + return _(""); +} + + int print_insn_rx (bfd_vma addr, disassemble_info * dis) { @@ -211,34 +294,36 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis) break; case 's': - PR (PS, "%s", opsize_names[opcode.size]); + PR (PS, "%s", get_opsize_name (opcode.size)); break; case 'b': s ++; - if (*s == 'f') { - int imm = opcode.op[2].addend; - int slsb, dlsb, width; - dlsb = (imm >> 5) & 0x1f; - slsb = (imm & 0x1f); - slsb = (slsb >= 0x10?(slsb ^ 0x1f) + 1:slsb); - slsb = dlsb - slsb; - slsb = (slsb < 0?-slsb:slsb); - width = ((imm >> 10) & 0x1f) - dlsb; - PR (PS, "#%d, #%d, #%d, %s, %s", - slsb, dlsb, width, - register_names[opcode.op[1].reg], - register_names[opcode.op[0].reg]); - } + if (*s == 'f') + { + int imm = opcode.op[2].addend; + int slsb, dlsb, width; + + dlsb = (imm >> 5) & 0x1f; + slsb = (imm & 0x1f); + slsb = (slsb >= 0x10?(slsb ^ 0x1f) + 1:slsb); + slsb = dlsb - slsb; + slsb = (slsb < 0?-slsb:slsb); + width = ((imm >> 10) & 0x1f) - dlsb; + PR (PS, "#%d, #%d, #%d, %s, %s", + slsb, dlsb, width, + get_register_name (opcode.op[1].reg), + get_register_name (opcode.op[0].reg)); + } break; case '0': case '1': case '2': - oper = opcode.op + *s - '0'; + oper = opcode.op + (*s - '0'); if (do_size) { if (oper->type == RX_Operand_Indirect || oper->type == RX_Operand_Zero_Indirect) - PR (PS, "%s", size_names[oper->size]); + PR (PS, "%s", get_size_name (oper->size)); } else switch (oper->type) @@ -255,40 +340,40 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis) break; case RX_Operand_Register: case RX_Operand_TwoReg: - PR (PS, "%s", register_names[oper->reg]); + PR (PS, "%s", get_register_name (oper->reg)); break; case RX_Operand_Indirect: - PR (PS, "%d[%s]", oper->addend, register_names[oper->reg]); + PR (PS, "%d[%s]", oper->addend, get_register_name (oper->reg)); break; case RX_Operand_Zero_Indirect: - PR (PS, "[%s]", register_names[oper->reg]); + PR (PS, "[%s]", get_register_name (oper->reg)); break; case RX_Operand_Postinc: - PR (PS, "[%s+]", register_names[oper->reg]); + PR (PS, "[%s+]", get_register_name (oper->reg)); break; case RX_Operand_Predec: - PR (PS, "[-%s]", register_names[oper->reg]); + PR (PS, "[-%s]", get_register_name (oper->reg)); break; case RX_Operand_Condition: - PR (PS, "%s", condition_names[oper->reg]); + PR (PS, "%s", get_condition_name (oper->reg)); break; case RX_Operand_Flag: - PR (PS, "%s", flag_names[oper->reg]); + PR (PS, "%s", get_flag_name (oper->reg)); break; case RX_Operand_DoubleReg: - PR (PS, "%s", double_register_names[oper->reg]); + PR (PS, "%s", get_double_register_name (oper->reg)); break; case RX_Operand_DoubleRegH: - PR (PS, "%s", double_register_high_names[oper->reg]); + PR (PS, "%s", get_double_register_high_name (oper->reg)); break; case RX_Operand_DoubleRegL: - PR (PS, "%s", double_register_low_names[oper->reg]); + PR (PS, "%s", get_double_register_low_name (oper->reg)); break; case RX_Operand_DoubleCReg: - PR (PS, "%s", double_control_register_names[oper->reg]); + PR (PS, "%s", get_double_control_register_name (oper->reg)); break; case RX_Operand_DoubleCond: - PR (PS, "%s", double_condition_names[oper->reg]); + PR (PS, "%s", get_double_condition_name (oper->reg)); break; default: PR (PS, "[???]");