X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Fcputype.h;h=cb47d28cbe1f81c4cfb43de4d1f08dbcec9f0cf7;hb=c9018aab8eee24b993c12c7aff7fc99d3d73f298;hp=cd4458f64171e5e40720b991e8df5ad72099b0c5;hpb=6b7b8e488bbdedeccabdd001a78ffcbe43bb8a3a;p=deliverable%2Flinux.git

diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index cd4458f64171..cb47d28cbe1f 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -8,6 +8,7 @@
 #define CPUID_CACHETYPE	1
 #define CPUID_TCM	2
 #define CPUID_TLBTYPE	3
+#define CPUID_MPIDR	5
 
 #define CPUID_EXT_PFR0	"c1, 0"
 #define CPUID_EXT_PFR1	"c1, 1"
@@ -70,6 +71,11 @@ static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
 	return read_cpuid(CPUID_TCM);
 }
 
+static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
+{
+	return read_cpuid(CPUID_MPIDR);
+}
+
 /*
  * Intel's XScale3 core supports some v6 features (supersections, L2)
  * but advertises itself as v5 as it does not support the v6 ISA.  For