X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fplatforms%2Fcell%2FKconfig;h=40e24c39ad0671e2ce945ccbff1240dd885ba2ba;hb=28794d34ecb6815a3fa0a4256027c9b081a17c5f;hp=c14d7d8d96c853441a2bc6e4bbfac3b7753d558a;hpb=d6d5aeb661fc14655c417f3582ae7ec52985d2a8;p=deliverable%2Flinux.git diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig index c14d7d8d96c8..40e24c39ad06 100644 --- a/arch/powerpc/platforms/cell/Kconfig +++ b/arch/powerpc/platforms/cell/Kconfig @@ -2,13 +2,18 @@ config PPC_CELL bool default n -config PPC_CELL_NATIVE +config PPC_CELL_COMMON bool select PPC_CELL select PPC_DCR_MMIO - select PPC_OF_PLATFORM_PCI select PPC_INDIRECT_IO select PPC_NATIVE + select PPC_RTAS + +config PPC_CELL_NATIVE + bool + select PPC_CELL_COMMON + select PPC_OF_PLATFORM_PCI select MPIC select IBM_NEW_EMAC_EMAC4 select IBM_NEW_EMAC_RGMII @@ -18,26 +23,31 @@ config PPC_CELL_NATIVE config PPC_IBM_CELL_BLADE bool "IBM Cell Blade" - depends on PPC_MULTIPLATFORM && PPC64 + depends on PPC64 && PPC_BOOK3S select PPC_CELL_NATIVE - select PPC_RTAS select MMIO_NVRAM select PPC_UDBG_16550 select UDBG_RTAS_CONSOLE config PPC_CELLEB bool "Toshiba's Cell Reference Set 'Celleb' Architecture" - depends on PPC_MULTIPLATFORM && PPC64 - select PPC_CELL + depends on PPC64 && PPC_BOOK3S select PPC_CELL_NATIVE - select PPC_RTAS - select PPC_INDIRECT_IO - select PPC_OF_PLATFORM_PCI select HAS_TXX9_SERIAL select PPC_UDBG_BEAT select USB_OHCI_BIG_ENDIAN_MMIO select USB_EHCI_BIG_ENDIAN_MMIO +config PPC_CELL_QPACE + bool "IBM Cell - QPACE" + depends on PPC64 && PPC_BOOK3S + select PPC_CELL_COMMON + +config AXON_MSI + bool + depends on PPC_IBM_CELL_BLADE && PCI_MSI + default y + menu "Cell Broadband Engine options" depends on PPC_CELL @@ -93,7 +103,7 @@ config PPC_IBM_CELL_RESETBUTTON config PPC_IBM_CELL_POWERBUTTON tristate "IBM Cell Blade power button" - depends on PPC_IBM_CELL_BLADE && PPC_PMI && INPUT_EVDEV + depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV default y help Support Powerbutton on IBM Cell blades. @@ -102,7 +112,7 @@ config PPC_IBM_CELL_POWERBUTTON config CBE_THERM tristate "CBE thermal support" default m - depends on CBE_RAS + depends on CBE_RAS && SPU_BASE config CBE_CPUFREQ tristate "CBE frequency scaling" @@ -113,9 +123,9 @@ config CBE_CPUFREQ For details, take a look at . If you don't have such processor, say N -config CBE_CPUFREQ_PMI - tristate "CBE frequency scaling using PMI interface" - depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL +config CBE_CPUFREQ_PMI_ENABLE + bool "CBE frequency scaling using PMI interface" + depends on CBE_CPUFREQ && EXPERIMENTAL default n help Select this, if you want to use the PMI interface @@ -123,6 +133,20 @@ config CBE_CPUFREQ_PMI processor will not only be able to run at lower speed, but also at lower core voltage. +config CBE_CPUFREQ_PMI + tristate + depends on CBE_CPUFREQ_PMI_ENABLE + default CBE_CPUFREQ + +config PPC_PMI + tristate + default y + depends on CBE_CPUFREQ_PMI || PPC_IBM_CELL_POWERBUTTON + help + PMI (Platform Management Interrupt) is a way to + communicate with the BMC (Baseboard Management Controller). + It is used in some IBM Cell blades. + config CBE_CPUFREQ_SPU_GOVERNOR tristate "CBE frequency scaling based on SPU usage" depends on SPU_FS && CPU_FREQ @@ -136,5 +160,5 @@ endmenu config OPROFILE_CELL def_bool y - depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) + depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE